diff options
| author | Kalyan Thota <kalyan_t@codeaurora.org> | 2021-03-19 05:54:06 -0700 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2021-04-09 12:02:35 -0700 |
| commit | a29c8c0241654d5f3165d52e9307e4feff955621 (patch) | |
| tree | a3bd0df6252c08a114f5d8cf388b15a2ae837f2f | |
| parent | 33b2b91e3430b0764234dc2ec28c5ae128828fe0 (diff) | |
drm/msm/disp/dpu1: fix display underruns during modeset.
During crtc disable, display perf structures are reset to 0
which includes state varibles which are immutable. On crtc
enable, we use the same structures and they don't refelect
the actual values
1) Fix is to avoid updating the state structures during disable.
2) Reset the perf structures during atomic check when there is no
modeset enable.
Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org>
Reported-by: Stephen Boyd <swboyd@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/1616158446-19290-1-git-send-email-kalyan_t@codeaurora.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 1 |
2 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index b6b3bbab0333..7cba5bbdf4b7 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -380,7 +380,6 @@ int dpu_core_perf_crtc_update(struct drm_crtc *crtc, } else { DPU_DEBUG("crtc=%d disable\n", crtc->base.id); memset(old, 0, sizeof(*old)); - memset(new, 0, sizeof(*new)); update_bus = true; update_clk = true; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 8602b8507ec5..5a74f93e29da 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -923,6 +923,7 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc, DPU_DEBUG("crtc%d -> enable %d, active %d, skip atomic_check\n", crtc->base.id, crtc_state->enable, crtc_state->active); + memset(&cstate->new_perf, 0, sizeof(cstate->new_perf)); goto end; } |