diff options
| author | Coly Li <colyli@suse.de> | 2024-10-21 13:04:43 +0800 |
|---|---|---|
| committer | Dave Jiang <dave.jiang@intel.com> | 2024-10-28 10:07:49 -0700 |
| commit | 9474d586819940f00a98dd98015fe456f9b35452 (patch) | |
| tree | 417f3c4449a3b1936edb0dbf0a0d5862e59fd0c0 | |
| parent | c5eaec79fa43e994ec54c11538dc603d60cd0c4e (diff) | |
cxl: downgrade a warning message to debug level in cxl_probe_component_regs()
In cxl_probe_component_regs() the error message "Couldn't locate the
CXL.cache and CXL.mem capability array header." is potentially a false
positive error condition.
Downgrade the message from error level to debug level by using dev_dbg()
to print the message, and the end users won't worry about the message
anymore.
[djbw/iweiny: Fix up changelog]
Reported-by: Kelvin Shieh <kshieh@lenovo.com>
Signed-off-by: Coly Li <colyli@suse.de>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Cc: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Link: https://patch.msgid.link/20241021050443.318712-1-colyli@suse.de
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
| -rw-r--r-- | drivers/cxl/core/regs.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/cxl/core/regs.c b/drivers/cxl/core/regs.c index 1c1c10c8bc7a..429973a2165b 100644 --- a/drivers/cxl/core/regs.c +++ b/drivers/cxl/core/regs.c @@ -52,7 +52,7 @@ void cxl_probe_component_regs(struct device *dev, void __iomem *base, cap_array = readl(base + CXL_CM_CAP_HDR_OFFSET); if (FIELD_GET(CXL_CM_CAP_HDR_ID_MASK, cap_array) != CM_CAP_HDR_CAP_ID) { - dev_err(dev, + dev_dbg(dev, "Couldn't locate the CXL.cache and CXL.mem capability array header.\n"); return; } |