diff options
| author | Jani Nikula <jani.nikula@intel.com> | 2025-04-14 14:29:43 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2025-04-14 21:34:17 +0300 |
| commit | 2eb0e67ef063835b3fa5a8b8feaf6beae024b060 (patch) | |
| tree | cc3b73ad453a8b5fb8bb486a09dea95c4c625724 | |
| parent | d3815ae24f25fea2f94c99c975da05b0a521f6c2 (diff) | |
drm/i915: use 32-bit access for gen2 irq registers
We've previously switched from 16-bit to 32-bit access for gen2 irq
registers, but one was left behind. Fix it.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/5a56286c94e08a02435c60ce0fbff13aca6c0d1f.1744630147.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gpu_error.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 819ab933bb10..df16c2b86b9d 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -1782,8 +1782,6 @@ static void gt_record_display_regs(struct intel_gt_coredump *gt) gt->ier = intel_uncore_read(uncore, VLV_IER); else if (HAS_PCH_SPLIT(i915)) gt->ier = intel_uncore_read(uncore, DEIER); - else if (GRAPHICS_VER(i915) == 2) - gt->ier = intel_uncore_read16(uncore, GEN2_IER); else gt->ier = intel_uncore_read(uncore, GEN2_IER); } |