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2024-04-12Merge tag 'drm-msm-next-2024-04-11' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/msm into drm-fixes Fixes for v6.9 Display: - Fixes for PM refcount leak when DP goes to disconnected state and also when link training fails. This is also one of the issues found with the pm runtime series - Add missing newlines to prints in msm_fb and msm_kms - Change permissions of some dpu debugfs entries which write to const data from catalog to read-only to avoid protection faults - Fix the interface table for the catalog of X1E80100. This is an important fix to bringup DP for X1E80100. - Logging fix to print the callback symbol in the invalid IRQ message case rather than printing when its known to be NULL. - Bindings fix to add DP node as child of mdss for mdss node - Minor typo fix in DP driver API which handles port status change GPU: - fix CHRASHDUMP_READ() - fix HHB (highest bank bit) for a619 to fix UBWC corruption Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGvFwRUcHGWva7oDeydq1PTiZMduuykCD2MWaFrT4iMGZA@mail.gmail.com
2024-04-05drm/msm/adreno: Set highest_bank_bit for A619Luca Weiss
The default highest_bank_bit of 15 didn't seem to cause issues so far but downstream defines it to be 14. But similar to [0] leaving it on 14 (or 15 for that matter) causes some corruption issues with some resolutions with DisplayPort, like 1920x1200. So set it to 13 for now so that there's no screen corruption. [0] commit 6a0dbcd20ef2 ("drm/msm/a6xx: set highest_bank_bit to 13 for a610") Fixes: b7616b5c69e6 ("drm/msm/adreno: Add A619 support") Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Patchwork: https://patchwork.freedesktop.org/patch/585215/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-04-05drm/msm: fix the `CRASHDUMP_READ` target of `a6xx_get_shader_block()`Miguel Ojeda
Clang 14 in an (essentially) defconfig arm64 build for next-20240326 reports [1]: drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:843:6: error: variable 'out' set but not used [-Werror,-Wunused-but-set-variable] The variable `out` in these functions is meant to compute the `target` of `CRASHDUMP_READ()`, but in this case only the initial value (`dumper->iova + A6XX_CD_DATA_OFFSET`) was being passed. Thus use `out` as it was intended by Connor [2]. There was an alternative patch at [3] that removed the variable altogether, but that would only use the initial value. Fixes: 64d6255650d4 ("drm/msm: More fully implement devcoredump for a7xx") Closes: https://lore.kernel.org/lkml/CANiq72mjc5t4n25SQvYSrOEhxxpXYPZ4pPzneSJHEnc3qApu2Q@mail.gmail.com/ [1] Link: https://lore.kernel.org/lkml/CACu1E7HhCKMJd6fixZSPiNAz6ekoZnkMTHTcLFVmbZ-9VoLxKg@mail.gmail.com/ [2] Link: https://lore.kernel.org/lkml/20240307093727.1978126-1-colin.i.king@gmail.com/ [3] Signed-off-by: Miguel Ojeda <ojeda@kernel.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/584955/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-04-01drm/msm/dp: fix typo in dp_display_handle_port_status_changed()Abhinav Kumar
Fix the typo in the name of dp_display_handle_port_status_changed(). Fixes: c58eb1b54fee ("drm/msm/dp: fix connect/disconnect handled at irq_hpd") Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/581746/ Link: https://lore.kernel.org/r/20240306193515.455388-1-quic_abhinavk@quicinc.com
2024-04-01drm/msm/dpu: make error messages at dpu_core_irq_register_callback() more ↵Dmitry Baryshkov
sensible There is little point in using %ps to print a value known to be NULL. On the other hand it makes sense to print the callback symbol in the 'invalid IRQ' message. Correct those two error messages to make more sense. Fixes: 6893199183f8 ("drm/msm/dpu: stop using raw IRQ indices in the kernel output") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/585565/ Link: https://lore.kernel.org/r/20240330-dpu-irq-messages-v1-1-9ce782ae35f9@linaro.org Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
2024-03-29drm/msm/dp: assign correct DP controller ID to x1e80100 interface tableKuogee Hsieh
At current x1e80100 interface table, interface #3 is wrongly connected to DP controller #0 and interface #4 wrongly connected to DP controller #2. Fix this problem by connect Interface #3 to DP controller #0 and interface #4 connect to DP controller #1. Also add interface #6, #7 and #8 connections to DP controller to complete x1e80100 interface table. Changs in V3: -- add v2 changes log Changs in V2: -- add x1e80100 to subject -- add Fixes Fixes: e3b1f369db5a ("drm/msm/dpu: Add X1E80100 support") Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585549/ Link: https://lore.kernel.org/r/1711741586-9037-1-git-send-email-quic_khsieh@quicinc.com Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
2024-03-29drm/msm/dpu: don't allow overriding data from catalogDmitry Baryshkov
The data from catalog is marked as const, so it is a part of the RO segment. Allowing userspace to write to it through debugfs can cause protection faults. Set debugfs file mode to read-only for debug entries corresponding to perf_cfg coming from catalog. Fixes: abda0d925f9c ("drm/msm/dpu: Mark various data tables as const") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/582844/ Link: https://lore.kernel.org/r/20240314-dpu-perf-rework-v3-1-79fa4e065574@linaro.org Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
2024-03-29drm/msm: Add newlines to some debug printsStephen Boyd
These debug prints are missing newlines, leading to multiple messages being printed on one line and hard to read logs. Add newlines to have the debug prints on separate lines. The DBG macro used to add a newline, but I missed that while migrating to drm_dbg wrappers. Fixes: 7cb017db1896 ("drm/msm: Move FB debug prints to drm_dbg_state()") Fixes: 721c6e0c6aed ("drm/msm: Move vblank debug prints to drm_dbg_vbl()") Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/584769/ Link: https://lore.kernel.org/r/20240325210810.1340820-1-swboyd@chromium.org Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
2024-03-29drm/msm/dp: fix runtime PM leak on connect failureJohan Hovold
Make sure to balance the runtime PM usage counter (and suspend) before returning on connect failures (e.g. DPCD read failures after a spurious connect event or if link training fails). Fixes: 5814b8bf086a ("drm/msm/dp: incorporate pm_runtime framework into DP driver") Cc: stable@vger.kernel.org # 6.8 Cc: Kuogee Hsieh <quic_khsieh@quicinc.com> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/582746/ Link: https://lore.kernel.org/r/20240313164306.23133-3-johan+linaro@kernel.org Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
2024-03-29drm/msm/dp: fix runtime PM leak on disconnectJohan Hovold
Make sure to put the runtime PM usage count (and suspend) also when receiving a disconnect event while in the ST_MAINLINK_READY state. This specifically avoids leaking a runtime PM usage count on every disconnect with display servers that do not automatically enable external displays when receiving a hotplug notification. Fixes: 5814b8bf086a ("drm/msm/dp: incorporate pm_runtime framework into DP driver") Cc: stable@vger.kernel.org # 6.8 Cc: Kuogee Hsieh <quic_khsieh@quicinc.com> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/582744/ Link: https://lore.kernel.org/r/20240313164306.23133-2-johan+linaro@kernel.org Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
2024-03-13Merge tag 'drm-next-2024-03-13' of https://gitlab.freedesktop.org/drm/kernelLinus Torvalds
Pull drm updates from Dave Airlie: "Highlights are usual, more AMD IP blocks for future hw, i915/xe changes, Displayport tunnelling support for i915, msm YUV over DP changes, new tests for ttm, but its mostly a lot of stuff all over the place from lots of people. core: - EDID cleanups - scheduler error handling fixes - managed: add drmm_release_action() with tests - add ratelimited drm debug print - DPCD PSR early transport macro - DP tunneling and bandwidth allocation helpers - remove built-in edids - dp: Avoid AUX transfers on powered-down displays - dp: Add VSC SDP helpers cross drivers: - use new drm print helpers - switch to ->read_edid callback - gem: add stats for shared buffers plus updates to amdgpu, i915, xe syncobj: - fixes to waiting and sleeping ttm: - add tests - fix errno codes - simply busy-placement handling - fix page decryption media: - tc358743: fix v4l device registration video: - move all kernel parameters for video behind CONFIG_VIDEO sound: - remove <drm/drm_edid.h> include from header ci: - add tests for msm - fix apq8016 runner efifb: - use copy of global screen_info state vesafb: - use copy of global screen_info state simplefb: - fix logging bridge: - ite-6505: fix DP link-training bug - samsung-dsim: fix error checking in probe - samsung-dsim: add bsh-smm-s2/pro boards - tc358767: fix regmap usage - imx: add i.MX8MP HDMI PVI plus DT bindings - imx: add i.MX8MP HDMI TX plus DT bindings - sii902x: fix probing and unregistration - tc358767: limit pixel PLL input range - switch to new drm_bridge_read_edid() interface panel: - ltk050h3146w: error-handling fixes - panel-edp: support delay between power-on and enable; use put_sync in unprepare; support Mediatek MT8173 Chromebooks, BOE NV116WHM-N49 V8.0, BOE NV122WUM-N41, CSO MNC207QS1-1 plus DT bindings - panel-lvds: support EDT ETML0700Z9NDHA plus DT bindings - panel-novatek: FRIDA FRD400B25025-A-CTK plus DT bindings - add BOE TH101MB31IG002-28A plus DT bindings - add EDT ETML1010G3DRA plus DT bindings - add Novatek NT36672E LCD DSI plus DT bindings - nt36523: support 120Hz timings, fix includes - simple: fix display timings on RK32FN48H - visionox-vtdr6130: fix initialization - add Powkiddy RGB10MAX3 plus DT bindings - st7703: support panel rotation plus DT bindings - add Himax HX83112A plus DT bindings - ltk500hd1829: add support for ltk101b4029w and admatec 9904370 - simple: add BOE BP082WX1-100 8.2" panel plus DT bindungs panel-orientation-quirks: - GPD Win Mini amdgpu: - Validate DMABuf imports in compute VMs - Add RAS ACA framework - PSP 13 fixes - Misc code cleanups - Replay fixes - Atom interpretor PS, WS bounds checking - DML2 fixes - Audio fixes - DCN 3.5 Z state fixes - Remove deprecated ida_simple usage - UBSAN fixes - RAS fixes - Enable seq64 infrastructure - DC color block enablement - Documentation updates - DC documentation updates - DMCUB updates - ATHUB 4.1 support - LSDMA 7.0 support - JPEG DPG support - IH 7.0 support - HDP 7.0 support - VCN 5.0 support - SMU 13.0.6 updates - NBIO 7.11 updates - SDMA 6.1 updates - MMHUB 3.3 updates - DCN 3.5.1 support - NBIF 6.3.1 support - VPE 6.1.1 support amdkfd: - Validate DMABuf imports in compute VMs - SVM fixes - Trap handler updates and enhancements - Fix cache size reporting - Relocate the trap handler radeon: - Atom interpretor PS, WS bounds checking - Misc code cleanups xe: - new query for GuC submission version - Remove unused persistent exec_queues - Add vram frequency sysfs attributes - Add the flag XE_VM_BIND_FLAG_DUMPABLE - Drop pre-production workarounds - Drop kunit tests for unsupported platforms - Start pumbling SR-IOV support with memory based interrupts for VF - Allow to map BO in GGTT with PAT index corresponding to XE_CACHE_UC to work with memory based interrupts - Add GuC Doorbells Manager as prep work SR-IOV - Implement additional workarounds for xe2 and MTL - Program a few registers according to perfomance guide spec for Xe2 - Fix remaining 32b build issues and enable it back - Fix build with CONFIG_DEBUG_FS=n - Fix warnings from GuC ABI headers - Introduce Relay Communication for SR-IOV for VF <-> GuC <-> PF - Release mmap mappings on rpm suspend - Disable mid-thread preemption when not properly supported by hardware - Fix xe_exec by reserving extra fence slot for CPU bind - Fix xe_exec with full long running exec queue - Canonicalize addresses where needed for Xe2 and add to devcoredum - Toggle USM support for Xe2 - Only allow 1 ufence per exec / bind IOCTL - Add GuC firmware loading for Lunar Lake - Add XE_VMA_PTE_64K VMA flag i915: - Add more ADL-N PCI IDs - Enable fastboot also on older platforms - Early transport for panel replay and PSR - New ARL PCI IDs - DP TPS4 PHY test pattern support - Unify and improve VSC SDP for PSR and non-PSR cases - Refactor memory regions and improve debug logging - Rework global state serialization - Remove unused CDCLK divider fields - Unify HDCP connector logging format - Use display instead of graphics version in display code - Move VBT and opregion debugfs next to the implementation - Abstract opregion interface, use opaque type - MTL fixes - HPD handling fixes - Add GuC submission interface version query - Atomically invalidate userptr on mmu-notifier - Update handling of MMIO triggered reports - Don't make assumptions about intel_wakeref_t type - Extend driver code of Xe_LPG to Xe_LPG+ - Add flex arrays to struct i915_syncmap - Allow for very slow HuC loading - DP tunneling and bandwidth allocation support msm: - Correct bindings for MSM8976 and SM8650 platforms - Start migration of MDP5 platforms to DPU driver - X1E80100 MDSS support - DPU: - Improve DSC allocation, fixing several important corner cases - Add support for SDM630/SDM660 platforms - Simplify dpu_encoder_phys_ops - Apply fixes targeting DSC support with a single DSC encoder - Apply fixes for HCTL_EN timing configuration - X1E80100 support - Add support for YUV420 over DP - GPU: - fix sc7180 UBWC config - fix a7xx LLC config - new gpu support: a305B, a750, a702 - machine support: SM7150 (different power levels than other a618) - a7xx devcoredump support habanalabs: - configure IRQ affinity according to NUMA node - move HBM MMU page tables inside the HBM - improve device reset - check extended PCIe errors ivpu: - updates to firmware API - refactor BO allocation imx: - use devm_ functions during init hisilicon: - fix EDID includes mgag200: - improve ioremap usage - convert to struct drm_edid - Work around PCI write bursts nouveau: - disp: use kmemdup() - fix EDID includes - documentation fixes qaic: - fixes to BO handling - make use of DRM managed release - fix order of remove operations rockchip: - analogix_dp: get encoder port from DT - inno_hdmi: support HDMI for RK3128 - lvds: error-handling fixes ssd130x: - support SSD133x plus DT bindings tegra: - fix error handling tilcdc: - make use of DRM managed release v3d: - show memory stats in debugfs - Support display MMU page size vc4: - fix error handling in plane prepare_fb - fix framebuffer test in plane helpers virtio: - add venus capset defines vkms: - fix OOB access when programming the LUT - Kconfig improvements vmwgfx: - unmap surface before changing plane state - fix memory leak in error handling - documentation fixes - list command SVGA_3D_CMD_DEFINE_GB_SURFACE_V4 as invalid - fix null-pointer deref in execbuf - refactor display-mode probing - fix fencing for creating cursor MOBs - fix cursor-memory lifetime xlnx: - fix live video input for ZynqMP DPSUB lima: - fix memory leak loongson: - fail if no VRAM present meson: - switch to new drm_bridge_read_edid() interface renesas: - add RZ/G2L DU support plus DT bindings mxsfb: - Use managed mode config sun4i: - HDMI: updates to atomic mode setting mediatek: - Add display driver for MT8188 VDOSYS1 - DSI driver cleanups - Filter modes according to hardware capability - Fix a null pointer crash in mtk_drm_crtc_finish_page_flip etnaviv: - enhancements for NPU and MRT support" * tag 'drm-next-2024-03-13' of https://gitlab.freedesktop.org/drm/kernel: (1420 commits) drm/amd/display: Removed redundant @ symbol to fix kernel-doc warnings in -next repo drm/amd/pm: wait for completion of the EnableGfxImu message drm/amdgpu/soc21: add mode2 asic reset for SMU IP v14.0.1 drm/amdgpu: add smu 14.0.1 support drm/amdgpu: add VPE 6.1.1 discovery support drm/amdgpu/vpe: add VPE 6.1.1 support drm/amdgpu/vpe: don't emit cond exec command under collaborate mode drm/amdgpu/vpe: add collaborate mode support for VPE drm/amdgpu/vpe: add PRED_EXE and COLLAB_SYNC OPCODE drm/amdgpu/vpe: add multi instance VPE support drm/amdgpu/discovery: add nbif v6_3_1 ip block drm/amdgpu: Add nbif v6_3_1 ip block support drm/amdgpu: Add pcie v6_1_0 ip headers (v5) drm/amdgpu: Add nbif v6_3_1 ip headers (v5) arch/powerpc: Remove <linux/fb.h> from backlight code macintosh/via-pmu-backlight: Include <linux/backlight.h> fbdev/chipsfb: Include <linux/backlight.h> drm/etnaviv: Restore some id values drm/amdkfd: make kfd_class constant drm/amdgpu: add ring timeout information in devcoredump ...
2024-03-04drm/msm/dpu: capture snapshot on the first commit_done timeoutDmitry Baryshkov
In order to debug commit_done timeouts, capture the devcoredump state when the first timeout occurs after the encoder has been enabled. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579850/ Link: https://lore.kernel.org/r/20240226-fd-dpu-debug-timeout-v4-3-51eec83dde23@linaro.org
2024-03-04drm/msm/dpu: split dpu_encoder_wait_for_event into two functionsDmitry Baryshkov
Stop multiplexing several events via the dpu_encoder_wait_for_event() function. Split it into two distinct functions two allow separate handling of those events. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579848/ Link: https://lore.kernel.org/r/20240226-fd-dpu-debug-timeout-v4-2-51eec83dde23@linaro.org
2024-03-04drm/msm/dpu: make "vblank timeout" more usefulDmitry Baryshkov
We have several reports of vblank timeout messages. However after some debugging it was found that there might be different causes to that. To allow us to identify the DPU block that gets stuck, include the actual CTL_FLUSH value into the timeout message. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579849/ Link: https://lore.kernel.org/r/20240226-fd-dpu-debug-timeout-v4-1-51eec83dde23@linaro.org
2024-03-04drm/msm/dp: allow YUV420 mode for DP connector when CDM availablePaloma Arellano
All the components of YUV420 over DP are added. Therefore, let's mark the connector property as true for DP connector when the DP type is not eDP and when there is a CDM block available. Changes in v3: - Move setting the connector's ycbcr_420_allowed parameter so that it is not dependent on if the dp_display is not eDP Changes in v2: - Check for if dp_catalog has a CDM block available instead of checking if VSC SDP is allowed when setting the dp connector's ycbcr_420_allowed parameter Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579628/ Link: https://lore.kernel.org/r/20240222194025.25329-20-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dpu: reserve CDM blocks for DP if mode is YUV420Paloma Arellano
Reserve CDM blocks for DP if the mode format is YUV420. Currently this reservation only works for writeback and DP if the format is YUV420. But this can be easily extented to other YUV formats for DP. Changes in v2: - Minor code simplification Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579630/ Link: https://lore.kernel.org/r/20240222194025.25329-19-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dpu: modify timing engine programming for YUV420 over DPPaloma Arellano
Adjust the encoder timing engine setup programming in the case of video mode for YUV420 over DP to accommodate CDM. Changes in v3: - Move drm_display_mode's hskew division to another patch - Minor cleanup Changes in v2: - Move timing engine programming to this patch Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579634/ Link: https://lore.kernel.org/r/20240222194025.25329-18-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dpu: modify encoder programming for CDM over DPPaloma Arellano
Adjust the encoder format programming in the case of video mode for DP to accommodate CDM related changes. Changes in v4: - Remove hw_cdm check in dpu_encoder_needs_periph_flush() - Remove hw_cdm check when getting the fmt_fourcc in dpu_encoder_phys_vid_enable() Changes in v2: - Move timing engine programming to a separate patch from this one - Move update_pending_flush_periph() invocation completely to this patch - Change the logic of dpu_encoder_get_drm_fmt() so that it only calls drm_mode_is_420_only() instead of doing additional unnecessary checks - Create new functions msm_dp_needs_periph_flush() and it's supporting function dpu_encoder_needs_periph_flush() to check if the mode is YUV420 and VSC SDP is enabled before doing a peripheral flush Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579641/ Link: https://lore.kernel.org/r/20240222194025.25329-17-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dp: enable SDP and SDE periph flush updatePaloma Arellano
DP controller can be setup to operate in either SDP update flush mode or peripheral flush mode based on the DP controller hardware version. Starting in DP v1.2, the hardware documents require the use of peripheral flush mode for SDP packets such as PPS OR VSC SDP packets. In-line with this guidance, lets program the DP controller to use peripheral flush mode starting DP v1.2 Changes in v4: - Clear up that DP_MAINLINK_CTRL_FLUSH_MODE register requires the use of bits [24:23] - Modify macros DP_MAINLINK_FLUSH_MODE_UPDATE_SDP and DP_MAINLINK_FLUSH_MODE_SDP_PERIPH_UPDATE to explicitly set their values in the bits of DP_MAINLINK_CTRL_FLUSH_MODE_MASK Changes in v3: - Clear up that the DP_MAINLINK_FLUSH_MODE_SDE_PERIPH_UPDATE macro is setting bits [24:23] to a value of 3 Changes in v2: - Use the original dp_catalog_hw_revision() function to correctly check the DP HW version Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579621/ Link: https://lore.kernel.org/r/20240222194025.25329-16-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dpu: add support of new peripheral flush mechanismKuogee Hsieh
Introduce a peripheral flushing mechanism to decouple peripheral metadata flushing from timing engine related flush. Changes in v2: - Fixed some misalignment issues Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579619/ Link: https://lore.kernel.org/r/20240222194025.25329-15-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dp: add VSC SDP support for YUV420 over DPPaloma Arellano
Add support to pack and send the VSC SDP packet for DP. This therefore allows the transmision of format information to the sinks which is needed for YUV420 support over DP. Changes in v5: - Slightly modify use of drm_dp_vsc_sdp_pack() - Remove dp_catalog NULL checks - Modify dp_utils_pack_sdp_header() to more clearly pack the header buffer - Move dp_utils_pack_sdp_header() inside of dp_catalog_panel_send_vsc_sdp to clearly show the relationship between the header buffer and the vsc_sdp struct - Due to the last point, remove the dp_utils_pack_vsc_sdp() function and only call drm_dp_vsc_sdp_pack() in dp_panel_setup_vsc_sdp_yuv_420() Changes in v4: - Remove struct msm_dp_sdp_with_parity - Use dp_utils_pack_sdp_header() to pack the SDP header and parity bytes into a buffer - Use this buffer when writing the VSC SDP data in dp_catalog_panel_send_vsc_sdp() - Write to all of the MMSS_DP_GENERIC0 registers instead of just the ones with non-zero values Changes in v3: - Create a new struct, msm_dp_sdp_with_parity, which holds the packing information for VSC SDP - Use drm_dp_vsc_sdp_pack() to pack the data into the new msm_dp_sdp_with_parity struct instead of specifically packing for YUV420 format - Modify dp_catalog_panel_send_vsc_sdp() to send the VSC SDP data using the new msm_dp_sdp_with_parity struct Changes in v2: - Rename GENERIC0_SDPSIZE macro to GENERIC0_SDPSIZE_VALID - Remove dp_sdp from the dp_catalog struct since this data is being allocated at the point used - Create a new function in dp_utils to pack the VSC SDP data into a buffer - Create a new function that packs the SDP header bytes into a buffer. This function is made generic so that it can be utilized by dp_audio header bytes into a buffer - Create a new function in dp_utils that takes the packed buffer and writes to the DP_GENERIC0_* registers - Split the dp_catalog_panel_config_vsc_sdp() function into two to disable/enable sending VSC SDP packets - Check the DP HW version using the original useage of dp_catalog_hw_revision() and correct the version checking logic - Rename dp_panel_setup_vsc_sdp() to dp_panel_setup_vsc_sdp_yuv_420() to explicitly state that currently VSC SDP is only being set up to support YUV420 modes Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579636/ Link: https://lore.kernel.org/r/20240222194025.25329-14-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dp: move parity calculation to dp_utilsPaloma Arellano
Parity calculation is necessary for VSC SDP implementation. Therefore create new files dp_utils.c and dp_utils.h and move the parity calculating functions here. This ensures that they are usable by SDP programming in both dp_catalog.c and dp_audio.c Changes in v3: - Change ordering of the header byte macros Changes in v2: - Create new files dp_utils.c and dp_utils.h - Move the parity calculation to these new files instead of having them in dp_catalog.c and dp_catalog.h Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579617/ Link: https://lore.kernel.org/r/20240222194025.25329-13-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dp: change clock related programming for YUV420 over DPPaloma Arellano
Change all relevant DP controller related programming for YUV420 cases. Namely, change the pixel clock math to consider YUV420 and modify the MVID programming to consider YUV420. Changes in v2: - Move configuration control programming to a different commit - Slight code simplification - Add VSC SDP check when doing mode_pclk_khz division in dp_bridge_mode_valid Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579640/ Link: https://lore.kernel.org/r/20240222194025.25329-12-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dp: program config ctrl for YUV420 over DPPaloma Arellano
Change relevant DP controller related programming for YUV420 cases. Program the configuration control register to indicate YUV420. Changes in v2: - Create a new patch only for configuration control programming Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579615/ Link: https://lore.kernel.org/r/20240222194025.25329-11-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dpu: move widebus logic to its own APIPaloma Arellano
Widebus enablement is decided by the interfaces based on their specific checks and that already happens with DSI/DP specific helpers. Let's invoke these helpers from dpu_encoder_is_widebus_enabled() to make it cleaner overall. Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579632/ Link: https://lore.kernel.org/r/20240222194025.25329-10-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dp: check if VSC SDP is supported in DP programmingPaloma Arellano
In the DP driver, check if VSC SDP is supported and propagate this value to dp_panel. In dp_display's dp_mode, the out_fmt_is_yuv_420 parameter must also utilize this value since YUV420 is only allowed when VSC SDP is supported. Changes in v2: - Move DP programming when VSC SDP is supported to this patch Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579625/ Link: https://lore.kernel.org/r/20240222194025.25329-9-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dp: store mode YUV420 information to be used by rest of DPPaloma Arellano
Wide bus is not supported when the mode is YUV420 in DP. In preparation for changing the DPU programming to reflect this, the value and assignment location of wide_bus_en for the DP submodules must be changed. Move it from boot time in dp_init_sub_modules() to run time in dp_display_mode_set. Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579614/ Link: https://lore.kernel.org/r/20240222194025.25329-8-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dp: rename wide_bus_en to wide_bus_supportedPaloma Arellano
Rename wide_bus_en to wide_bus_supported in dp_display_private to correctly establish that the parameter is referencing if wide bus is supported instead of enabled. Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579613/ Link: https://lore.kernel.org/r/20240222194025.25329-7-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dpu: move dpu_encoder_helper_phys_setup_cdm to dpu_encoderPaloma Arellano
Move dpu_encoder_helper_phys_setup_cdm to dpu_encoder in preparation for implementing YUV420 over DP, which requires CDM compatibility. Changes in v2: - Slightly change the wording of the commit text to make clear that YUV over DP requires CDM Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579611/ Link: https://lore.kernel.org/r/20240222194025.25329-6-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dpu: allow dpu_encoder_helper_phys_setup_cdm to work for DPPaloma Arellano
Generalize dpu_encoder_helper_phys_setup_cdm to be compatible with DP. Changes in v2: - Minor formatting changes - Move the modification of the dimensions for CDM setup to a new patch Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579609/ Link: https://lore.kernel.org/r/20240222194025.25329-5-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dpu: pass mode dimensions instead of fb size in CDM setupPaloma Arellano
Modify the output width and height parameters of hw_cdm to utilize the physical encoder's data instead of obtaining the information from the framebuffer. CDM is to be set up to utilize the actual output data since at CDM setup, there is no difference between the two sources. Changes in v2: - Move the modification of the dimensions for CDM setup to this new patch Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579607/ Link: https://lore.kernel.org/r/20240222194025.25329-4-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dpu: add division of drm_display_mode's hskew parameterPaloma Arellano
Setting up the timing engine when the physical encoder has a split role neglects dividing the drm_display_mode's hskew parameter. Let's fix this since this must also be done in preparation for implementing YUV420 over DP. Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579605/ Link: https://lore.kernel.org/r/20240222194025.25329-3-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-04drm/msm/dpu: allow certain formats for CDM for DPPaloma Arellano
CDM block supports formats other than H1V2 for DP. Since we are now adding support for CDM over DP, relax the checks to allow all other formats for DP other than H1V2. Changes in v2: - Add fixes tag - Move patch to top of series Fixes: 0afac0ba6024 ("drm/msm/dpu: add dpu_hw_cdm abstraction for CDM block") Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579606/ Link: https://lore.kernel.org/r/20240222194025.25329-2-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-03-03Merge tag 'drm-misc-next-2024-02-29' into msm-nextRob Clark
Merge to pick up commit 47f419e07111 ("drm/dp: move intel_dp_vsc_sdp_pack() to generic helper") drm-misc-next for v6.9: UAPI Changes: Cross-subsystem Changes: backlight: - corgi: include backlight header fbdev: - Cleanup includes in public header file - fbtft: Include backlight header Core Changes: edid: - Remove built-in EDID data dp: - Avoid AUX transfers on powered-down displays - Add VSC SDP helpers modesetting: - Add sanity checks for polling - Cleanups scheduler: - Cleanups tests: - Add helpers for mode-setting tests Driver Changes: i915: - Use shared VSC SDP helper mgag200: - Work around PCI write bursts mxsfb: - Use managed mode config nouveau: - Include backlight header where necessary qiac: - Cleanups sun4: - HDMI: updates to atomic mode setting tegra: - Fix GEM refounting in error paths tidss: - Fix multi display - Fix initial Z position v3d: - Support display MMU page size Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-03-01Merge tag 'drm-msm-fixes-2024-02-28' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/msm into drm-fixes Fixes for v6.8-rc7 DP: - Revert a change which was causing a HDP regression Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGvhWvHiPGQ1pRD2XPAQoHEM2M35kjhrsSAEtzh8AMSRvg@mail.gmail.com
2024-02-28Revert "drm/msm/dp: use drm_bridge_hpd_notify() to report HPD status changes"Dmitry Baryshkov
This reverts commit e467e0bde881 ("drm/msm/dp: use drm_bridge_hpd_notify() to report HPD status changes"). The commit changed the way how the MSM DP driver communicates HPD-related events to the userspace. The mentioned commit made some of the HPD events being reported earlier. This way userspace starts poking around. It interacts in a bad way with the dp_bridge_detect and the driver's state machine, ending up either with the very long delays during hotplug detection or even inability of the DP driver to report the display as connected. A proper fix will involve redesigning of the HPD handling in the MSM DP driver. It is underway, but it will be intrusive and can not be thought about as a simple fix for the issue. Thus, revert the offending commit. Fixes: e467e0bde881 ("drm/msm/dp: use drm_bridge_hpd_notify() to report HPD status changes") Link: https://gitlab.freedesktop.org/drm/msm/-/issues/50 Reported-by: Johan Hovold <johan@kernel.org> Link: https://lore.kernel.org/r/Zd3YPGmrprxv-N-O@hovoldconsulting.com/ Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Paloma Arellano <quic_parellan@quicinc.com> Tested-by: Johan Hovold <johan+linaro@kernel.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-HDK Patchwork: https://patchwork.freedesktop.org/patch/580313/ Link: https://lore.kernel.org/r/20240227220808.50146-1-dmitry.baryshkov@linaro.org
2024-02-26drm/msm/adreno: Add A702 supportKonrad Dybcio
The A702 is a weird mix of 600 and 700 series.. Perhaps even a testing ground for some A7xx features with good ol' A6xx silicon. It's basically A610 that's been beefed up with some new registers and hw features (like APRIV!), that was then cut back in size, memory bus and some other ways. Add support for it, tested with QCM2290 / RB1. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579752/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-02-26drm/msm: Fix page fault client detection on a660 family and a7xxConnor Abbott
Signed-off-by: Connor Abbott <cwabbott0@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/575918/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-02-26drm/msm: More fully implement devcoredump for a7xxConnor Abbott
Use the vendor-provided snapshot headers to dump the contextless registers, shader blocks, and cluster registers. Still unimplemented are the GMU registers and "external core" registers, which would require more work because they use register spaces we don't have described in devicetree and dump registers from multiple spaces in a single list. Signed-off-by: Connor Abbott <cwabbott0@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/575919/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-02-26drm/msm: Fix snapshotting a7xx indexed regsConnor Abbott
We were overwriting the last indexed reg (CP_ROQ) and we were snapshotting the same CP_MEMPOOL block twice instead of snapshotting CP_BV_MEMPOOL as intended. Signed-off-by: Connor Abbott <cwabbott0@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/575920/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-02-26drm/msm: Import a7xx crashdump register lists from kgslConnor Abbott
This imports these files as-is, the following commits will have to make slight changes to get them to compile because downstream uses un-namespaced enums that conflict with a6xx. However we should try as much as possible to stick to downstream's format to make importing new gens easier. Signed-off-by: Connor Abbott <cwabbott0@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/575921/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-02-26drm/msm: add support for A750 GPUNeil Armstrong
Add support for the A750 GPU found on the SM8650 platform Unlike the the very close A740 GPU on the SM8550 SoC, the A750 GPU doesn't have an HWCFG block but a separate register set. The A750 GPU info are added under the adreno_is_a750() macro and the ADRENO_7XX_GEN3 family id. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/578693/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-02-26drm/msm/adreno: Add A305B supportLuca Weiss
Add support for the Adreno 305B GPU that is found in MSM8226(v2) SoC. Previously this was mistakenly claimed to be supported but using wrong a configuration. In MSM8226v1 there's also a A305B but with chipid 0x03000510 which should work with the same configuration but due to lack of hardware for testing this is not added. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Reviewed-by: David Heidelberg <david@ixit.cz> Patchwork: https://patchwork.freedesktop.org/patch/575274/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-02-26drm/msm/a7xx: Fix LLC typoRob Clark
We'd miss actually activating LLC. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Fixes: af66706accdf ("drm/msm/a6xx: Add skeleton A7xx support") Patchwork: https://patchwork.freedesktop.org/patch/573043/
2024-02-26drm/msm/adreno: Update generated headersRob Clark
This updates the GPU headers to latest from mesa, using gen_header.py (which is used to generate headers at bulid time for mesa), rather than headergen2 (which doesn't have proper support for A6XX vs A7XX register variants). Mostly just uninteresting churn, but there are a couple spots in a7xx paths which update REG_A6XX_foo to REG_A7XX_foo for registers which are a7xx specific. Cc: Connor Abbott <cwabbott0@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/574880/
2024-02-26drm/msm/adreno: Add support for SM7150 SoC machineDanila Tikhonov
SM7150 has 5 power levels which correspond to 5 speed-bin values: 0, 128, 146, 167, 172. Speed-bin value is calulated as FMAX/4.8MHz round up to zero decimal places. Also a618 on SM7150 uses a615 zapfw. Add a squashed version (.mbn). Add this as machine = "qcom,sm7150", because speed-bin values are different from atoll (sc7180/sm7125). Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/578902/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-02-26drm/msm/a6xx: specify UBWC config for sc7180Dmitry Baryshkov
Historically the Adreno driver has not been updating memory configuration registers on a618 (SC7180 platform) implying that the default configuration is fine. After the rework performed in the commit 8814455a0e54 ("drm/msm: Refactor UBWC config setting") the function a6xx_calc_ubwc_config() still contained this shortcut and did not calculate UBWC configuration. However the function which now actually updates hardware registers, a6xx_set_ubwc_config(), doesn't contain such check. Rather than adding the check to a6xx_set_ubwc_config(), fill in the UBWC config for a618 (based on readings from SC7180). Reported-by: Leonard Lausen <leonard@lausen.nl> Link: https://gitlab.freedesktop.org/drm/msm/-/issues/49 Fixes: 8814455a0e54 ("drm/msm: Refactor UBWC config setting") Cc: Connor Abbott <cwabbott0@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/579113/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-02-26Merge v6.8-rc6 into drm-nextDaniel Vetter
Thomas Zimmermann asked to backmerge -rc6 for drm-misc branches, there's a few same-area-changed conflicts (xe and amdgpu mostly) that are getting a bit too annoying. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2024-02-22drm/msm/dpu: Add X1E80100 supportAbel Vesa
Add definitions for the display hardware used on the Qualcomm X1E80100 platform. Co-developed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579075/ Link: https://lore.kernel.org/r/20240220-x1e80100-display-v4-4-971afd9de861@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-02-22drm/msm: mdss: Add X1E80100 supportAbel Vesa
Add support for MDSS on X1E80100. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579079/ Link: https://lore.kernel.org/r/20240220-x1e80100-display-v4-3-971afd9de861@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
generated by cgit v1.2.3 (git 2.46.0) at 2025-07-21 11:46:10 +0000