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path: root/drivers/phy/microchip/sparx5_serdes.c
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2024-10-22phy: lan969x-serdes: add support for lan969x serdes driverDaniel Machon
Add support for lan969x SERDES driver. Lan969x has ten 10G SERDES'es which share the same features and data rates as the Sparx5 SERDES'es. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Link: https://lore.kernel.org/r/20240909-sparx5-lan969x-serdes-driver-v2-9-d695bcb57b84@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-10-22phy: sparx5-serdes: add support for branching on chip typeDaniel Machon
In preparation for lan969x, add a way to branch out on code that is to be executed on either Sparx5 or lan969x. Initially, this is required to branch out when checking the SERDES types and SERDES speeds, since the handling of these differ on the two platforms. This will also be used by the lan969x driver introduced in a subsequent patch. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Link: https://lore.kernel.org/r/20240909-sparx5-lan969x-serdes-driver-v2-7-d695bcb57b84@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-10-22phy: sparx5-serdes: add indirection layer to register macrosDaniel Machon
The register macros are used to read and write to the SERDES registers. The registers are largely the same on Sparx5 and lan969x, however some register target sizes differ. Therefore we introduce a new indirection to the register macros. The target sizes are looked up, using a mapping table (sparx5_serdes_tsize) that maps the register target to the register target size. With this addition, we can reuse all the existing macros for lan969x. Also the autogenerated macros are now formatted slightly different, to adhere to a 80 character limit. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Link: https://lore.kernel.org/r/20240909-sparx5-lan969x-serdes-driver-v2-6-d695bcb57b84@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-10-22phy: sparx5-serdes: add function for getting the CMU indexDaniel Machon
The SERDES to CMU mapping is different on Sparx5 and lan969x. Therefore create a function for getting the CMU index on Sparx5. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Link: https://lore.kernel.org/r/20240909-sparx5-lan969x-serdes-driver-v2-5-d695bcb57b84@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-10-22phy: sparx5-serdes: add ops to match dataDaniel Machon
We need to handle code differently in a few places. Add a struct: sparx5_serdes_ops for this purpose, and populate it a with function to set the SERDES type. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Link: https://lore.kernel.org/r/20240909-sparx5-lan969x-serdes-driver-v2-4-d695bcb57b84@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-10-22phy: sparx5-serdes: add constant for the number of CMU'sDaniel Machon
The number of CMU's differ for Sparx5 and lan969x, so add a new field: cmu_max and use it throughout. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Link: https://lore.kernel.org/r/20240909-sparx5-lan969x-serdes-driver-v2-3-d695bcb57b84@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-10-22phy: sparx5-serdes: add constants to match dataDaniel Machon
We need to handle a few different constants that differ for Sparx5 and lan969x. Add a new struct: sparx5_serdes_consts for this purpose. We populate it with an initial field for the number of SERDES'es: sd_max. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Link: https://lore.kernel.org/r/20240909-sparx5-lan969x-serdes-driver-v2-2-d695bcb57b84@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-10-22phy: sparx5-serdes: add support for private match dataDaniel Machon
In order to reuse the existing Sparx5 SERDES driver for lan969x, we add support for private match data, with initial fields for the iomap and imap_size. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Link: https://lore.kernel.org/r/20240909-sparx5-lan969x-serdes-driver-v2-1-d695bcb57b84@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-23phy: constify of_phandle_args in xlateKrzysztof Kozlowski
The xlate callbacks are supposed to translate of_phandle_args to proper provider without modifying the of_phandle_args. Make the argument pointer to const for code safety and readability. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> #Broadcom Link: https://lore.kernel.org/r/20240217093937.58234-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08phy: sparx5-serdes: add skip_cmu_cfg check when configuring lanesDaniel Machon
Add a check for skip_cmu_cfg when configuring the serdes lane. All individual serdeses are reset upon first configuration. Resetting the serdes involves reconfiguring it with preset values. The serdesmode is required to determine the clock-providing CMU, therefore make sure the serdes is not reconfigured if the serdesmode is not set. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Link: https://lore.kernel.org/r/20230417180335.2787494-8-daniel.machon@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08phy: sparx5-serdes: remove power up of all CMUsDaniel Machon
CMUs should not be powered up by default anymore, so remove responsible code. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Link: https://lore.kernel.org/r/20230417180335.2787494-7-daniel.machon@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08phy: sparx5-serdes: power on CMUs individuallyDaniel Machon
Power on the CMU instance, that provides the clock for the serdes, given the specified serdes mode and index. The CMU instance is looked up, using a preset map of serdes mode and index to CMU index. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Link: https://lore.kernel.org/r/20230417180335.2787494-6-daniel.machon@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08phy: sparx5-serdes: power down all CMUs by defaultDaniel Machon
All CMUs are powered up initially. This uses needless power. This patch makes sure all CMUs are powered down by default. This involves configuring a number reference clock and power-down registers of the CMU. Individual CMUs are later powered up, when the serdes lanes are configured. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Link: https://lore.kernel.org/r/20230417180335.2787494-5-daniel.machon@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08phy: sparx5-serdes: reorder CMU functionsDaniel Machon
Reorder CMU functions, as some of them are now required by the serdes functions. No functional changes. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Link: https://lore.kernel.org/r/20230417180335.2787494-4-daniel.machon@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08phy: sparx5-serdes: configure optimal quiet mode for serdes lanesDaniel Machon
All the serdes lanes of the sparx5 will transition between normal mode and quiet mode, depending on activity. Make sure that the quiet mode is configured optimally for all lanes initially. Although not much, this will save a small amount of power. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Link: https://lore.kernel.org/r/20230417180335.2787494-3-daniel.machon@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26phy: Sparx5 Eth SerDes: Fix return value check in sparx5_serdes_probe()Yang Yingliang
In case of error, the function devm_ioremap() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Fixes: 2ff8a1eeb5aa ("phy: Add Sparx5 ethernet serdes PHY driver") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20210909072149.2934047-1-yangyingliang@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-06-03phy: Sparx5 Eth SerDes: check return value after calling platform_get_resource()Yang Yingliang
It will cause null-ptr-deref if platform_get_resource() returns NULL, we need check the return value. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20210603051014.2674744-1-yangyingliang@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-04-06phy: fix resource_size.cocci warningskernel test robot
drivers/phy/microchip/sparx5_serdes.c:2440:54-57: ERROR: Missing resource_size with iores Use resource_size function on resource object instead of explicit computation. Generated by: scripts/coccinelle/api/resource_size.cocci Fixes: 2ff8a1eeb5aa ("phy: Add Sparx5 ethernet serdes PHY driver") CC: Steen Hegelund <steen.hegelund@microchip.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20210318232844.GA65886@63b0c5462fda Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-04-06phy: Sparx5 Eth SerDes: Use direct register operationsSteen Hegelund
Use direct register operations instead of a table of register information to lower the stack usage. Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20210329141309.612459-2-steen.hegelund@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-17phy: Add Sparx5 ethernet serdes PHY driverSteen Hegelund
Add the Microchip Sparx5 ethernet serdes PHY driver for the 6G, 10G and 25G interfaces available in the Sparx5 SoC. Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com> Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20210218161451.3489955-4-steen.hegelund@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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