// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for the RZN1D-DB Board * * Copyright (C) 2018 Renesas Electronics Europe Limited * */ /dts-v1/; #include #include #include #include #include "r9a06g032.dtsi" / { model = "RZN1D-DB Board"; compatible = "renesas,rzn1d400-db", "renesas,r9a06g032"; chosen { stdout-path = "serial0:115200n8"; }; aliases { serial0 = &uart0; }; keyboard { compatible = "gpio-keys-polled"; poll-interval = <100>; switch-1 { linux,code = ; label = "SW1-1"; debounce-interval = <20>; gpios = <&pca9698 8 GPIO_ACTIVE_LOW>; }; switch-2 { linux,code = ; label = "SW1-2"; debounce-interval = <20>; gpios = <&pca9698 9 GPIO_ACTIVE_LOW>; }; switch-3 { linux,code = ; label = "SW1-3"; debounce-interval = <20>; gpios = <&pca9698 10 GPIO_ACTIVE_LOW>; }; switch-4 { linux,code = ; label = "SW1-4"; debounce-interval = <20>; gpios = <&pca9698 11 GPIO_ACTIVE_LOW>; }; switch-5 { linux,code = ; label = "SW1-5"; debounce-interval = <20>; gpios = <&pca9698 12 GPIO_ACTIVE_LOW>; }; switch-6 { linux,code = ; label = "SW1-6"; debounce-interval = <20>; gpios = <&pca9698 13 GPIO_ACTIVE_LOW>; }; switch-7 { linux,code = ; label = "SW1-7"; debounce-interval = <20>; gpios = <&pca9698 14 GPIO_ACTIVE_LOW>; }; switch-8 { linux,code = ; label = "SW1-8"; debounce-interval = <20>; gpios = <&pca9698 15 GPIO_ACTIVE_LOW>; }; }; }; &can0 { pinctrl-0 = <&pins_can0>; pinctrl-names = "default"; /* Assuming CN10/CN11 are wired for CAN1 */ status = "okay"; }; &can1 { pinctrl-0 = <&pins_can1>; pinctrl-names = "default"; /* Please only enable can0 or can1, depending on CN10/CN11 */ /* status = "okay"; */ }; ð_miic { status = "okay"; renesas,miic-switch-portin = ; }; &gmac2 { status = "okay"; phy-mode = "gmii"; fixed-link { speed = <1000>; full-duplex; }; }; &i2c2 { pinctrl-0 = <&pins_i2c2>; pinctrl-names = "default"; status = "okay"; clock-frequency = <400000>; pca9698: gpio@20 { compatible = "nxp,pca9698"; reg = <0x20>; gpio-controller; #gpio-cells = <2>; /* configure the analog switch to let i2c2 access the eeprom */ max4662-in1-hog { gpio-hog; gpios = <16 0>; output-high; }; max4662-in2-hog { gpio-hog; gpios = <17 0>; output-low; }; max4662-in3-hog { gpio-hog; gpios = <18 0>; output-low; }; }; /* Some revisions may have a 24cs64 at address 0x58 */ eeprom@50 { compatible = "atmel,24c64"; pagesize = <32>; reg = <0x50>; }; }; &mii_conv4 { renesas,miic-input = ; status = "okay"; }; &mii_conv5 { renesas,miic-input = ; status = "okay"; }; &pinctrl { pinctrl-names = "default"; pinctrl-0 = <&pins_cpld>; pins_can0: pins_can0 { pinmux = , /* CAN0_TXD */ ; /* CAN0_RXD */ drive-strength = <6>; }; pins_can1: pins_can1 { pinmux = , /* CAN1_TXD */ ; /* CAN1_RXD */ drive-strength = <6>; }; pins_cpld: pins-cpld { pinmux = , , , ; }; pins_eth3: pins_eth3 { pinmux = , , , , , , , , , , , ; drive-strength = <6>; bias-disable; }; pins_eth4: pins_eth4 { pinmux = , , , , , , , , , , , ; drive-strength = <6>; bias-disable; }; pins_i2c2: pins_i2c2 { pinmux = , ; drive-strength = <12>; }; pins_mdio1: pins_mdio1 { pinmux = , ; }; }; &rtc0 { status = "okay"; }; &switch { status = "okay"; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pins_eth3>, <&pins_eth4>, <&pins_mdio1>; dsa,member = <0 0>; mdio { clock-frequency = <2500000>; #address-cells = <1>; #size-cells = <0>; switch0phy4: ethernet-phy@4 { reg = <4>; micrel,led-mode = <1>; }; switch0phy5: ethernet-phy@5 { reg = <5>; micrel,led-mode = <1>; }; }; }; &switch_port0 { label = "lan0"; phy-mode = "mii"; phy-handle = <&switch0phy5>; status = "okay"; }; &switch_port1 { label = "lan1"; phy-mode = "mii"; phy-handle = <&switch0phy4>; status = "okay"; }; &switch_port4 { status = "okay"; }; &uart0 { status = "okay"; }; &udc { status = "okay"; }; &wdt0 { timeout-sec = <60>; status = "okay"; };