diff options
| author | Rohit Khaire <rohit.khaire@amd.com> | 2021-06-04 11:32:42 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-06-04 16:02:50 -0400 |
| commit | cec7e80fbff58cdfd6595e7d11d7b2a38545c2e4 (patch) | |
| tree | 99c984824bad17e40c44c621048b86b5eeae3fb2 /drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | |
| parent | 18703923a66aecf6f7ded0e16d22eb412ddae72f (diff) | |
drm/amdgpu: Enable RLCG read/write interface for Sienna Cichlid
Enable this only for Sienna Cichild
since only Navi12 and Sienna Cichlid support SRIOV
Signed-off-by: Rohit Khaire <rohit.khaire@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index f70827af618e..29951c5c04ec 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c @@ -9213,7 +9213,6 @@ static void gfx_v10_0_set_rlc_funcs(struct amdgpu_device *adev) switch (adev->asic_type) { case CHIP_NAVI10: case CHIP_NAVI14: - case CHIP_SIENNA_CICHLID: case CHIP_NAVY_FLOUNDER: case CHIP_VANGOGH: case CHIP_DIMGREY_CAVEFISH: @@ -9221,6 +9220,7 @@ static void gfx_v10_0_set_rlc_funcs(struct amdgpu_device *adev) adev->gfx.rlc.funcs = &gfx_v10_0_rlc_funcs; break; case CHIP_NAVI12: + case CHIP_SIENNA_CICHLID: adev->gfx.rlc.funcs = &gfx_v10_0_rlc_funcs_sriov; break; default: |