diff options
| author | Tim Gore <tim.gore@intel.com> | 2016-07-20 11:00:25 +0100 |
|---|---|---|
| committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2016-07-21 14:48:00 +0100 |
| commit | 65fe29eeec71d3e50870c5048d2c79bc9a477a76 (patch) | |
| tree | af8507956fb73bba8ba4389bd578cf0272163c18 | |
| parent | f8ca0c07f68ba47f9c512019514af2922713b5ce (diff) | |
drm/i915:gen9: restrict WaC6DisallowByGfxPause
WaC6DisallowByGfxPause is currently applied unconditionally
but is not required in all revisions.
v2: extend application of workaround to agree with w/a
database, which differs from the HSD.
References: HSD#2133391
Signed-off-by: Tim Gore <tim.gore@intel.com>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1469008825-19442-1-git-send-email-tim.gore@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/intel_guc_loader.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c index a6a8fba7acd0..b883efd35e3f 100644 --- a/drivers/gpu/drm/i915/intel_guc_loader.c +++ b/drivers/gpu/drm/i915/intel_guc_loader.c @@ -349,7 +349,9 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv) } /* WaC6DisallowByGfxPause*/ - I915_WRITE(GEN6_GFXPAUSE, 0x30FFF); + if (IS_SKL_REVID(dev, 0, SKL_REVID_C0) || + IS_BXT_REVID(dev, 0, BXT_REVID_B0)) + I915_WRITE(GEN6_GFXPAUSE, 0x30FFF); if (IS_BROXTON(dev)) I915_WRITE(GEN9LP_GT_PM_CONFIG, GT_DOORBELL_ENABLE); |