diff options
39 files changed, 4252 insertions, 2331 deletions
diff --git a/drivers/base/regmap/internal.h b/drivers/base/regmap/internal.h index 348ff02eb93e..6483e0bda0cf 100644 --- a/drivers/base/regmap/internal.h +++ b/drivers/base/regmap/internal.h @@ -74,6 +74,7 @@ struct regmap { struct reg_default *reg_defaults; const void *reg_defaults_raw; void *cache; + bool cache_dirty; }; struct regcache_ops { diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c index 666f6f5011dc..6ab9f0384d82 100644 --- a/drivers/base/regmap/regcache.c +++ b/drivers/base/regmap/regcache.c @@ -241,6 +241,8 @@ int regcache_sync(struct regmap *map) map->cache_ops->name); name = map->cache_ops->name; trace_regcache_sync(map->dev, name, "start"); + if (!map->cache_dirty) + goto out; if (map->cache_ops->sync) { ret = map->cache_ops->sync(map); } else { @@ -291,6 +293,23 @@ void regcache_cache_only(struct regmap *map, bool enable) EXPORT_SYMBOL_GPL(regcache_cache_only); /** + * regcache_mark_dirty: Mark the register cache as dirty + * + * @map: map to mark + * + * Mark the register cache as dirty, for example due to the device + * having been powered down for suspend. If the cache is not marked + * as dirty then the cache sync will be suppressed. + */ +void regcache_mark_dirty(struct regmap *map) +{ + mutex_lock(&map->lock); + map->cache_dirty = true; + mutex_unlock(&map->lock); +} +EXPORT_SYMBOL_GPL(regcache_mark_dirty); + +/** * regcache_cache_bypass: Put a register map into cache bypass mode * * @map: map to configure diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c index bf441db1ee90..3aca18dbf367 100644 --- a/drivers/base/regmap/regmap.c +++ b/drivers/base/regmap/regmap.c @@ -306,8 +306,10 @@ int _regmap_write(struct regmap *map, unsigned int reg, ret = regcache_write(map, reg, val); if (ret != 0) return ret; - if (map->cache_only) + if (map->cache_only) { + map->cache_dirty = true; return 0; + } } trace_regmap_reg_write(map->dev, reg, val); diff --git a/include/linux/regmap.h b/include/linux/regmap.h index 690276a642cf..32043a9749e6 100644 --- a/include/linux/regmap.h +++ b/include/linux/regmap.h @@ -143,5 +143,6 @@ int regmap_update_bits(struct regmap *map, unsigned int reg, int regcache_sync(struct regmap *map); void regcache_cache_only(struct regmap *map, bool enable); void regcache_cache_bypass(struct regmap *map, bool enable); +void regcache_mark_dirty(struct regmap *map); #endif diff --git a/include/sound/soc.h b/include/sound/soc.h index 11cfb5953e06..02a5c5519f39 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -718,6 +718,9 @@ struct snd_soc_dai_link { /* Symmetry requirements */ unsigned int symmetric_rates:1; + /* pmdown_time is ignored at stop */ + unsigned int ignore_pmdown_time:1; + /* codec/machine specific init - e.g. add machine controls */ int (*init)(struct snd_soc_pcm_runtime *rtd); @@ -840,7 +843,7 @@ struct snd_soc_card { }; /* SoC machine DAI configuration, glues a codec and cpu DAI together */ -struct snd_soc_pcm_runtime { +struct snd_soc_pcm_runtime { struct device dev; struct snd_soc_card *card; struct snd_soc_dai_link *dai_link; diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 4584514d93d4..684cc1570689 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -26,6 +26,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_AK4642 if I2C select SND_SOC_AK4671 if I2C select SND_SOC_ALC5623 if I2C + select SND_SOC_ALC5632 if I2C select SND_SOC_CQ0093VC if MFD_DAVINCI_VOICECODEC select SND_SOC_CS42L51 if I2C select SND_SOC_CS4270 if I2C @@ -168,6 +169,8 @@ config SND_SOC_AK4671 config SND_SOC_ALC5623 tristate +config SND_SOC_ALC5632 + tristate config SND_SOC_CQ0093VC tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index a2c7842e357b..af64905f36ca 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -21,7 +21,9 @@ snd-soc-cx20442-objs := cx20442.o snd-soc-da7210-objs := da7210.o snd-soc-dfbmcs320-objs := dfbmcs320.o snd-soc-dmic-objs := dmic.o +snd-soc-jz4740-codec-objs := jz4740.o snd-soc-l3-objs := l3.o +snd-soc-lm4857-objs := lm4857.o snd-soc-max98088-objs := max98088.o snd-soc-max98095-objs := max98095.o snd-soc-max9850-objs := max9850.o @@ -29,6 +31,7 @@ snd-soc-pcm3008-objs := pcm3008.o snd-soc-rt5631-objs := rt5631.o snd-soc-sgtl5000-objs := sgtl5000.o snd-soc-alc5623-objs := alc5623.o +snd-soc-alc5632-objs := alc5632.o snd-soc-sn95031-objs := sn95031.o snd-soc-spdif-objs := spdif_transciever.o snd-soc-ssm2602-objs := ssm2602.o @@ -88,10 +91,8 @@ snd-soc-wm9705-objs := wm9705.o snd-soc-wm9712-objs := wm9712.o snd-soc-wm9713-objs := wm9713.o snd-soc-wm-hubs-objs := wm_hubs.o -snd-soc-jz4740-codec-objs := jz4740.o # Amp -snd-soc-lm4857-objs := lm4857.o snd-soc-max9877-objs := max9877.o snd-soc-tpa6130a2-objs := tpa6130a2.o snd-soc-wm2000-objs := wm2000.o @@ -113,6 +114,7 @@ obj-$(CONFIG_SND_SOC_AK4641) += snd-soc-ak4641.o obj-$(CONFIG_SND_SOC_AK4642) += snd-soc-ak4642.o obj-$(CONFIG_SND_SOC_AK4671) += snd-soc-ak4671.o obj-$(CONFIG_SND_SOC_ALC5623) += snd-soc-alc5623.o +obj-$(CONFIG_SND_SOC_ALC5632) += snd-soc-alc5632.o obj-$(CONFIG_SND_SOC_CQ0093VC) += snd-soc-cq93vc.o obj-$(CONFIG_SND_SOC_CS42L51) += snd-soc-cs42l51.o obj-$(CONFIG_SND_SOC_CS4270) += snd-soc-cs4270.o @@ -122,6 +124,7 @@ obj-$(CONFIG_SND_SOC_DA7210) += snd-soc-da7210.o obj-$(CONFIG_SND_SOC_DFBMCS320) += snd-soc-dfbmcs320.o obj-$(CONFIG_SND_SOC_DMIC) += snd-soc-dmic.o obj-$(CONFIG_SND_SOC_L3) += snd-soc-l3.o +obj-$(CONFIG_SND_SOC_LM4857) += snd-soc-lm4857.o obj-$(CONFIG_SND_SOC_JZ4740_CODEC) += snd-soc-jz4740-codec.o obj-$(CONFIG_SND_SOC_MAX98088) += snd-soc-max98088.o obj-$(CONFIG_SND_SOC_MAX98095) += snd-soc-max98095.o @@ -190,7 +193,6 @@ obj-$(CONFIG_SND_SOC_WM9713) += snd-soc-wm9713.o obj-$(CONFIG_SND_SOC_WM_HUBS) += snd-soc-wm-hubs.o # Amp -obj-$(CONFIG_SND_SOC_LM4857) += snd-soc-lm4857.o obj-$(CONFIG_SND_SOC_MAX9877) += snd-soc-max9877.o obj-$(CONFIG_SND_SOC_TPA6130A2) += snd-soc-tpa6130a2.o obj-$(CONFIG_SND_SOC_WM2000) += snd-soc-wm2000.o diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c index 12c1bdef6732..b854eb0e6ad1 100644 --- a/sound/soc/codecs/ak4642.c +++ b/sound/soc/codecs/ak4642.c @@ -18,7 +18,7 @@ * This is very simple driver. * It can use headphone output / stereo input only * - * AK4642 is not tested. + * AK4642 is tested. * AK4643 is tested. */ diff --git a/sound/soc/codecs/alc5632.c b/sound/soc/codecs/alc5632.c new file mode 100644 index 000000000000..ee6a497b5e71 --- /dev/null +++ b/sound/soc/codecs/alc5632.c @@ -0,0 +1,1153 @@ +/* +* alc5632.c -- ALC5632 ALSA SoC Audio Codec +* +* Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.lauchpad.net> +* +* Authors: Leon Romanovsky <leon@leon.nu> +* Andrey Danin <danindrey@mail.ru> +* Ilya Petrov <ilya.muromec@gmail.com> +* Marc Dietrich <marvin24@gmx.de> +* +* Based on alc5623.c by Arnaud Patard +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +*/ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pm.h> +#include <linux/i2c.h> +#include <linux/slab.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/tlv.h> +#include <sound/soc.h> +#include <sound/initval.h> + +#include "alc5632.h" + +/* + * ALC5632 register cache + */ +static const u16 alc5632_reg_defaults[] = { + 0x59B4, 0x0000, 0x8080, 0x0000, /* 0 */ + 0x8080, 0x0000, 0x8080, 0x0000, /* 4 */ + 0xC800, 0x0000, 0xE808, 0x0000, /* 8 */ + 0x1010, 0x0000, 0x0808, 0x0000, /* 12 */ + 0xEE0F, 0x0000, 0xCBCB, 0x0000, /* 16 */ + 0x7F7F, 0x0000, 0x0000, 0x0000, /* 20 */ + 0xE010, 0x0000, 0x0000, 0x0000, /* 24 */ + 0x8008, 0x0000, 0x0000, 0x0000, /* 28 */ + 0x0000, 0x0000, 0x0000, 0x0000, /* 32 */ + 0x00C0, 0x0000, 0xEF00, 0x0000, /* 36 */ + 0x0000, 0x0000, 0x0000, 0x0000, /* 40 */ + 0x0000, 0x0000, 0x0000, 0x0000, /* 44 */ + 0x0000, 0x0000, 0x0000, 0x0000, /* 48 */ + 0x8000, 0x0000, 0x0000, 0x0000, /* 52 */ + 0x0000, 0x0000, 0x0000, 0x0000, /* 56 */ + 0x0000, 0x0000, 0x8000, 0x0000, /* 60 */ + 0x0C0A, 0x0000, 0x0000, 0x0000, /* 64 */ + 0x0000, 0x0000, 0x0000, 0x0000, /* 68 */ + 0x0000, 0x0000, 0x0000, 0x0000, /* 72 */ + 0xBE3E, 0x0000, 0xBE3E, 0x0000, /* 76 */ + 0x0000, 0x0000, 0x0000, 0x0000, /* 80 */ + 0x803A, 0x0000, 0x0000, 0x0000, /* 84 */ + 0x0000, 0x0000, 0x0009, 0x0000, /* 88 */ + 0x0000, 0x0000, 0x3000, 0x0000, /* 92 */ + 0x3075, 0x0000, 0x1010, 0x0000, /* 96 */ + 0x3110, 0x0000, 0x0000, 0x0000, /* 100 */ + 0x0553, 0x0000, 0x0000, 0x0000, /* 104 */ + 0x0000, 0x0000, 0x0000, 0x0000, /* 108 */ +}; + +/* codec private data */ +struct alc5632_priv { + enum snd_soc_control_type control_type; + void *control_data; + struct mutex mutex; + u8 id; + unsigned int sysclk; +}; + +static int alc5632_volatile_register(struct snd_soc_codec *codec, + unsigned int reg) +{ + switch (reg) { + case ALC5632_RESET: + case ALC5632_PWR_DOWN_CTRL_STATUS: + case ALC5632_GPIO_PIN_STATUS: + case ALC5632_OVER_CURR_STATUS: + case ALC5632_HID_CTRL_DATA: + case ALC5632_EQ_CTRL: + return 1; + + default: + break; + } + + return 0; +} + +static inline int alc5632_reset(struct snd_soc_codec *codec) +{ + snd_soc_write(codec, ALC5632_RESET, 0); + return snd_soc_read(codec, ALC5632_RESET); +} + +static int amp_mixer_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + /* to power-on/off class-d amp generators/speaker */ + /* need to write to 'index-46h' register : */ + /* so write index num (here 0x46) to reg 0x6a */ + /* and then 0xffff/0 to reg 0x6c */ + snd_soc_write(w->codec, ALC5632_HID_CTRL_INDEX, 0x46); + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + snd_soc_write(w->codec, ALC5632_HID_CTRL_DATA, 0xFFFF); + break; + case SND_SOC_DAPM_POST_PMD: + snd_soc_write(w->codec, ALC5632_HID_CTRL_DATA, 0); + break; + } + + return 0; +} + +/* + * ALC5632 Controls + */ + +/* -34.5db min scale, 1.5db steps, no mute */ +static const DECLARE_TLV_DB_SCALE(vol_tlv, -3450, 150, 0); +/* -46.5db min scale, 1.5db steps, no mute */ +static const DECLARE_TLV_DB_SCALE(hp_tlv, -4650, 150, 0); +/* -16.5db min scale, 1.5db steps, no mute */ +static const DECLARE_TLV_DB_SCALE(adc_rec_tlv, -1650, 150, 0); +static const unsigned int boost_tlv[] = { + TLV_DB_RANGE_HEAD(3), + 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), + 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), + 2, 2, TLV_DB_SCALE_ITEM(3000, 0, 0), +}; +/* 0db min scale, 6 db steps, no mute */ +static const DECLARE_TLV_DB_SCALE(dig_tlv, 0, 600, 0); +/* 0db min scalem 0.75db steps, no mute */ +static const DECLARE_TLV_DB_SCALE(vdac_tlv, -3525, 075, 0); + +static const struct snd_kcontrol_new alc5632_vol_snd_controls[] = { + /* left starts at bit 8, right at bit 0 */ + /* 31 steps (5 bit), -46.5db scale */ + SOC_DOUBLE_TLV("Line Playback Volume", + ALC5632_SPK_OUT_VOL, 8, 0, 31, 1, hp_tlv), + /* bit 15 mutes left, bit 7 right */ + SOC_DOUBLE("Line Playback Switch", + ALC5632_SPK_OUT_VOL, 15, 7, 1, 1), + SOC_DOUBLE_TLV("Headphone Playback Volume", + ALC5632_HP_OUT_VOL, 8, 0, 31, 1, hp_tlv), + SOC_DOUBLE("Headphone Playback Switch", + ALC5632_HP_OUT_VOL, 15, 7, 1, 1), +}; + +static const struct snd_kcontrol_new alc5632_snd_controls[] = { + SOC_DOUBLE_TLV("Auxout Playback Volume", + ALC5632_AUX_OUT_VOL, 8, 0, 31, 1, hp_tlv), + SOC_DOUBLE("Auxout Playback Switch", + ALC5632_AUX_OUT_VOL, 15, 7, 1, 1), + SOC_SINGLE_TLV("Voice DAC Playback Volume", + ALC5632_VOICE_DAC_VOL, 0, 63, 0, vdac_tlv), + SOC_SINGLE_TLV("Phone Capture Volume", + ALC5632_PHONE_IN_VOL, 8, 31, 1, vol_tlv), + SOC_DOUBLE_TLV("LineIn Capture Volume", + ALC5632_LINE_IN_VOL, 8, 0, 31, 1, vol_tlv), + SOC_DOUBLE_TLV("Stereo DAC Playback Volume", + ALC5632_STEREO_DAC_IN_VOL, 8, 0, 63, 1, vdac_tlv), + SOC_DOUBLE("Stereo DAC Playback Switch", + ALC5632_STEREO_DAC_IN_VOL, 15, 7, 1, 1), + SOC_SINGLE_TLV("Mic1 Capture Volume", + ALC5632_MIC_VOL, 8, 31, 1, vol_tlv), + SOC_SINGLE_TLV("Mic2 Capture Volume", + ALC5632_MIC_VOL, 0, 31, 1, vol_tlv), + SOC_DOUBLE_TLV("Rec Capture Volume", + ALC5632_ADC_REC_GAIN, 8, 0, 31, 0, adc_rec_tlv), + SOC_SINGLE_TLV("Mic 1 Boost Volume", + ALC5632_MIC_CTRL, 10, 2, 0, boost_tlv), + SOC_SINGLE_TLV("Mic 2 Boost Volume", + ALC5632_MIC_CTRL, 8, 2, 0, boost_tlv), + SOC_SINGLE_TLV("Digital Boost Volume", + ALC5632_DIGI_BOOST_CTRL, 0, 7, 0, dig_tlv), +}; + +/* + * DAPM Controls + */ +static const struct snd_kcontrol_new alc5632_hp_mixer_controls[] = { +SOC_DAPM_SINGLE("LI2HP Playback Switch", ALC5632_LINE_IN_VOL, 15, 1, 1), +SOC_DAPM_SINGLE("PHONE2HP Playback Switch", ALC5632_PHONE_IN_VOL, 15, 1, 1), +SOC_DAPM_SINGLE("MIC12HP Playback Switch", ALC5632_MIC_ROUTING_CTRL, 15, 1, 1), +SOC_DAPM_SINGLE("MIC22HP Playback Switch", ALC5632_MIC_ROUTING_CTRL, 11, 1, 1), +SOC_DAPM_SINGLE("VOICE2HP Playback Switch", ALC5632_VOICE_DAC_VOL, 15, 1, 1), +}; + +static const struct snd_kcontrol_new alc5632_hpl_mixer_controls[] = { +SOC_DAPM_SINGLE("ADC2HP_L Playback Switch", ALC5632_ADC_REC_GAIN, 15, 1, 1), +SOC_DAPM_SINGLE("DACL2HP Playback Switch", ALC5632_MIC_ROUTING_CTRL, 3, 1, 1), +}; + +static const struct snd_kcontrol_new alc5632_hpr_mixer_controls[] = { +SOC_DAPM_SINGLE("ADC2HP_R Playback Switch", ALC5632_ADC_REC_GAIN, 7, 1, 1), +SOC_DAPM_SINGLE("DACR2HP Playback Switch", ALC5632_MIC_ROUTING_CTRL, 2, 1, 1), +}; + +static const struct snd_kcontrol_new alc5632_mono_mixer_controls[] = { +SOC_DAPM_SINGLE("ADC2MONO_L Playback Switch", ALC5632_ADC_REC_GAIN, 14, 1, 1), +SOC_DAPM_SINGLE("ADC2MONO_R Playback Switch", ALC5632_ADC_REC_GAIN, 6, 1, 1), +SOC_DAPM_SINGLE("LI2MONO Playback Switch", ALC5632_LINE_IN_VOL, 13, 1, 1), +SOC_DAPM_SINGLE("MIC12MONO Playback Switch", + ALC5632_MIC_ROUTING_CTRL, 13, 1, 1), +SOC_DAPM_SINGLE("MIC22MONO Playback Switch", + ALC5632_MIC_ROUTING_CTRL, 9, 1, 1), +SOC_DAPM_SINGLE("DAC2MONO Playback Switch", ALC5632_MIC_ROUTING_CTRL, 0, 1, 1), +SOC_DAPM_SINGLE("VOICE2MONO Playback Switch", ALC5632_VOICE_DAC_VOL, 13, 1, 1), +}; + +static const struct snd_kcontrol_new alc5632_speaker_mixer_controls[] = { +SOC_DAPM_SINGLE("LI2SPK Playback Switch", ALC5632_LINE_IN_VOL, 14, 1, 1), +SOC_DAPM_SINGLE("PHONE2SPK Playback Switch", ALC5632_PHONE_IN_VOL, 14, 1, 1), +SOC_DAPM_SINGLE("MIC12SPK Playback Switch", + ALC5632_MIC_ROUTING_CTRL, 14, 1, 1), +SOC_DAPM_SINGLE("MIC22SPK Playback Switch", + ALC5632_MIC_ROUTING_CTRL, 10, 1, 1), +SOC_DAPM_SINGLE("DAC2SPK Playback Switch", ALC5632_MIC_ROUTING_CTRL, 1, 1, 1), +SOC_DAPM_SINGLE("VOICE2SPK Playback Switch", ALC5632_VOICE_DAC_VOL, 14, 1, 1), +}; + +/* Left Record Mixer */ +static const struct snd_kcontrol_new alc5632_captureL_mixer_controls[] = { +SOC_DAPM_SINGLE("Mic1 Capture Switch", ALC5632_ADC_REC_MIXER, 14, 1, 1), +SOC_DAPM_SINGLE("Mic2 Capture Switch", ALC5632_ADC_REC_MIXER, 13, 1, 1), +SOC_DAPM_SINGLE("LineInL Capture Switch", ALC5632_ADC_REC_MIXER, 12, 1, 1), +SOC_DAPM_SINGLE("Left Phone Capture Switch", ALC5632_ADC_REC_MIXER, 11, 1, 1), +SOC_DAPM_SINGLE("HPMixerL Capture Switch", ALC5632_ADC_REC_MIXER, 10, 1, 1), +SOC_DAPM_SINGLE("SPKMixer Capture Switch", ALC5632_ADC_REC_MIXER, 9, 1, 1), +SOC_DAPM_SINGLE("MonoMixer Capture Switch", ALC5632_ADC_REC_MIXER, 8, 1, 1), +}; + +/* Right Record Mixer */ +static const struct snd_kcontrol_new alc5632_captureR_mixer_controls[] = { +SOC_DAPM_SINGLE("Mic1 Capture Switch", ALC5632_ADC_REC_MIXER, 6, 1, 1), +SOC_DAPM_SINGLE("Mic2 Capture Switch", ALC5632_ADC_REC_MIXER, 5, 1, 1), +SOC_DAPM_SINGLE("LineInR Capture Switch", ALC5632_ADC_REC_MIXER, 4, 1, 1), +SOC_DAPM_SINGLE("Right Phone Capture Switch", ALC5632_ADC_REC_MIXER, 3, 1, 1), +SOC_DAPM_SINGLE("HPMixerR Capture Switch", ALC5632_ADC_REC_MIXER, 2, 1, 1), +SOC_DAPM_SINGLE("SPKMixer Capture Switch", ALC5632_ADC_REC_MIXER, 1, 1, 1), +SOC_DAPM_SINGLE("MonoMixer Capture Switch", ALC5632_ADC_REC_MIXER, 0, 1, 1), +}; + +static const char *alc5632_spk_n_sour_sel[] = { + "RN/-R", "RP/+R", "LN/-R", "Mute"}; +static const char *alc5632_hpl_out_input_sel[] = { + "Vmid", "HP Left Mix"}; +static const char *alc5632_hpr_out_input_sel[] = { + "Vmid", "HP Right Mix"}; +static const char *alc5632_spkout_input_sel[] = { + "Vmid", "HPOut Mix", "Speaker Mix", "Mono Mix"}; +static const char *alc5632_aux_out_input_sel[] = { + "Vmid", "HPOut Mix", "Speaker Mix", "Mono Mix"}; + +/* auxout output mux */ +static const struct soc_enum alc5632_aux_out_input_enum = +SOC_ENUM_SINGLE(ALC5632_OUTPUT_MIXER_CTRL, 6, 4, alc5632_aux_out_input_sel); +static const struct snd_kcontrol_new alc5632_auxout_mux_controls = +SOC_DAPM_ENUM("AuxOut Mux", alc5632_aux_out_input_enum); + +/* speaker output mux */ +static const struct soc_enum alc5632_spkout_input_enum = +SOC_ENUM_SINGLE(ALC5632_OUTPUT_MIXER_CTRL, 10, 4, alc5632_spkout_input_sel); +static const struct snd_kcontrol_new alc5632_spkout_mux_controls = +SOC_DAPM_ENUM("SpeakerOut Mux", alc5632_spkout_input_enum); + +/* headphone left output mux */ +static const struct soc_enum alc5632_hpl_out_input_enum = +SOC_ENUM_SINGLE(ALC5632_OUTPUT_MIXER_CTRL, 9, 2, alc5632_hpl_out_input_sel); +static const struct snd_kcontrol_new alc5632_hpl_out_mux_controls = +SOC_DAPM_ENUM("Left Headphone Mux", alc5632_hpl_out_input_enum); + +/* headphone right output mux */ +static const struct soc_enum alc5632_hpr_out_input_enum = +SOC_ENUM_SINGLE(ALC5632_OUTPUT_MIXER_CTRL, 8, 2, alc5632_hpr_out_input_sel); +static const struct snd_kcontrol_new alc5632_hpr_out_mux_controls = +SOC_DAPM_ENUM("Right Headphone Mux", alc5632_hpr_out_input_enum); + +/* speaker output N select */ +static const struct soc_enum alc5632_spk_n_sour_enum = +SOC_ENUM_SINGLE(ALC5632_OUTPUT_MIXER_CTRL, 14, 4, alc5632_spk_n_sour_sel); +static const struct snd_kcontrol_new alc5632_spkoutn_mux_controls = +SOC_DAPM_ENUM("SpeakerOut N Mux", alc5632_spk_n_sour_enum); + +/* speaker amplifier */ +static const char *alc5632_amp_names[] = {"AB Amp", "D Amp"}; +static const struct soc_enum alc5632_amp_enum = + SOC_ENUM_SINGLE(ALC5632_OUTPUT_MIXER_CTRL, 13, 2, alc5632_amp_names); +static const struct snd_kcontrol_new alc5632_amp_mux_controls = + SOC_DAPM_ENUM("AB-D Amp Mux", alc5632_amp_enum); + + +static const struct snd_soc_dapm_widget alc5632_dapm_widgets[] = { +/* Muxes */ +SND_SOC_DAPM_MUX("AuxOut Mux", SND_SOC_NOPM, 0, 0, + &alc5632_auxout_mux_controls), +SND_SOC_DAPM_MUX("SpeakerOut Mux", SND_SOC_NOPM, 0, 0, + &alc5632_spkout_mux_controls), +SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0, + &alc5632_hpl_out_mux_controls), +SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0, + &alc5632_hpr_out_mux_controls), +SND_SOC_DAPM_MUX("SpeakerOut N Mux", SND_SOC_NOPM, 0, 0, + &alc5632_spkoutn_mux_controls), + +/* output mixers */ +SND_SOC_DAPM_MIXER("HP Mix", SND_SOC_NOPM, 0, 0, + &alc5632_hp_mixer_controls[0], + ARRAY_SIZE(alc5632_hp_mixer_controls)), +SND_SOC_DAPM_MIXER("HPR Mix", ALC5632_PWR_MANAG_ADD2, 4, 0, + &alc5632_hpr_mixer_controls[0], + ARRAY_SIZE(alc5632_hpr_mixer_controls)), +SND_SOC_DAPM_MIXER("HPL Mix", ALC5632_PWR_MANAG_ADD2, 5, 0, + &alc5632_hpl_mixer_controls[0], + ARRAY_SIZE(alc5632_hpl_mixer_controls)), +SND_SOC_DAPM_MIXER("HPOut Mix", SND_SOC_NOPM, 0, 0, NULL, 0), +SND_SOC_DAPM_MIXER("Mono Mix", ALC5632_PWR_MANAG_ADD2, 2, 0, + &alc5632_mono_mixer_controls[0], + ARRAY_SIZE(alc5632_mono_mixer_controls)), +SND_SOC_DAPM_MIXER("Speaker Mix", ALC5632_PWR_MANAG_ADD2, 3, 0, + &alc5632_speaker_mixer_controls[0], + ARRAY_SIZE(alc5632_speaker_mixer_controls)), + +/* input mixers */ +SND_SOC_DAPM_MIXER("Left Capture Mix", ALC5632_PWR_MANAG_ADD2, 1, 0, + &alc5632_captureL_mixer_controls[0], + ARRAY_SIZE(alc5632_captureL_mixer_controls)), +SND_SOC_DAPM_MIXER("Right Capture Mix", ALC5632_PWR_MANAG_ADD2, 0, 0, + &alc5632_captureR_mixer_controls[0], + ARRAY_SIZE(alc5632_captureR_mixer_controls)), + +SND_SOC_DAPM_DAC("Left DAC", "HiFi Playback", + ALC5632_PWR_MANAG_ADD2, 9, 0), +SND_SOC_DAPM_DAC("Right DAC", "HiFi Playback", + ALC5632_PWR_MANAG_ADD2, 8, 0), +SND_SOC_DAPM_MIXER("DAC Left Channel", ALC5632_PWR_MANAG_ADD1, 15, 0, NULL, 0), +SND_SOC_DAPM_MIXER("DAC Right Channel", + ALC5632_PWR_MANAG_ADD1, 14, 0, NULL, 0), +SND_SOC_DAPM_MIXER("I2S Mix", ALC5632_PWR_MANAG_ADD1, 11, 0, NULL, 0), +SND_SOC_DAPM_MIXER("Phone Mix", SND_SOC_NOPM, 0, 0, NULL, 0), +SND_SOC_DAPM_MIXER("Line Mix", SND_SOC_NOPM, 0, 0, NULL, 0), +SND_SOC_DAPM_ADC("Left ADC", "HiFi Capture", + ALC5632_PWR_MANAG_ADD2, 7, 0), +SND_SOC_DAPM_ADC("Right ADC", "HiFi Capture", + ALC5632_PWR_MANAG_ADD2, 6, 0), +SND_SOC_DAPM_PGA("Left Headphone", ALC5632_PWR_MANAG_ADD3, 11, 0, NULL, 0), +SND_SOC_DAPM_PGA("Right Headphone", ALC5632_PWR_MANAG_ADD3, 10, 0, NULL, 0), +SND_SOC_DAPM_PGA("Left Speaker", ALC5632_PWR_MANAG_ADD3, 13, 0, NULL, 0), +SND_SOC_DAPM_PGA("Right Speaker", ALC5632_PWR_MANAG_ADD3, 12, 0, NULL, 0), +SND_SOC_DAPM_PGA("Aux Out", ALC5632_PWR_MANAG_ADD3, 14, 0, NULL, 0), +SND_SOC_DAPM_PGA("Left LineIn", ALC5632_PWR_MANAG_ADD3, 7, 0, NULL, 0), +SND_SOC_DAPM_PGA("Right LineIn", ALC5632_PWR_MANAG_ADD3, 6, 0, NULL, 0), +SND_SOC_DAPM_PGA("Phone", ALC5632_PWR_MANAG_ADD3, 5, 0, NULL, 0), +SND_SOC_DAPM_PGA("Phone ADMix", ALC5632_PWR_MANAG_ADD3, 4, 0, NULL, 0), +SND_SOC_DAPM_PGA("MIC1 PGA", ALC5632_PWR_MANAG_ADD3, 3, 0, NULL, 0), +SND_SOC_DAPM_PGA("MIC2 PGA", ALC5632_PWR_MANAG_ADD3, 2, 0, NULL, 0), +SND_SOC_DAPM_PGA("MIC1 Pre Amp", ALC5632_PWR_MANAG_ADD3, 1, 0, NULL, 0), +SND_SOC_DAPM_PGA("MIC2 Pre Amp", ALC5632_PWR_MANAG_ADD3, 0, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("Mic Bias1", ALC5632_PWR_MANAG_ADD1, 3, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("Mic Bias2", ALC5632_PWR_MANAG_ADD1, 2, 0, NULL, 0), + +SND_SOC_DAPM_PGA_E("D Amp", ALC5632_PWR_MANAG_ADD2, 14, 0, NULL, 0, + amp_mixer_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), +SND_SOC_DAPM_PGA("AB Amp", ALC5632_PWR_MANAG_ADD2, 15, 0, NULL, 0), +SND_SOC_DAPM_MUX("AB-D Amp Mux", ALC5632_PWR_MANAG_ADD1, 10, 0, + &alc5632_amp_mux_controls), + +SND_SOC_DAPM_OUTPUT("AUXOUT"), +SND_SOC_DAPM_OUTPUT("HPL"), +SND_SOC_DAPM_OUTPUT("HPR"), +SND_SOC_DAPM_OUTPUT("SPKOUT"), +SND_SOC_DAPM_OUTPUT("SPKOUTN"), +SND_SOC_DAPM_INPUT("LINEINL"), +SND_SOC_DAPM_INPUT("LINEINR"), +SND_SOC_DAPM_INPUT("PHONEP"), +SND_SOC_DAPM_INPUT("PHONEN"), +SND_SOC_DAPM_INPUT("MIC1"), +SND_SOC_DAPM_INPUT("MIC2"), +SND_SOC_DAPM_VMID("Vmid"), +}; + + +static const struct snd_soc_dapm_route alc5632_dapm_routes[] = { + /* virtual mixer - mixes left & right channels */ + {"I2S Mix", NULL, "Left DAC"}, + {"I2S Mix", NULL, "Right DAC"}, + {"Line Mix", NULL, "Right LineIn"}, + {"Line Mix", NULL, "Left LineIn"}, + {"Phone Mix", NULL, "Phone"}, + {"Phone Mix", NULL, "Phone ADMix"}, + {"AUXOUT", NULL, "Aux Out"}, + + /* DAC */ + {"DAC Right Channel", NULL, "I2S Mix"}, + {"DAC Left Channel", NULL, "I2S Mix"}, + + /* HP mixer */ + {"HPL Mix", "ADC2HP_L Playback Switch", "Left Capture Mix"}, + {"HPL Mix", NULL, "HP Mix"}, + {"HPR Mix", "ADC2HP_R Playback Switch", "Right Capture Mix"}, + {"HPR Mix", NULL, "HP Mix"}, + {"HP Mix", "LI2HP Playback Switch", "Line Mix"}, + {"HP Mix", "PHONE2HP Playback Switch", "Phone Mix"}, + {"HP Mix", "MIC12HP Playback Switch", "MIC1 PGA"}, + {"HP Mix", "MIC22HP Playback Switch", "MIC2 PGA"}, + + {"HPR Mix", "DACR2HP Playback Switch", "DAC Right Channel"}, + {"HPL Mix", "DACL2HP Playback Switch", "DAC Left Channel"}, + + /* speaker mixer */ + {"Speaker Mix", "LI2SPK Playback Switch", "Line Mix"}, + {"Speaker Mix", "PHONE2SPK Playback Switch", "Phone Mix"}, + {"Speaker Mix", "MIC12SPK Playback Switch", "MIC1 PGA"}, + {"Speaker Mix", "MIC22SPK Playback Switch", "MIC2 PGA"}, + {"Speaker Mix", "DAC2SPK Playback Switch", "DAC Left Channel"}, + + + + /* mono mixer */ + {"Mono Mix", "ADC2MONO_L Playback Switch", "Left Capture Mix"}, + {"Mono Mix", "ADC2MONO_R Playback Switch", "Right Capture Mix"}, + {"Mono Mix", "LI2MONO Playback Switch", "Line Mix"}, + {"Mono Mix", "VOICE2MONO Playback Switch", "Phone Mix"}, + {"Mono Mix", "MIC12MONO Playback Switch", "MIC1 PGA"}, + {"Mono Mix", "MIC22MONO Playback Switch", "MIC2 PGA"}, + {"Mono Mix", "DAC2MONO Playback Switch", "DAC Left Channel"}, + + /* Left record mixer */ + {"Left Capture Mix", "LineInL Capture Switch", "LINEINL"}, + {"Left Capture Mix", "Left Phone Capture Switch", "PHONEN"}, + {"Left Capture Mix", "Mic1 Capture Switch", "MIC1 Pre Amp"}, + {"Left Capture Mix", "Mic2 Capture Switch", "MIC2 Pre Amp"}, + {"Left Capture Mix", "HPMixerL Capture Switch", "HPL Mix"}, + {"Left Capture Mix", "SPKMixer Capture Switch", "Speaker Mix"}, + {"Left Capture Mix", "MonoMixer Capture Switch", "Mono Mix"}, + + /*Right record mixer */ + {"Right Capture Mix", "LineInR Capture Switch", "LINEINR"}, + {"Right Capture Mix", "Right Phone Capture Switch", "PHONEP"}, + {"Right Capture Mix", "Mic1 Capture Switch", "MIC1 Pre Amp"}, + {"Right Capture Mix", "Mic2 Capture Switch", "MIC2 Pre Amp"}, + {"Right Capture Mix", "HPMixerR Capture Switch", "HPR Mix"}, + {"Right Capture Mix", "SPKMixer Capture Switch", "Speaker Mix"}, + {"Right Capture Mix", "MonoMixer Capture Switch", "Mono Mix"}, + + /* headphone left mux */ + {"Left Headphone Mux", "HP Left Mix", "HPL Mix"}, + {"Left Headphone Mux", "Vmid", "Vmid"}, + + /* headphone right mux */ + {"Right Headphone Mux", "HP Right Mix", "HPR Mix"}, + {"Right Headphone Mux", "Vmid", "Vmid"}, + + /* speaker out mux */ + {"SpeakerOut Mux", "Vmid", "Vmid"}, + {"SpeakerOut Mux", "HPOut Mix", "HPOut Mix"}, + {"SpeakerOut Mux", "Speaker Mix", "Speaker Mix"}, + {"SpeakerOut Mux", "Mono Mix", "Mono Mix"}, + + /* Mono/Aux Out mux */ + {"AuxOut Mux", "Vmid", "Vmid"}, + {"AuxOut Mux", "HPOut Mix", "HPOut Mix"}, + {"AuxOut Mux", "Speaker Mix", "Speaker Mix"}, + {"AuxOut Mux", "Mono Mix", "Mono Mix"}, + + /* output pga */ + {"HPL", NULL, "Left Headphone"}, + {"Left Headphone", NULL, "Left Headphone Mux"}, + {"HPR", NULL, "Right Headphone"}, + {"Right Headphone", NULL, "Right Headphone Mux"}, + {"Aux Out", NULL, "AuxOut Mux"}, + + /* input pga */ + {"Left LineIn", NULL, "LINEINL"}, + {"Right LineIn", NULL, "LINEINR"}, + {"Phone", NULL, "PHONEP"}, + {"MIC1 Pre Amp", NULL, "MIC1"}, + {"MIC2 Pre Amp", NULL, "MIC2"}, + {"MIC1 PGA", NULL, "MIC1 Pre Amp"}, + {"MIC2 PGA", NULL, "MIC2 Pre Amp"}, + + /* left ADC */ + {"Left ADC", NULL, "Left Capture Mix"}, + + /* right ADC */ + {"Right ADC", NULL, "Right Capture Mix"}, + + {"SpeakerOut N Mux", "RN/-R", "Left Speaker"}, + {"SpeakerOut N Mux", "RP/+R", "Left Speaker"}, + {"SpeakerOut N Mux", "LN/-R", "Left Speaker"}, + {"SpeakerOut N Mux", "Mute", "Vmid"}, + + {"SpeakerOut N Mux", "RN/-R", "Right Speaker"}, + {"SpeakerOut N Mux", "RP/+R", "Right Speaker"}, + {"SpeakerOut N Mux", "LN/-R", "Right Speaker"}, + {"SpeakerOut N Mux", "Mute", "Vmid"}, + + {"AB Amp", NULL, "SpeakerOut Mux"}, + {"D Amp", NULL, "SpeakerOut Mux"}, + {"AB-D Amp Mux", "AB Amp", "AB Amp"}, + {"AB-D Amp Mux", "D Amp", "D Amp"}, + {"Left Speaker", NULL, "AB-D Amp Mux"}, + {"Right Speaker", NULL, "AB-D Amp Mux"}, + + {"SPKOUT", NULL, "Left Speaker"}, + {"SPKOUT", NULL, "Right Speaker"}, + + {"SPKOUTN", NULL, "SpeakerOut N Mux"}, + +}; + +/* PLL divisors */ +struct _pll_div { + u32 pll_in; + u32 pll_out; + u16 regvalue; +}; + +/* Note : pll code from original alc5632 driver. Not sure of how good it is */ +/* usefull only for master mode */ +static const struct _pll_div codec_master_pll_div[] = { + + { 2048000, 8192000, 0x0ea0}, + { 3686400, 8192000, 0x4e27}, + { 12000000, 8192000, 0x456b}, + { 13000000, 8192000, 0x495f}, + { 13100000, 8192000, 0x0320}, + { 2048000, 11289600, 0xf637}, + { 3686400, 11289600, 0x2f22}, + { 12000000, 11289600, 0x3e2f}, + { 13000000, 11289600, 0x4d5b}, + { 13100000, 11289600, 0x363b}, + { 2048000, 16384000, 0x1ea0}, + { 3686400, 16384000, 0x9e27}, + { 12000000, 16384000, 0x452b}, + { 13000000, 16384000, 0x542f}, + { 13100000, 16384000, 0x03a0}, + { 2048000, 16934400, 0xe625}, + { 3686400, 16934400, 0x9126}, + { 12000000, 16934400, 0x4d2c}, + { 13000000, 16934400, 0x742f}, + { 13100000, 16934400, 0x3c27}, + { 2048000, 22579200, 0x2aa0}, + { 3686400, 22579200, 0x2f20}, + { 12000000, 22579200, 0x7e2f}, + { 13000000, 22579200, 0x742f}, + { 13100000, 22579200, 0x3c27}, + { 2048000, 24576000, 0x2ea0}, + { 3686400, 24576000, 0xee27}, + { 12000000, 24576000, 0x2915}, + { 13000000, 24576000, 0x772e}, + { 13100000, 24576000, 0x0d20}, +}; + +/* FOUT = MCLK*(N+2)/((M+2)*(K+2)) + N: bit 15:8 (div 2 .. div 257) + K: bit 6:4 typical 2 + M: bit 3:0 (div 2 .. div 17) + + same as for 5623 - thanks! +*/ + +static const struct _pll_div codec_slave_pll_div[] = { + + { 1024000, 16384000, 0x3ea0}, + { 1411200, 22579200, 0x3ea0}, + { 1536000, 24576000, 0x3ea0}, + { 2048000, 16384000, 0x1ea0}, + { 2822400, 22579200, 0x1ea0}, + { 3072000, 24576000, 0x1ea0}, + +}; + +static int alc5632_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, + int source, unsigned int freq_in, unsigned int freq_out) +{ + int i; + struct snd_soc_codec *codec = codec_dai->codec; + int gbl_clk = 0, pll_div = 0; + u16 reg; + + if (pll_id < ALC5632_PLL_FR_MCLK || pll_id > ALC5632_PLL_FR_VBCLK) + return -EINVAL; + + /* Disable PLL power */ + snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD2, + ALC5632_PWR_ADD2_PLL1, + 0); + snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD2, + ALC5632_PWR_ADD2_PLL2, + 0); + + /* pll is not used in slave mode */ + reg = snd_soc_read(codec, ALC5632_DAI_CONTROL); + if (reg & ALC5632_DAI_SDP_SLAVE_MODE) + return 0; + + if (!freq_in || !freq_out) + return 0; + + switch (pll_id) { + case ALC5632_PLL_FR_MCLK: + for (i = 0; i < ARRAY_SIZE(codec_master_pll_div); i++) { + if (codec_master_pll_div[i].pll_in == freq_in + && codec_master_pll_div[i].pll_out == freq_out) { + /* PLL source from MCLK */ + pll_div = codec_master_pll_div[i].regvalue; + break; + } + } + break; + case ALC5632_PLL_FR_BCLK: + for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++) { + if (codec_slave_pll_div[i].pll_in == freq_in + && codec_slave_pll_div[i].pll_out == freq_out) { + /* PLL source from Bitclk */ + gbl_clk = ALC5632_PLL_FR_BCLK; + pll_div = codec_slave_pll_div[i].regvalue; + break; + } + } + break; + case ALC5632_PLL_FR_VBCLK: + for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++) { + if (codec_slave_pll_div[i].pll_in == freq_in + && codec_slave_pll_div[i].pll_out == freq_out) { + /* PLL source from voice clock */ + gbl_clk = ALC5632_PLL_FR_VBCLK; + pll_div = codec_slave_pll_div[i].regvalue; + break; + } + } + break; + default: + return -EINVAL; + } + + if (!pll_div) + return -EINVAL; + + /* choose MCLK/BCLK/VBCLK */ + snd_soc_write(codec, ALC5632_GPCR2, gbl_clk); + /* choose PLL1 clock rate */ + snd_soc_write(codec, ALC5632_PLL1_CTRL, pll_div); + /* enable PLL1 */ + snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD2, + ALC5632_PWR_ADD2_PLL1, + ALC5632_PWR_ADD2_PLL1); + /* enable PLL2 */ + snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD2, + ALC5632_PWR_ADD2_PLL2, + ALC5632_PWR_ADD2_PLL2); + /* use PLL1 as main SYSCLK */ + snd_soc_update_bits(codec, ALC5632_GPCR1, + ALC5632_GPCR1_CLK_SYS_SRC_SEL_PLL1, + ALC5632_GPCR1_CLK_SYS_SRC_SEL_PLL1); + + return 0; +} + +struct _coeff_div { + u16 fs; + u16 regvalue; +}; + +/* codec hifi mclk (after PLL) clock divider coefficients */ +/* values inspired from column BCLK=32Fs of Appendix A table */ +static const struct _coeff_div coeff_div[] = { + {512*1, 0x3075}, +}; + +static int get_coeff(struct snd_soc_codec *codec, int rate) +{ + struct alc5632_priv *alc5632 = snd_soc_codec_get_drvdata(codec); + int i; + + for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { + if (coeff_div[i].fs * rate == alc5632->sysclk) + return i; + } + return -EINVAL; +} + +/* + * Clock after PLL and dividers + */ +static int alc5632_set_dai_sysclk(struct snd_soc_dai *codec_dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = codec_dai->codec; + struct alc5632_priv *alc5632 = snd_soc_codec_get_drvdata(codec); + + switch (freq) { + case 8192000: + case 11289600: + case 12288000: + case 16384000: + case 16934400: + case 18432000: + case 22579200: + case 24576000: + alc5632->sysclk = freq; + return 0; + } + return -EINVAL; +} + +static int alc5632_set_dai_fmt(struct snd_soc_dai *codec_dai, + unsigned int fmt) +{ + struct snd_soc_codec *codec = codec_dai->codec; + u16 iface = 0; + + /* set master/slave audio interface */ + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + iface = ALC5632_DAI_SDP_MASTER_MODE; + break; + case SND_SOC_DAIFMT_CBS_CFS: + iface = ALC5632_DAI_SDP_SLAVE_MODE; + break; + default: + return -EINVAL; + } + + /* interface format */ + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + iface |= ALC5632_DAI_I2S_DF_I2S; + break; + case SND_SOC_DAIFMT_LEFT_J: + iface |= ALC5632_DAI_I2S_DF_LEFT; + break; + case SND_SOC_DAIFMT_DSP_A: + iface |= ALC5632_DAI_I2S_DF_PCM_A; + break; + case SND_SOC_DAIFMT_DSP_B: + iface |= ALC5632_DAI_I2S_DF_PCM_B; + break; + default: + return -EINVAL; + } + + /* clock inversion */ + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_IF: + iface |= ALC5632_DAI_MAIN_I2S_BCLK_POL_CTRL; + break; + case SND_SOC_DAIFMT_IB_NF: + iface |= ALC5632_DAI_MAIN_I2S_BCLK_POL_CTRL; + break; + case SND_SOC_DAIFMT_NB_IF: + break; + default: + return -EINVAL; + } + + return snd_soc_write(codec, ALC5632_DAI_CONTROL, iface); +} + +static int alc5632_pcm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_codec *codec = rtd->codec; + int coeff, rate; + u16 iface; + + iface = snd_soc_read(codec, ALC5632_DAI_CONTROL); + iface &= ~ALC5632_DAI_I2S_DL_MASK; + + /* bit size */ + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + iface |= ALC5632_DAI_I2S_DL_16; + break; + case SNDRV_PCM_FORMAT_S20_3LE: + iface |= ALC5632_DAI_I2S_DL_20; + break; + case SNDRV_PCM_FORMAT_S24_LE: + iface |= ALC5632_DAI_I2S_DL_24; + break; + default: + return -EINVAL; + } + + /* set iface & srate */ + snd_soc_write(codec, ALC5632_DAI_CONTROL, iface); + rate = params_rate(params); + coeff = get_coeff(codec, rate); + if (coeff < 0) + return -EINVAL; + + coeff = coeff_div[coeff].regvalue; + snd_soc_write(codec, ALC5632_DAC_CLK_CTRL1, coeff); + + return 0; +} + +static int alc5632_mute(struct snd_soc_dai *dai, int mute) +{ + struct snd_soc_codec *codec = dai->codec; + u16 hp_mute = ALC5632_MISC_HP_DEPOP_MUTE_L \ + |ALC5632_MISC_HP_DEPOP_MUTE_R; + u16 mute_reg = snd_soc_read(codec, ALC5632_MISC_CTRL) & ~hp_mute; + + if (mute) + mute_reg |= hp_mute; + + return snd_soc_write(codec, ALC5632_MISC_CTRL, mute_reg); +} + +#define ALC5632_ADD2_POWER_EN (ALC5632_PWR_ADD2_VREF) + +#define ALC5632_ADD3_POWER_EN (ALC5632_PWR_ADD3_MIC1_BOOST_AD) + +#define ALC5632_ADD1_POWER_EN \ + (ALC5632_PWR_ADD1_DAC_REF \ + | ALC5632_PWR_ADD1_SOFTGEN_EN \ + | ALC5632_PWR_ADD1_HP_OUT_AMP \ + | ALC5632_PWR_ADD1_HP_OUT_ENH_AMP \ + | ALC5632_PWR_ADD1_MAIN_BIAS) + +static void enable_power_depop(struct snd_soc_codec *codec) +{ + snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD1, + ALC5632_PWR_ADD1_SOFTGEN_EN, + ALC5632_PWR_ADD1_SOFTGEN_EN); + + snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD3, + ALC5632_ADD3_POWER_EN, + ALC5632_ADD3_POWER_EN); + + snd_soc_update_bits(codec, ALC5632_MISC_CTRL, + ALC5632_MISC_HP_DEPOP_MODE2_EN, + ALC5632_MISC_HP_DEPOP_MODE2_EN); + + /* "normal" mode: 0 @ 26 */ + /* set all PR0-7 mixers to 0 */ + snd_soc_update_bits(codec, ALC5632_PWR_DOWN_CTRL_STATUS, + ALC5632_PWR_DOWN_CTRL_STATUS_MASK, + 0); + + msleep(500); + + snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD2, + ALC5632_ADD2_POWER_EN, + ALC5632_ADD2_POWER_EN); + + snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD1, + ALC5632_ADD1_POWER_EN, + ALC5632_ADD1_POWER_EN); + + /* disable HP Depop2 */ + snd_soc_update_bits(codec, ALC5632_MISC_CTRL, + ALC5632_MISC_HP_DEPOP_MODE2_EN, + 0); + +} + +static int alc5632_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + switch (level) { + case SND_SOC_BIAS_ON: + enable_power_depop(codec); + break; + case SND_SOC_BIAS_PREPARE: + break; + case SND_SOC_BIAS_STANDBY: + /* everything off except vref/vmid, */ + snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD1, + ALC5632_PWR_MANAG_ADD1_MASK, + ALC5632_PWR_ADD1_MAIN_BIAS); + snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD2, + ALC5632_PWR_MANAG_ADD2_MASK, + ALC5632_PWR_ADD2_VREF); + /* "normal" mode: 0 @ 26 */ + snd_soc_update_bits(codec, ALC5632_PWR_DOWN_CTRL_STATUS, + ALC5632_PWR_DOWN_CTRL_STATUS_MASK, + 0xffff ^ (ALC5632_PWR_VREF_PR3 + | ALC5632_PWR_VREF_PR2)); + break; + case SND_SOC_BIAS_OFF: + /* everything off, dac mute, inactive */ + snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD2, + ALC5632_PWR_MANAG_ADD2_MASK, 0); + snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD3, + ALC5632_PWR_MANAG_ADD3_MASK, 0); + snd_soc_update_bits(codec, ALC5632_PWR_MANAG_ADD1, + ALC5632_PWR_MANAG_ADD1_MASK, 0); + break; + } + codec->dapm.bias_level = level; + return 0; +} + +#define ALC5632_FORMATS (SNDRV_PCM_FMTBIT_S16_LE \ + | SNDRV_PCM_FMTBIT_S24_LE \ + | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_ops alc5632_dai_ops = { + .hw_params = alc5632_pcm_hw_params, + .digital_mute = alc5632_mute, + .set_fmt = alc5632_set_dai_fmt, + .set_sysclk = alc5632_set_dai_sysclk, + .set_pll = alc5632_set_dai_pll, +}; + +static struct snd_soc_dai_driver alc5632_dai = { + .name = "alc5632-hifi", + .playback = { + .stream_name = "HiFi Playback", + .channels_min = 1, + .channels_max = 2, + .rate_min = 8000, + .rate_max = 48000, + .rates = SNDRV_PCM_RATE_8000_48000, + .formats = ALC5632_FORMATS,}, + .capture = { + .stream_name = "HiFi Capture", + .channels_min = 1, + .channels_max = 2, + .rate_min = 8000, + .rate_max = 48000, + .rates = SNDRV_PCM_RATE_8000_48000, + .formats = ALC5632_FORMATS,}, + + .ops = &alc5632_dai_ops, + .symmetric_rates = 1, +}; + +static int alc5632_suspend(struct snd_soc_codec *codec, pm_message_t mesg) +{ + alc5632_set_bias_level(codec, SND_SOC_BIAS_OFF); + return 0; +} + +static int alc5632_resume(struct snd_soc_codec *codec) +{ + int ret; + + /* mark cache as needed to sync */ + codec->cache_sync = 1; + + ret = snd_soc_cache_sync(codec); + if (ret != 0) { + dev_err(codec->dev, "Failed to sync cache: %d\n", ret); + return ret; + } + + alc5632_set_bias_level(codec, SND_SOC_BIAS_STANDBY); + return 0; +} + +#define ALC5632_REC_UNMUTE (ALC5632_ADC_REC_MIC2 \ + | ALC5632_ADC_REC_LINE_IN | ALC5632_ADC_REC_AUX \ + | ALC5632_ADC_REC_HP | ALC5632_ADC_REC_SPK \ + | ALC5632_ADC_REC_MONOMIX) + +#define ALC5632_MIC_ROUTE (ALC5632_MIC_ROUTE_HP \ + | ALC5632_MIC_ROUTE_SPK \ + | ALC5632_MIC_ROUTE_MONOMIX) + +#define ALC5632_PWR_DEFAULT (ALC5632_PWR_ADC_STATUS \ + | ALC5632_PWR_DAC_STATUS \ + | ALC5632_PWR_AMIX_STATUS \ + | ALC5632_PWR_VREF_STATUS) + +#define ALC5632_ADC_REC_GAIN_COMP(x) (int)((x - ALC5632_ADC_REC_GAIN_BASE) \ + / ALC5632_ADC_REC_GAIN_STEP) + +#define ALC5632_MIC_BOOST_COMP(x) (int)(x / ALC5632_MIC_BOOST_STEP) + +#define ALC5632_SPK_OUT_VOL_COMP(x) (int)(x / ALC5632_SPK_OUT_VOL_STEP) + +static int alc5632_probe(struct snd_soc_codec *codec) +{ + struct alc5632_priv *alc5632 = snd_soc_codec_get_drvdata(codec); + int ret; + + ret = snd_soc_codec_set_cache_io(codec, 8, 16, alc5632->control_type); + if (ret < 0) { + dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); + return ret; + } + + alc5632_reset(codec); + + /* power on device */ + alc5632_set_bias_level(codec, SND_SOC_BIAS_STANDBY); + + switch (alc5632->id) { + case 0x5c: + snd_soc_add_controls(codec, alc5632_vol_snd_controls, + ARRAY_SIZE(alc5632_vol_snd_controls)); + break; + default: + return -EINVAL; + } + + return ret; +} + +/* power down chip */ +static int alc5632_remove(struct snd_soc_codec *codec) +{ + alc5632_set_bias_level(codec, SND_SOC_BIAS_OFF); + return 0; +} + +static struct snd_soc_codec_driver soc_codec_device_alc5632 = { + .probe = alc5632_probe, + .remove = alc5632_remove, + .suspend = alc5632_suspend, + .resume = alc5632_resume, + .set_bias_level = alc5632_set_bias_level, + .reg_word_size = sizeof(u16), + .reg_cache_step = 2, + .reg_cache_default = alc5632_reg_defaults, + .reg_cache_size = ARRAY_SIZE(alc5632_reg_defaults), + .volatile_register = alc5632_volatile_register, + .controls = alc5632_snd_controls, + .num_controls = ARRAY_SIZE(alc5632_snd_controls), + .dapm_widgets = alc5632_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(alc5632_dapm_widgets), + .dapm_routes = alc5632_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(alc5632_dapm_routes), +}; + +/* + * alc5632 2 wire address is determined by A1 pin + * state during powerup. + * low = 0x1a + * high = 0x1b + */ +static int alc5632_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct alc5632_priv *alc5632; + int ret, vid1, vid2; + + vid1 = i2c_smbus_read_word_data(client, ALC5632_VENDOR_ID1); + if (vid1 < 0) { + dev_err(&client->dev, "failed to read I2C\n"); + return -EIO; + } else { + dev_info(&client->dev, "got vid1: %x\n", vid1); + } + vid1 = ((vid1 & 0xff) << 8) | (vid1 >> 8); + + vid2 = i2c_smbus_read_word_data(client, ALC5632_VENDOR_ID2); + if (vid2 < 0) { + dev_err(&client->dev, "failed to read I2C\n"); + return -EIO; + } else { + dev_info(&client->dev, "got vid2: %x\n", vid2); + } + vid2 = (vid2 & 0xff); + + if ((vid1 != 0x10ec) || (vid2 != id->driver_data)) { + dev_err(&client->dev, "unknown or wrong codec\n"); + dev_err(&client->dev, "Expected %x:%lx, got %x:%x\n", + 0x10ec, id->driver_data, + vid1, vid2); + return -ENODEV; + } + + alc5632 = devm_kzalloc(&client->dev, + sizeof(struct alc5632_priv), GFP_KERNEL); + if (alc5632 == NULL) + return -ENOMEM; + + alc5632->id = vid2; + switch (alc5632->id) { + case 0x5c: + alc5632_dai.name = "alc5632-hifi"; + break; + default: + return -EINVAL; + } + + i2c_set_clientdata(client, alc5632); + alc5632->control_data = client; + alc5632->control_type = SND_SOC_I2C; + mutex_init(&alc5632->mutex); + + ret = snd_soc_register_codec(&client->dev, + &soc_codec_device_alc5632, &alc5632_dai, 1); + if (ret != 0) + dev_err(&client->dev, "Failed to register codec: %d\n", ret); + + return ret; +} + +static int alc5632_i2c_remove(struct i2c_client *client) +{ + snd_soc_unregister_codec(&client->dev); + + return 0; +} + +static const struct i2c_device_id alc5632_i2c_table[] = { + {"alc5632", 0x5c}, + {} +}; +MODULE_DEVICE_TABLE(i2c, alc5632_i2c_table); + +/* i2c codec control layer */ +static struct i2c_driver alc5632_i2c_driver = { + .driver = { + .name = "alc5632", + .owner = THIS_MODULE, + }, + .probe = alc5632_i2c_probe, + .remove = __devexit_p(alc5632_i2c_remove), + .id_table = alc5632_i2c_table, +}; + +static int __init alc5632_modinit(void) +{ + int ret; + + ret = i2c_add_driver(&alc5632_i2c_driver); + if (ret != 0) { + printk(KERN_ERR "%s: can't add i2c driver", __func__); + return ret; + } + + return ret; +} +module_init(alc5632_modinit); + +static void __exit alc5632_modexit(void) +{ + i2c_del_driver(&alc5632_i2c_driver); +} +module_exit(alc5632_modexit); + +MODULE_DESCRIPTION("ASoC ALC5632 driver"); +MODULE_AUTHOR("Leon Romanovsky <leon@leon.nu>"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/alc5632.h b/sound/soc/codecs/alc5632.h new file mode 100644 index 000000000000..ff4c0fd0d2ec --- /dev/null +++ b/sound/soc/codecs/alc5632.h @@ -0,0 +1,249 @@ +/* +* alc5632.h -- ALC5632 ALSA SoC Audio Codec +* +* Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.lauchpad.net> +* +* Authors: Leon Romanovsky <leon@leon.nu> +* Andrey Danin <danindrey@mail.ru> +* Ilya Petrov <ilya.muromec@gmail.com> +* Marc Dietrich <marvin24@gmx.de> +* +* Based on alc5623.h by Arnaud Patard +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +*/ + +#ifndef _ALC5632_H +#define _ALC5632_H + +#define ALC5632_RESET 0x00 +/* speaker output vol 2 2 */ +/* line output vol 4 2 */ +/* HP output vol 4 0 4 */ +#define ALC5632_SPK_OUT_VOL 0x02 /* spe out vol */ +#define ALC5632_SPK_OUT_VOL_STEP 1.5 +#define ALC5632_HP_OUT_VOL 0x04 /* hp out vol */ +#define ALC5632_AUX_OUT_VOL 0x06 /* aux out vol */ +#define ALC5632_PHONE_IN_VOL 0x08 /* phone in vol */ +#define ALC5632_LINE_IN_VOL 0x0A /* line in vol */ +#define ALC5632_STEREO_DAC_IN_VOL 0x0C /* stereo dac in vol */ +#define ALC5632_MIC_VOL 0x0E /* mic in vol */ +/* stero dac/mic routing */ +#define ALC5632_MIC_ROUTING_CTRL 0x10 +#define ALC5632_MIC_ROUTE_MONOMIX (1 << 0) +#define ALC5632_MIC_ROUTE_SPK (1 << 1) +#define ALC5632_MIC_ROUTE_HP (1 << 2) + +#define ALC5632_ADC_REC_GAIN 0x12 /* rec gain */ +#define ALC5632_ADC_REC_GAIN_RANGE 0x1F1F +#define ALC5632_ADC_REC_GAIN_BASE (-16.5) +#define ALC5632_ADC_REC_GAIN_STEP 1.5 + +#define ALC5632_ADC_REC_MIXER 0x14 /* mixer control */ +#define ALC5632_ADC_REC_MIC1 (1 << 6) +#define ALC5632_ADC_REC_MIC2 (1 << 5) +#define ALC5632_ADC_REC_LINE_IN (1 << 4) +#define ALC5632_ADC_REC_AUX (1 << 3) +#define ALC5632_ADC_REC_HP (1 << 2) +#define ALC5632_ADC_REC_SPK (1 << 1) +#define ALC5632_ADC_REC_MONOMIX (1 << 0) + +#define ALC5632_VOICE_DAC_VOL 0x18 /* voice dac vol */ +/* ALC5632_OUTPUT_MIXER_CTRL : */ +/* same remark as for reg 2 line vs speaker */ +#define ALC5632_OUTPUT_MIXER_CTRL 0x1C /* out mix ctrl */ +#define ALC5632_OUTPUT_MIXER_RP (1 << 14) +#define ALC5632_OUTPUT_MIXER_WEEK (1 << 12) +#define ALC5632_OUTPUT_MIXER_HP (1 << 10) +#define ALC5632_OUTPUT_MIXER_AUX_SPK (2 << 6) +#define ALC5632_OUTPUT_MIXER_AUX_HP_LR (1 << 6) +#define ALC5632_OUTPUT_MIXER_HP_R (1 << 8) +#define ALC5632_OUTPUT_MIXER_HP_L (1 << 9) + +#define ALC5632_MIC_CTRL 0x22 /* mic phone ctrl */ +#define ALC5632_MIC_BOOST_BYPASS 0 +#define ALC5632_MIC_BOOST_20DB 1 +#define ALC5632_MIC_BOOST_30DB 2 +#define ALC5632_MIC_BOOST_40DB 3 + +#define ALC5632_DIGI_BOOST_CTRL 0x24 /* digi mic / bost ctl */ +#define ALC5632_MIC_BOOST_RANGE 7 +#define ALC5632_MIC_BOOST_STEP 6 +#define ALC5632_PWR_DOWN_CTRL_STATUS 0x26 +#define ALC5632_PWR_DOWN_CTRL_STATUS_MASK 0xEF00 +#define ALC5632_PWR_VREF_PR3 (1 << 11) +#define ALC5632_PWR_VREF_PR2 (1 << 10) +#define ALC5632_PWR_VREF_STATUS (1 << 3) +#define ALC5632_PWR_AMIX_STATUS (1 << 2) +#define ALC5632_PWR_DAC_STATUS (1 << 1) +#define ALC5632_PWR_ADC_STATUS (1 << 0) +/* stereo/voice DAC / stereo adc func ctrl */ +#define ALC5632_DAC_FUNC_SELECT 0x2E + +/* Main serial data port ctrl (i2s) */ +#define ALC5632_DAI_CONTROL 0x34 + +#define ALC5632_DAI_SDP_MASTER_MODE (0 << 15) +#define ALC5632_DAI_SDP_SLAVE_MODE (1 << 15) +#define ALC5632_DAI_SADLRCK_MODE (1 << 14) +/* 0:voice, 1:main */ +#define ALC5632_DAI_MAIN_I2S_SYSCLK_SEL (1 << 8) +#define ALC5632_DAI_MAIN_I2S_BCLK_POL_CTRL (1 << 7) +/* 0:normal, 1:invert */ +#define ALC5632_DAI_MAIN_I2S_LRCK_INV (1 << 6) +#define ALC5632_DAI_I2S_DL_MASK (3 << 2) +#define ALC5632_DAI_I2S_DL_8 (3 << 2) +#define ALC5632_DAI_I2S_DL_24 (2 << 2) +#define ALC5632_DAI_I2S_DL_20 (1 << 2) +#define ALC5632_DAI_I2S_DL_16 (0 << 2) +#define ALC5632_DAI_I2S_DF_MASK (3 << 0) +#define ALC5632_DAI_I2S_DF_PCM_B (3 << 0) +#define ALC5632_DAI_I2S_DF_PCM_A (2 << 0) +#define ALC5632_DAI_I2S_DF_LEFT (1 << 0) +#define ALC5632_DAI_I2S_DF_I2S (0 << 0) +/* extend serial data port control (VoDAC_i2c/pcm) */ +#define ALC5632_DAI_CONTROL2 0x36 +/* 0:gpio func, 1:voice pcm */ +#define ALC5632_DAI_VOICE_PCM_ENABLE (1 << 15) +/* 0:master, 1:slave */ +#define ALC5632_DAI_VOICE_MODE_SEL (1 << 14) +/* 0:disable, 1:enable */ +#define ALC5632_DAI_HPF_CLK_CTRL (1 << 13) +/* 0:main, 1:voice */ +#define ALC5632_DAI_VOICE_I2S_SYSCLK_SEL (1 << 8) +/* 0:normal, 1:invert */ +#define ALC5632_DAI_VOICE_VBCLK_SYSCLK_SEL (1 << 7) +/* 0:normal, 1:invert */ +#define ALC5632_DAI_VOICE_I2S_LR_INV (1 << 6) +#define ALC5632_DAI_VOICE_DL_MASK (3 << 2) +#define ALC5632_DAI_VOICE_DL_16 (0 << 2) +#define ALC5632_DAI_VOICE_DL_20 (1 << 2) +#define ALC5632_DAI_VOICE_DL_24 (2 << 2) +#define ALC5632_DAI_VOICE_DL_8 (3 << 2) +#define ALC5632_DAI_VOICE_DF_MASK (3 << 0) +#define ALC5632_DAI_VOICE_DF_I2S (0 << 0) +#define ALC5632_DAI_VOICE_DF_LEFT (1 << 0) +#define ALC5632_DAI_VOICE_DF_PCM_A (2 << 0) +#define ALC5632_DAI_VOICE_DF_PCM_B (3 << 0) + +#define ALC5632_PWR_MANAG_ADD1 0x3A +#define ALC5632_PWR_MANAG_ADD1_MASK 0xEFFF +#define ALC5632_PWR_ADD1_DAC_L_EN (1 << 15) +#define ALC5632_PWR_ADD1_DAC_R_EN (1 << 14) +#define ALC5632_PWR_ADD1_ZERO_CROSS (1 << 13) +#define ALC5632_PWR_ADD1_MAIN_I2S_EN (1 << 11) +#define ALC5632_PWR_ADD1_SPK_AMP_EN (1 << 10) +#define ALC5632_PWR_ADD1_HP_OUT_AMP (1 << 9) +#define ALC5632_PWR_ADD1_HP_OUT_ENH_AMP (1 << 8) +#define ALC5632_PWR_ADD1_VOICE_DAC_MIX (1 << 7) +#define ALC5632_PWR_ADD1_SOFTGEN_EN (1 << 6) +#define ALC5632_PWR_ADD1_MIC1_SHORT_CURR (1 << 5) +#define ALC5632_PWR_ADD1_MIC2_SHORT_CURR (1 << 4) +#define ALC5632_PWR_ADD1_MIC1_EN (1 << 3) +#define ALC5632_PWR_ADD1_MIC2_EN (1 << 2) +#define ALC5632_PWR_ADD1_MAIN_BIAS (1 << 1) +#define ALC5632_PWR_ADD1_DAC_REF (1 << 0) + +#define ALC5632_PWR_MANAG_ADD2 0x3C +#define ALC5632_PWR_MANAG_ADD2_MASK 0x7FFF +#define ALC5632_PWR_ADD2_PLL1 (1 << 15) +#define ALC5632_PWR_ADD2_PLL2 (1 << 14) +#define ALC5632_PWR_ADD2_VREF (1 << 13) +#define ALC5632_PWR_ADD2_OVT_DET (1 << 12) +#define ALC5632_PWR_ADD2_VOICE_DAC (1 << 10) +#define ALC5632_PWR_ADD2_L_DAC_CLK (1 << 9) +#define ALC5632_PWR_ADD2_R_DAC_CLK (1 << 8) +#define ALC5632_PWR_ADD2_L_ADC_CLK_GAIN (1 << 7) +#define ALC5632_PWR_ADD2_R_ADC_CLK_GAIN (1 << 6) +#define ALC5632_PWR_ADD2_L_HP_MIXER (1 << 5) +#define ALC5632_PWR_ADD2_R_HP_MIXER (1 << 4) +#define ALC5632_PWR_ADD2_SPK_MIXER (1 << 3) +#define ALC5632_PWR_ADD2_MONO_MIXER (1 << 2) +#define ALC5632_PWR_ADD2_L_ADC_REC_MIXER (1 << 1) +#define ALC5632_PWR_ADD2_R_ADC_REC_MIXER (1 << 0) + +#define ALC5632_PWR_MANAG_ADD3 0x3E +#define ALC5632_PWR_MANAG_ADD3_MASK 0x7CFF +#define ALC5632_PWR_ADD3_AUXOUT_VOL (1 << 14) +#define ALC5632_PWR_ADD3_SPK_L_OUT (1 << 13) +#define ALC5632_PWR_ADD3_SPK_R_OUT (1 << 12) +#define ALC5632_PWR_ADD3_HP_L_OUT_VOL (1 << 11) +#define ALC5632_PWR_ADD3_HP_R_OUT_VOL (1 << 10) +#define ALC5632_PWR_ADD3_LINEIN_L_VOL (1 << 7) +#define ALC5632_PWR_ADD3_LINEIN_R_VOL (1 << 6) +#define ALC5632_PWR_ADD3_AUXIN_VOL (1 << 5) +#define ALC5632_PWR_ADD3_AUXIN_MIX (1 << 4) +#define ALC5632_PWR_ADD3_MIC1_VOL (1 << 3) +#define ALC5632_PWR_ADD3_MIC2_VOL (1 << 2) +#define ALC5632_PWR_ADD3_MIC1_BOOST_AD (1 << 1) +#define ALC5632_PWR_ADD3_MIC2_BOOST_AD (1 << 0) + +#define ALC5632_GPCR1 0x40 +#define ALC5632_GPCR1_CLK_SYS_SRC_SEL_PLL1 (1 << 15) +#define ALC5632_GPCR1_CLK_SYS_SRC_SEL_MCLK (0 << 15) +#define ALC5632_GPCR1_DAC_HI_FLT_EN (1 << 10) +#define ALC5632_GPCR1_SPK_AMP_CTRL (7 << 1) +#define ALC5632_GPCR1_VDD_100 (5 << 1) +#define ALC5632_GPCR1_VDD_125 (4 << 1) +#define ALC5632_GPCR1_VDD_150 (3 << 1) +#define ALC5632_GPCR1_VDD_175 (2 << 1) +#define ALC5632_GPCR1_VDD_200 (1 << 1) +#define ALC5632_GPCR1_VDD_225 (0 << 1) + +#define ALC5632_GPCR2 0x42 +#define ALC5632_GPCR2_PLL1_SOUR_SEL (3 << 12) +#define ALC5632_PLL_FR_MCLK (0 << 12) +#define ALC5632_PLL_FR_BCLK (2 << 12) +#define ALC5632_PLL_FR_VBCLK (3 << 12) +#define ALC5632_GPCR2_CLK_PLL_PRE_DIV1 (0 << 0) + +#define ALC5632_PLL1_CTRL 0x44 +#define ALC5632_PLL1_CTRL_N_VAL(n) (((n) & 0x0f) << 8) +#define ALC5632_PLL1_M_BYPASS (1 << 7) +#define ALC5632_PLL1_CTRL_K_VAL(k) (((k) & 0x07) << 4) +#define ALC5632_PLL1_CTRL_M_VAL(m) (((m) & 0x0f) << 0) + +#define ALC5632_PLL2_CTRL 0x46 +#define ALC5632_PLL2_EN (1 << 15) +#define ALC5632_PLL2_RATIO (0 << 15) + +#define ALC5632_GPIO_PIN_CONFIG 0x4C +#define ALC5632_GPIO_PIN_POLARITY 0x4E +#define ALC5632_GPIO_PIN_STICKY 0x50 +#define ALC5632_GPIO_PIN_WAKEUP 0x52 +#define ALC5632_GPIO_PIN_STATUS 0x54 +#define ALC5632_GPIO_PIN_SHARING 0x56 +#define ALC5632_OVER_CURR_STATUS 0x58 +#define ALC5632_SOFTVOL_CTRL 0x5A +#define ALC5632_GPIO_OUPUT_PIN_CTRL 0x5C + +#define ALC5632_MISC_CTRL 0x5E +#define ALC5632_MISC_DISABLE_FAST_VREG (1 << 15) +#define ALC5632_MISC_AVC_TRGT_SEL (3 << 12) +#define ALC5632_MISC_AVC_TRGT_RIGHT (1 << 12) +#define ALC5632_MISC_AVC_TRGT_LEFT (2 << 12) +#define ALC5632_MISC_AVC_TRGT_BOTH (3 << 12) +#define ALC5632_MISC_HP_DEPOP_MODE1_EN (1 << 9) +#define ALC5632_MISC_HP_DEPOP_MODE2_EN (1 << 8) +#define ALC5632_MISC_HP_DEPOP_MUTE_L (1 << 7) +#define ALC5632_MISC_HP_DEPOP_MUTE_R (1 << 6) +#define ALC5632_MISC_HP_DEPOP_MUTE (1 << 5) +#define ALC5632_MISC_GPIO_WAKEUP_CTRL (1 << 1) +#define ALC5632_MISC_IRQOUT_INV_CTRL (1 << 0) + +#define ALC5632_DAC_CLK_CTRL1 0x60 +#define ALC5632_DAC_CLK_CTRL2 0x62 +#define ALC5632_DAC_CLK_CTRL2_DIV1_2 (1 << 0) +#define ALC5632_VOICE_DAC_PCM_CLK_CTRL1 0x64 +#define ALC5632_PSEUDO_SPATIAL_CTRL 0x68 +#define ALC5632_HID_CTRL_INDEX 0x6A +#define ALC5632_HID_CTRL_DATA 0x6C +#define ALC5632_EQ_CTRL 0x6E + +/* undocumented */ +#define ALC5632_VENDOR_ID1 0x7C +#define ALC5632_VENDOR_ID2 0x7E + +#endif diff --git a/sound/soc/codecs/cs42l51.c b/sound/soc/codecs/cs42l51.c index 8c3c8205d19e..00718b5e747b 100644 --- a/sound/soc/codecs/cs42l51.c +++ b/sound/soc/codecs/cs42l51.c @@ -175,21 +175,18 @@ static const struct snd_kcontrol_new cs42l51_snd_controls[] = { static int cs42l51_pdn_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { - unsigned long value; - - value = snd_soc_read(w->codec, CS42L51_POWER_CTL1); - value &= ~CS42L51_POWER_CTL1_PDN; - switch (event) { case SND_SOC_DAPM_PRE_PMD: - value |= CS42L51_POWER_CTL1_PDN; + snd_soc_update_bits(w->codec, CS42L51_POWER_CTL1, + CS42L51_POWER_CTL1_PDN, + CS42L51_POWER_CTL1_PDN); break; default: case SND_SOC_DAPM_POST_PMD: + snd_soc_update_bits(w->codec, CS42L51_POWER_CTL1, + CS42L51_POWER_CTL1_PDN, 0); break; } - snd_soc_update_bits(w->codec, CS42L51_POWER_CTL1, - CS42L51_POWER_CTL1_PDN, value); return 0; } diff --git a/sound/soc/codecs/da7210.c b/sound/soc/codecs/da7210.c index b545b7d37222..8b5848a6374c 100644 --- a/sound/soc/codecs/da7210.c +++ b/sound/soc/codecs/da7210.c @@ -240,7 +240,7 @@ static const DECLARE_TLV_DB_SCALE(adc_eq_master_gain_tlv, -1800, 600, 1); static const DECLARE_TLV_DB_SCALE(dac_gain_tlv, -7725, 75, 0); /* ADC and DAC high pass filter f0 value */ -static const char const *da7210_hpf_cutoff_txt[] = { +static const char * const da7210_hpf_cutoff_txt[] = { "Fs/8192*pi", "Fs/4096*pi", "Fs/2048*pi", "Fs/1024*pi" }; @@ -251,7 +251,7 @@ static const struct soc_enum da7210_adc_hpf_cutoff = SOC_ENUM_SINGLE(DA7210_ADC_HPF, 0, 4, da7210_hpf_cutoff_txt); /* ADC and DAC voice (8kHz) high pass cutoff value */ -static const char const *da7210_vf_cutoff_txt[] = { +static const char * const da7210_vf_cutoff_txt[] = { "2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz" }; diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c index 87d5ef188e29..14cb5534ce8b 100644 --- a/sound/soc/codecs/tlv320aic3x.c +++ b/sound/soc/codecs/tlv320aic3x.c @@ -833,7 +833,6 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream, int codec_clk = 0, bypass_pll = 0, fsref, last_clk = 0; u8 data, j, r, p, pll_q, pll_p = 1, pll_r = 1, pll_j = 1; u16 d, pll_d = 1; - u8 reg; int clk; /* select data word length */ @@ -869,14 +868,13 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream, snd_soc_write(codec, AIC3X_PLL_PROGA_REG, pll_q << PLLQ_SHIFT); snd_soc_write(codec, AIC3X_GPIOB_REG, CODEC_CLKIN_CLKDIV); /* disable PLL if it is bypassed */ - reg = snd_soc_read(codec, AIC3X_PLL_PROGA_REG); - snd_soc_write(codec, AIC3X_PLL_PROGA_REG, reg & ~PLL_ENABLE); + snd_soc_update_bits(codec, AIC3X_PLL_PROGA_REG, PLL_ENABLE, 0); } else { snd_soc_write(codec, AIC3X_GPIOB_REG, CODEC_CLKIN_PLLDIV); /* enable PLL when it is used */ - reg = snd_soc_read(codec, AIC3X_PLL_PROGA_REG); - snd_soc_write(codec, AIC3X_PLL_PROGA_REG, reg | PLL_ENABLE); + snd_soc_update_bits(codec, AIC3X_PLL_PROGA_REG, + PLL_ENABLE, PLL_ENABLE); } /* Route Left DAC to left channel input and @@ -1156,7 +1154,6 @@ static int aic3x_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec); - u8 reg; switch (level) { case SND_SOC_BIAS_ON: @@ -1165,9 +1162,8 @@ static int aic3x_set_bias_level(struct snd_soc_codec *codec, if (codec->dapm.bias_level == SND_SOC_BIAS_STANDBY && aic3x->master) { /* enable pll */ - reg = snd_soc_read(codec, AIC3X_PLL_PROGA_REG); - snd_soc_write(codec, AIC3X_PLL_PROGA_REG, - reg | PLL_ENABLE); + snd_soc_update_bits(codec, AIC3X_PLL_PROGA_REG, + PLL_ENABLE, PLL_ENABLE); } break; case SND_SOC_BIAS_STANDBY: @@ -1176,9 +1172,8 @@ static int aic3x_set_bias_level(struct snd_soc_codec *codec, if (codec->dapm.bias_level == SND_SOC_BIAS_PREPARE && aic3x->master) { /* disable pll */ - reg = snd_soc_read(codec, AIC3X_PLL_PROGA_REG); - snd_soc_write(codec, AIC3X_PLL_PROGA_REG, - reg & ~PLL_ENABLE); + snd_soc_update_bits(codec, AIC3X_PLL_PROGA_REG, + PLL_ENABLE, 0); } break; case SND_SOC_BIAS_OFF: @@ -1295,7 +1290,6 @@ static int aic3x_resume(struct snd_soc_codec *codec) static int aic3x_init(struct snd_soc_codec *codec) { struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec); - int reg; snd_soc_write(codec, AIC3X_PAGE_SELECT, PAGE0_SELECT); snd_soc_write(codec, AIC3X_RESET, SOFT_RESET); @@ -1317,20 +1311,13 @@ static int aic3x_init(struct snd_soc_codec *codec) snd_soc_write(codec, DACR1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON); /* unmute all outputs */ - reg = snd_soc_read(codec, LLOPM_CTRL); - snd_soc_write(codec, LLOPM_CTRL, reg | UNMUTE); - reg = snd_soc_read(codec, RLOPM_CTRL); - snd_soc_write(codec, RLOPM_CTRL, reg | UNMUTE); - reg = snd_soc_read(codec, MONOLOPM_CTRL); - snd_soc_write(codec, MONOLOPM_CTRL, reg | UNMUTE); - reg = snd_soc_read(codec, HPLOUT_CTRL); - snd_soc_write(codec, HPLOUT_CTRL, reg | UNMUTE); - reg = snd_soc_read(codec, HPROUT_CTRL); - snd_soc_write(codec, HPROUT_CTRL, reg | UNMUTE); - reg = snd_soc_read(codec, HPLCOM_CTRL); - snd_soc_write(codec, HPLCOM_CTRL, reg | UNMUTE); - reg = snd_soc_read(codec, HPRCOM_CTRL); - snd_soc_write(codec, HPRCOM_CTRL, reg | UNMUTE); + snd_soc_update_bits(codec, LLOPM_CTRL, UNMUTE, UNMUTE); + snd_soc_update_bits(codec, RLOPM_CTRL, UNMUTE, UNMUTE); + snd_soc_update_bits(codec, MONOLOPM_CTRL, UNMUTE, UNMUTE); + snd_soc_update_bits(codec, HPLOUT_CTRL, UNMUTE, UNMUTE); + snd_soc_update_bits(codec, HPROUT_CTRL, UNMUTE, UNMUTE); + snd_soc_update_bits(codec, HPLCOM_CTRL, UNMUTE, UNMUTE); + snd_soc_update_bits(codec, HPRCOM_CTRL, UNMUTE, UNMUTE); /* ADC default volume and unmute */ snd_soc_write(codec, LADC_VOL, DEFAULT_GAIN); diff --git a/sound/soc/codecs/wm5100-tables.c b/sound/soc/codecs/wm5100-tables.c index e9ce81a57b85..3e90dea4e267 100644 --- a/sound/soc/codecs/wm5100-tables.c +++ b/sound/soc/codecs/wm5100-tables.c @@ -13,7 +13,7 @@ #include "wm5100.h" -int wm5100_volatile_register(struct snd_soc_codec *codec, unsigned int reg) +bool wm5100_volatile_register(struct device *dev, unsigned int reg) { switch (reg) { case WM5100_SOFTWARE_RESET: @@ -36,7 +36,7 @@ int wm5100_volatile_register(struct snd_soc_codec *codec, unsigned int reg) } } -int wm5100_readable_register(struct snd_soc_codec *codec, unsigned int reg) +bool wm5100_readable_register(struct device *dev, unsigned int reg) { switch (reg) { case WM5100_SOFTWARE_RESET: @@ -85,6 +85,7 @@ int wm5100_readable_register(struct snd_soc_codec *codec, unsigned int reg) case WM5100_MIC_DETECT_1: case WM5100_MIC_DETECT_2: case WM5100_MIC_DETECT_3: + case WM5100_MISC_CONTROL: case WM5100_INPUT_ENABLES: case WM5100_INPUT_ENABLES_STATUS: case WM5100_IN1L_CONTROL: @@ -786,746 +787,746 @@ int wm5100_readable_register(struct snd_soc_codec *codec, unsigned int reg) } } -u16 wm5100_reg_defaults[WM5100_MAX_REGISTER + 1] = { - [0x0000] = 0x0000, /* R0 - software reset */ - [0x0001] = 0x0000, /* R1 - Device Revision */ - [0x0010] = 0x0801, /* R16 - Ctrl IF 1 */ - [0x0020] = 0x0000, /* R32 - Tone Generator 1 */ - [0x0030] = 0x0000, /* R48 - PWM Drive 1 */ - [0x0031] = 0x0100, /* R49 - PWM Drive 2 */ - [0x0032] = 0x0100, /* R50 - PWM Drive 3 */ - [0x0100] = 0x0002, /* R256 - Clocking 1 */ - [0x0101] = 0x0000, /* R257 - Clocking 3 */ - [0x0102] = 0x0011, /* R258 - Clocking 4 */ - [0x0103] = 0x0011, /* R259 - Clocking 5 */ - [0x0104] = 0x0011, /* R260 - Clocking 6 */ - [0x0107] = 0x0000, /* R263 - Clocking 7 */ - [0x0108] = 0x0000, /* R264 - Clocking 8 */ - [0x0120] = 0x0000, /* R288 - ASRC_ENABLE */ - [0x0121] = 0x0000, /* R289 - ASRC_STATUS */ - [0x0122] = 0x0000, /* R290 - ASRC_RATE1 */ - [0x0141] = 0x8000, /* R321 - ISRC 1 CTRL 1 */ - [0x0142] = 0x0000, /* R322 - ISRC 1 CTRL 2 */ - [0x0143] = 0x8000, /* R323 - ISRC 2 CTRL1 */ - [0x0144] = 0x0000, /* R324 - ISRC 2 CTRL 2 */ - [0x0182] = 0x0000, /* R386 - FLL1 Control 1 */ - [0x0183] = 0x0000, /* R387 - FLL1 Control 2 */ - [0x0184] = 0x0000, /* R388 - FLL1 Control 3 */ - [0x0186] = 0x0177, /* R390 - FLL1 Control 5 */ - [0x0187] = 0x0001, /* R391 - FLL1 Control 6 */ - [0x0188] = 0x0000, /* R392 - FLL1 EFS 1 */ - [0x01A2] = 0x0000, /* R418 - FLL2 Control 1 */ - [0x01A3] = 0x0000, /* R419 - FLL2 Control 2 */ - [0x01A4] = 0x0000, /* R420 - FLL2 Control 3 */ - [0x01A6] = 0x0177, /* R422 - FLL2 Control 5 */ - [0x01A7] = 0x0001, /* R423 - FLL2 Control 6 */ - [0x01A8] = 0x0000, /* R424 - FLL2 EFS 1 */ - [0x0200] = 0x0020, /* R512 - Mic Charge Pump 1 */ - [0x0201] = 0xB084, /* R513 - Mic Charge Pump 2 */ - [0x0202] = 0xBBDE, /* R514 - HP Charge Pump 1 */ - [0x0211] = 0x20D4, /* R529 - LDO1 Control */ - [0x0215] = 0x0062, /* R533 - Mic Bias Ctrl 1 */ - [0x0216] = 0x0062, /* R534 - Mic Bias Ctrl 2 */ - [0x0217] = 0x0062, /* R535 - Mic Bias Ctrl 3 */ - [0x0280] = 0x0004, /* R640 - Accessory Detect Mode 1 */ - [0x0288] = 0x0020, /* R648 - Headphone Detect 1 */ - [0x0289] = 0x0000, /* R649 - Headphone Detect 2 */ - [0x0290] = 0x1100, /* R656 - Mic Detect 1 */ - [0x0291] = 0x009F, /* R657 - Mic Detect 2 */ - [0x0292] = 0x0000, /* R658 - Mic Detect 3 */ - [0x0301] = 0x0000, /* R769 - Input Enables */ - [0x0302] = 0x0000, /* R770 - Input Enables Status */ - [0x0310] = 0x2280, /* R784 - Status */ - [0x0311] = 0x0080, /* R785 - IN1R Control */ - [0x0312] = 0x2280, /* R786 - IN2L Control */ - [0x0313] = 0x0080, /* R787 - IN2R Control */ - [0x0314] = 0x2280, /* R788 - IN3L Control */ - [0x0315] = 0x0080, /* R789 - IN3R Control */ - [0x0316] = 0x2280, /* R790 - IN4L Control */ - [0x0317] = 0x0080, /* R791 - IN4R Control */ - [0x0318] = 0x0000, /* R792 - RXANC_SRC */ - [0x0319] = 0x0022, /* R793 - Input Volume Ramp */ - [0x0320] = 0x0180, /* R800 - ADC Digital Volume 1L */ - [0x0321] = 0x0180, /* R801 - ADC Digital Volume 1R */ - [0x0322] = 0x0180, /* R802 - ADC Digital Volume 2L */ - [0x0323] = 0x0180, /* R803 - ADC Digital Volume 2R */ - [0x0324] = 0x0180, /* R804 - ADC Digital Volume 3L */ - [0x0325] = 0x0180, /* R805 - ADC Digital Volume 3R */ - [0x0326] = 0x0180, /* R806 - ADC Digital Volume 4L */ - [0x0327] = 0x0180, /* R807 - ADC Digital Volume 4R */ - [0x0401] = 0x0000, /* R1025 - Output Enables 2 */ - [0x0402] = 0x0000, /* R1026 - Output Status 1 */ - [0x0403] = 0x0000, /* R1027 - Output Status 2 */ - [0x0408] = 0x0000, /* R1032 - Channel Enables 1 */ - [0x0410] = 0x0080, /* R1040 - Out Volume 1L */ - [0x0411] = 0x0080, /* R1041 - Out Volume 1R */ - [0x0412] = 0x0080, /* R1042 - DAC Volume Limit 1L */ - [0x0413] = 0x0080, /* R1043 - DAC Volume Limit 1R */ - [0x0414] = 0x0080, /* R1044 - Out Volume 2L */ - [0x0415] = 0x0080, /* R1045 - Out Volume 2R */ - [0x0416] = 0x0080, /* R1046 - DAC Volume Limit 2L */ - [0x0417] = 0x0080, /* R1047 - DAC Volume Limit 2R */ - [0x0418] = 0x0080, /* R1048 - Out Volume 3L */ - [0x0419] = 0x0080, /* R1049 - Out Volume 3R */ - [0x041A] = 0x0080, /* R1050 - DAC Volume Limit 3L */ - [0x041B] = 0x0080, /* R1051 - DAC Volume Limit 3R */ - [0x041C] = 0x0080, /* R1052 - Out Volume 4L */ - [0x041D] = 0x0080, /* R1053 - Out Volume 4R */ - [0x041E] = 0x0080, /* R1054 - DAC Volume Limit 5L */ - [0x041F] = 0x0080, /* R1055 - DAC Volume Limit 5R */ - [0x0420] = 0x0080, /* R1056 - DAC Volume Limit 6L */ - [0x0421] = 0x0080, /* R1057 - DAC Volume Limit 6R */ - [0x0440] = 0x0000, /* R1088 - DAC AEC Control 1 */ - [0x0441] = 0x0022, /* R1089 - Output Volume Ramp */ - [0x0480] = 0x0180, /* R1152 - DAC Digital Volume 1L */ - [0x0481] = 0x0180, /* R1153 - DAC Digital Volume 1R */ - [0x0482] = 0x0180, /* R1154 - DAC Digital Volume 2L */ - [0x0483] = 0x0180, /* R1155 - DAC Digital Volume 2R */ - [0x0484] = 0x0180, /* R1156 - DAC Digital Volume 3L */ - [0x0485] = 0x0180, /* R1157 - DAC Digital Volume 3R */ - [0x0486] = 0x0180, /* R1158 - DAC Digital Volume 4L */ - [0x0487] = 0x0180, /* R1159 - DAC Digital Volume 4R */ - [0x0488] = 0x0180, /* R1160 - DAC Digital Volume 5L */ - [0x0489] = 0x0180, /* R1161 - DAC Digital Volume 5R */ - [0x048A] = 0x0180, /* R1162 - DAC Digital Volume 6L */ - [0x048B] = 0x0180, /* R1163 - DAC Digital Volume 6R */ - [0x04C0] = 0x0069, /* R1216 - PDM SPK1 CTRL 1 */ - [0x04C1] = 0x0000, /* R1217 - PDM SPK1 CTRL 2 */ - [0x04C2] = 0x0069, /* R1218 - PDM SPK2 CTRL 1 */ - [0x04C3] = 0x0000, /* R1219 - PDM SPK2 CTRL 2 */ - [0x0500] = 0x000C, /* R1280 - Audio IF 1_1 */ - [0x0501] = 0x0008, /* R1281 - Audio IF 1_2 */ - [0x0502] = 0x0000, /* R1282 - Audio IF 1_3 */ - [0x0503] = 0x0000, /* R1283 - Audio IF 1_4 */ - [0x0504] = 0x0000, /* R1284 - Audio IF 1_5 */ - [0x0505] = 0x0300, /* R1285 - Audio IF 1_6 */ - [0x0506] = 0x0300, /* R1286 - Audio IF 1_7 */ - [0x0507] = 0x1820, /* R1287 - Audio IF 1_8 */ - [0x0508] = 0x1820, /* R1288 - Audio IF 1_9 */ - [0x0509] = 0x0000, /* R1289 - Audio IF 1_10 */ - [0x050A] = 0x0001, /* R1290 - Audio IF 1_11 */ - [0x050B] = 0x0002, /* R1291 - Audio IF 1_12 */ - [0x050C] = 0x0003, /* R1292 - Audio IF 1_13 */ - [0x050D] = 0x0004, /* R1293 - Audio IF 1_14 */ - [0x050E] = 0x0005, /* R1294 - Audio IF 1_15 */ - [0x050F] = 0x0006, /* R1295 - Audio IF 1_16 */ - [0x0510] = 0x0007, /* R1296 - Audio IF 1_17 */ - [0x0511] = 0x0000, /* R1297 - Audio IF 1_18 */ - [0x0512] = 0x0001, /* R1298 - Audio IF 1_19 */ - [0x0513] = 0x0002, /* R1299 - Audio IF 1_20 */ - [0x0514] = 0x0003, /* R1300 - Audio IF 1_21 */ - [0x0515] = 0x0004, /* R1301 - Audio IF 1_22 */ - [0x0516] = 0x0005, /* R1302 - Audio IF 1_23 */ - [0x0517] = 0x0006, /* R1303 - Audio IF 1_24 */ - [0x0518] = 0x0007, /* R1304 - Audio IF 1_25 */ - [0x0519] = 0x0000, /* R1305 - Audio IF 1_26 */ - [0x051A] = 0x0000, /* R1306 - Audio IF 1_27 */ - [0x0540] = 0x000C, /* R1344 - Audio IF 2_1 */ - [0x0541] = 0x0008, /* R1345 - Audio IF 2_2 */ - [0x0542] = 0x0000, /* R1346 - Audio IF 2_3 */ - [0x0543] = 0x0000, /* R1347 - Audio IF 2_4 */ - [0x0544] = 0x0000, /* R1348 - Audio IF 2_5 */ - [0x0545] = 0x0300, /* R1349 - Audio IF 2_6 */ - [0x0546] = 0x0300, /* R1350 - Audio IF 2_7 */ - [0x0547] = 0x1820, /* R1351 - Audio IF 2_8 */ - [0x0548] = 0x1820, /* R1352 - Audio IF 2_9 */ - [0x0549] = 0x0000, /* R1353 - Audio IF 2_10 */ - [0x054A] = 0x0001, /* R1354 - Audio IF 2_11 */ - [0x0551] = 0x0000, /* R1361 - Audio IF 2_18 */ - [0x0552] = 0x0001, /* R1362 - Audio IF 2_19 */ - [0x0559] = 0x0000, /* R1369 - Audio IF 2_26 */ - [0x055A] = 0x0000, /* R1370 - Audio IF 2_27 */ - [0x0580] = 0x000C, /* R1408 - Audio IF 3_1 */ - [0x0581] = 0x0008, /* R1409 - Audio IF 3_2 */ - [0x0582] = 0x0000, /* R1410 - Audio IF 3_3 */ - [0x0583] = 0x0000, /* R1411 - Audio IF 3_4 */ - [0x0584] = 0x0000, /* R1412 - Audio IF 3_5 */ - [0x0585] = 0x0300, /* R1413 - Audio IF 3_6 */ - [0x0586] = 0x0300, /* R1414 - Audio IF 3_7 */ - [0x0587] = 0x1820, /* R1415 - Audio IF 3_8 */ - [0x0588] = 0x1820, /* R1416 - Audio IF 3_9 */ - [0x0589] = 0x0000, /* R1417 - Audio IF 3_10 */ - [0x058A] = 0x0001, /* R1418 - Audio IF 3_11 */ - [0x0591] = 0x0000, /* R1425 - Audio IF 3_18 */ - [0x0592] = 0x0001, /* R1426 - Audio IF 3_19 */ - [0x0599] = 0x0000, /* R1433 - Audio IF 3_26 */ - [0x059A] = 0x0000, /* R1434 - Audio IF 3_27 */ - [0x0640] = 0x0000, /* R1600 - PWM1MIX Input 1 Source */ - [0x0641] = 0x0080, /* R1601 - PWM1MIX Input 1 Volume */ - [0x0642] = 0x0000, /* R1602 - PWM1MIX Input 2 Source */ - [0x0643] = 0x0080, /* R1603 - PWM1MIX Input 2 Volume */ - [0x0644] = 0x0000, /* R1604 - PWM1MIX Input 3 Source */ - [0x0645] = 0x0080, /* R1605 - PWM1MIX Input 3 Volume */ - [0x0646] = 0x0000, /* R1606 - PWM1MIX Input 4 Source */ - [0x0647] = 0x0080, /* R1607 - PWM1MIX Input 4 Volume */ - [0x0648] = 0x0000, /* R1608 - PWM2MIX Input 1 Source */ - [0x0649] = 0x0080, /* R1609 - PWM2MIX Input 1 Volume */ - [0x064A] = 0x0000, /* R1610 - PWM2MIX Input 2 Source */ - [0x064B] = 0x0080, /* R1611 - PWM2MIX Input 2 Volume */ - [0x064C] = 0x0000, /* R1612 - PWM2MIX Input 3 Source */ - [0x064D] = 0x0080, /* R1613 - PWM2MIX Input 3 Volume */ - [0x064E] = 0x0000, /* R1614 - PWM2MIX Input 4 Source */ - [0x064F] = 0x0080, /* R1615 - PWM2MIX Input 4 Volume */ - [0x0680] = 0x0000, /* R1664 - OUT1LMIX Input 1 Source */ - [0x0681] = 0x0080, /* R1665 - OUT1LMIX Input 1 Volume */ - [0x0682] = 0x0000, /* R1666 - OUT1LMIX Input 2 Source */ - [0x0683] = 0x0080, /* R1667 - OUT1LMIX Input 2 Volume */ - [0x0684] = 0x0000, /* R1668 - OUT1LMIX Input 3 Source */ - [0x0685] = 0x0080, /* R1669 - OUT1LMIX Input 3 Volume */ - [0x0686] = 0x0000, /* R1670 - OUT1LMIX Input 4 Source */ - [0x0687] = 0x0080, /* R1671 - OUT1LMIX Input 4 Volume */ - [0x0688] = 0x0000, /* R1672 - OUT1RMIX Input 1 Source */ - [0x0689] = 0x0080, /* R1673 - OUT1RMIX Input 1 Volume */ - [0x068A] = 0x0000, /* R1674 - OUT1RMIX Input 2 Source */ - [0x068B] = 0x0080, /* R1675 - OUT1RMIX Input 2 Volume */ - [0x068C] = 0x0000, /* R1676 - OUT1RMIX Input 3 Source */ - [0x068D] = 0x0080, /* R1677 - OUT1RMIX Input 3 Volume */ - [0x068E] = 0x0000, /* R1678 - OUT1RMIX Input 4 Source */ - [0x068F] = 0x0080, /* R1679 - OUT1RMIX Input 4 Volume */ - [0x0690] = 0x0000, /* R1680 - OUT2LMIX Input 1 Source */ - [0x0691] = 0x0080, /* R1681 - OUT2LMIX Input 1 Volume */ - [0x0692] = 0x0000, /* R1682 - OUT2LMIX Input 2 Source */ - [0x0693] = 0x0080, /* R1683 - OUT2LMIX Input 2 Volume */ - [0x0694] = 0x0000, /* R1684 - OUT2LMIX Input 3 Source */ - [0x0695] = 0x0080, /* R1685 - OUT2LMIX Input 3 Volume */ - [0x0696] = 0x0000, /* R1686 - OUT2LMIX Input 4 Source */ - [0x0697] = 0x0080, /* R1687 - OUT2LMIX Input 4 Volume */ - [0x0698] = 0x0000, /* R1688 - OUT2RMIX Input 1 Source */ - [0x0699] = 0x0080, /* R1689 - OUT2RMIX Input 1 Volume */ - [0x069A] = 0x0000, /* R1690 - OUT2RMIX Input 2 Source */ - [0x069B] = 0x0080, /* R1691 - OUT2RMIX Input 2 Volume */ - [0x069C] = 0x0000, /* R1692 - OUT2RMIX Input 3 Source */ - [0x069D] = 0x0080, /* R1693 - OUT2RMIX Input 3 Volume */ - [0x069E] = 0x0000, /* R1694 - OUT2RMIX Input 4 Source */ - [0x069F] = 0x0080, /* R1695 - OUT2RMIX Input 4 Volume */ - [0x06A0] = 0x0000, /* R1696 - OUT3LMIX Input 1 Source */ - [0x06A1] = 0x0080, /* R1697 - OUT3LMIX Input 1 Volume */ - [0x06A2] = 0x0000, /* R1698 - OUT3LMIX Input 2 Source */ - [0x06A3] = 0x0080, /* R1699 - OUT3LMIX Input 2 Volume */ - [0x06A4] = 0x0000, /* R1700 - OUT3LMIX Input 3 Source */ - [0x06A5] = 0x0080, /* R1701 - OUT3LMIX Input 3 Volume */ - [0x06A6] = 0x0000, /* R1702 - OUT3LMIX Input 4 Source */ - [0x06A7] = 0x0080, /* R1703 - OUT3LMIX Input 4 Volume */ - [0x06A8] = 0x0000, /* R1704 - OUT3RMIX Input 1 Source */ - [0x06A9] = 0x0080, /* R1705 - OUT3RMIX Input 1 Volume */ - [0x06AA] = 0x0000, /* R1706 - OUT3RMIX Input 2 Source */ - [0x06AB] = 0x0080, /* R1707 - OUT3RMIX Input 2 Volume */ - [0x06AC] = 0x0000, /* R1708 - OUT3RMIX Input 3 Source */ - [0x06AD] = 0x0080, /* R1709 - OUT3RMIX Input 3 Volume */ - [0x06AE] = 0x0000, /* R1710 - OUT3RMIX Input 4 Source */ - [0x06AF] = 0x0080, /* R1711 - OUT3RMIX Input 4 Volume */ - [0x06B0] = 0x0000, /* R1712 - OUT4LMIX Input 1 Source */ - [0x06B1] = 0x0080, /* R1713 - OUT4LMIX Input 1 Volume */ - [0x06B2] = 0x0000, /* R1714 - OUT4LMIX Input 2 Source */ - [0x06B3] = 0x0080, /* R1715 - OUT4LMIX Input 2 Volume */ - [0x06B4] = 0x0000, /* R1716 - OUT4LMIX Input 3 Source */ - [0x06B5] = 0x0080, /* R1717 - OUT4LMIX Input 3 Volume */ - [0x06B6] = 0x0000, /* R1718 - OUT4LMIX Input 4 Source */ - [0x06B7] = 0x0080, /* R1719 - OUT4LMIX Input 4 Volume */ - [0x06B8] = 0x0000, /* R1720 - OUT4RMIX Input 1 Source */ - [0x06B9] = 0x0080, /* R1721 - OUT4RMIX Input 1 Volume */ - [0x06BA] = 0x0000, /* R1722 - OUT4RMIX Input 2 Source */ - [0x06BB] = 0x0080, /* R1723 - OUT4RMIX Input 2 Volume */ - [0x06BC] = 0x0000, /* R1724 - OUT4RMIX Input 3 Source */ - [0x06BD] = 0x0080, /* R1725 - OUT4RMIX Input 3 Volume */ - [0x06BE] = 0x0000, /* R1726 - OUT4RMIX Input 4 Source */ - [0x06BF] = 0x0080, /* R1727 - OUT4RMIX Input 4 Volume */ - [0x06C0] = 0x0000, /* R1728 - OUT5LMIX Input 1 Source */ - [0x06C1] = 0x0080, /* R1729 - OUT5LMIX Input 1 Volume */ - [0x06C2] = 0x0000, /* R1730 - OUT5LMIX Input 2 Source */ - [0x06C3] = 0x0080, /* R1731 - OUT5LMIX Input 2 Volume */ - [0x06C4] = 0x0000, /* R1732 - OUT5LMIX Input 3 Source */ - [0x06C5] = 0x0080, /* R1733 - OUT5LMIX Input 3 Volume */ - [0x06C6] = 0x0000, /* R1734 - OUT5LMIX Input 4 Source */ - [0x06C7] = 0x0080, /* R1735 - OUT5LMIX Input 4 Volume */ - [0x06C8] = 0x0000, /* R1736 - OUT5RMIX Input 1 Source */ - [0x06C9] = 0x0080, /* R1737 - OUT5RMIX Input 1 Volume */ - [0x06CA] = 0x0000, /* R1738 - OUT5RMIX Input 2 Source */ - [0x06CB] = 0x0080, /* R1739 - OUT5RMIX Input 2 Volume */ - [0x06CC] = 0x0000, /* R1740 - OUT5RMIX Input 3 Source */ - [0x06CD] = 0x0080, /* R1741 - OUT5RMIX Input 3 Volume */ - [0x06CE] = 0x0000, /* R1742 - OUT5RMIX Input 4 Source */ - [0x06CF] = 0x0080, /* R1743 - OUT5RMIX Input 4 Volume */ - [0x06D0] = 0x0000, /* R1744 - OUT6LMIX Input 1 Source */ - [0x06D1] = 0x0080, /* R1745 - OUT6LMIX Input 1 Volume */ - [0x06D2] = 0x0000, /* R1746 - OUT6LMIX Input 2 Source */ - [0x06D3] = 0x0080, /* R1747 - OUT6LMIX Input 2 Volume */ - [0x06D4] = 0x0000, /* R1748 - OUT6LMIX Input 3 Source */ - [0x06D5] = 0x0080, /* R1749 - OUT6LMIX Input 3 Volume */ - [0x06D6] = 0x0000, /* R1750 - OUT6LMIX Input 4 Source */ - [0x06D7] = 0x0080, /* R1751 - OUT6LMIX Input 4 Volume */ - [0x06D8] = 0x0000, /* R1752 - OUT6RMIX Input 1 Source */ - [0x06D9] = 0x0080, /* R1753 - OUT6RMIX Input 1 Volume */ - [0x06DA] = 0x0000, /* R1754 - OUT6RMIX Input 2 Source */ - [0x06DB] = 0x0080, /* R1755 - OUT6RMIX Input 2 Volume */ - [0x06DC] = 0x0000, /* R1756 - OUT6RMIX Input 3 Source */ - [0x06DD] = 0x0080, /* R1757 - OUT6RMIX Input 3 Volume */ - [0x06DE] = 0x0000, /* R1758 - OUT6RMIX Input 4 Source */ - [0x06DF] = 0x0080, /* R1759 - OUT6RMIX Input 4 Volume */ - [0x0700] = 0x0000, /* R1792 - AIF1TX1MIX Input 1 Source */ - [0x0701] = 0x0080, /* R1793 - AIF1TX1MIX Input 1 Volume */ - [0x0702] = 0x0000, /* R1794 - AIF1TX1MIX Input 2 Source */ - [0x0703] = 0x0080, /* R1795 - AIF1TX1MIX Input 2 Volume */ - [0x0704] = 0x0000, /* R1796 - AIF1TX1MIX Input 3 Source */ - [0x0705] = 0x0080, /* R1797 - AIF1TX1MIX Input 3 Volume */ - [0x0706] = 0x0000, /* R1798 - AIF1TX1MIX Input 4 Source */ - [0x0707] = 0x0080, /* R1799 - AIF1TX1MIX Input 4 Volume */ - [0x0708] = 0x0000, /* R1800 - AIF1TX2MIX Input 1 Source */ - [0x0709] = 0x0080, /* R1801 - AIF1TX2MIX Input 1 Volume */ - [0x070A] = 0x0000, /* R1802 - AIF1TX2MIX Input 2 Source */ - [0x070B] = 0x0080, /* R1803 - AIF1TX2MIX Input 2 Volume */ - [0x070C] = 0x0000, /* R1804 - AIF1TX2MIX Input 3 Source */ - [0x070D] = 0x0080, /* R1805 - AIF1TX2MIX Input 3 Volume */ - [0x070E] = 0x0000, /* R1806 - AIF1TX2MIX Input 4 Source */ - [0x070F] = 0x0080, /* R1807 - AIF1TX2MIX Input 4 Volume */ - [0x0710] = 0x0000, /* R1808 - AIF1TX3MIX Input 1 Source */ - [0x0711] = 0x0080, /* R1809 - AIF1TX3MIX Input 1 Volume */ - [0x0712] = 0x0000, /* R1810 - AIF1TX3MIX Input 2 Source */ - [0x0713] = 0x0080, /* R1811 - AIF1TX3MIX Input 2 Volume */ - [0x0714] = 0x0000, /* R1812 - AIF1TX3MIX Input 3 Source */ - [0x0715] = 0x0080, /* R1813 - AIF1TX3MIX Input 3 Volume */ - [0x0716] = 0x0000, /* R1814 - AIF1TX3MIX Input 4 Source */ - [0x0717] = 0x0080, /* R1815 - AIF1TX3MIX Input 4 Volume */ - [0x0718] = 0x0000, /* R1816 - AIF1TX4MIX Input 1 Source */ - [0x0719] = 0x0080, /* R1817 - AIF1TX4MIX Input 1 Volume */ - [0x071A] = 0x0000, /* R1818 - AIF1TX4MIX Input 2 Source */ - [0x071B] = 0x0080, /* R1819 - AIF1TX4MIX Input 2 Volume */ - [0x071C] = 0x0000, /* R1820 - AIF1TX4MIX Input 3 Source */ - [0x071D] = 0x0080, /* R1821 - AIF1TX4MIX Input 3 Volume */ - [0x071E] = 0x0000, /* R1822 - AIF1TX4MIX Input 4 Source */ - [0x071F] = 0x0080, /* R1823 - AIF1TX4MIX Input 4 Volume */ - [0x0720] = 0x0000, /* R1824 - AIF1TX5MIX Input 1 Source */ - [0x0721] = 0x0080, /* R1825 - AIF1TX5MIX Input 1 Volume */ - [0x0722] = 0x0000, /* R1826 - AIF1TX5MIX Input 2 Source */ - [0x0723] = 0x0080, /* R1827 - AIF1TX5MIX Input 2 Volume */ - [0x0724] = 0x0000, /* R1828 - AIF1TX5MIX Input 3 Source */ - [0x0725] = 0x0080, /* R1829 - AIF1TX5MIX Input 3 Volume */ - [0x0726] = 0x0000, /* R1830 - AIF1TX5MIX Input 4 Source */ - [0x0727] = 0x0080, /* R1831 - AIF1TX5MIX Input 4 Volume */ - [0x0728] = 0x0000, /* R1832 - AIF1TX6MIX Input 1 Source */ - [0x0729] = 0x0080, /* R1833 - AIF1TX6MIX Input 1 Volume */ - [0x072A] = 0x0000, /* R1834 - AIF1TX6MIX Input 2 Source */ - [0x072B] = 0x0080, /* R1835 - AIF1TX6MIX Input 2 Volume */ - [0x072C] = 0x0000, /* R1836 - AIF1TX6MIX Input 3 Source */ - [0x072D] = 0x0080, /* R1837 - AIF1TX6MIX Input 3 Volume */ - [0x072E] = 0x0000, /* R1838 - AIF1TX6MIX Input 4 Source */ - [0x072F] = 0x0080, /* R1839 - AIF1TX6MIX Input 4 Volume */ - [0x0730] = 0x0000, /* R1840 - AIF1TX7MIX Input 1 Source */ - [0x0731] = 0x0080, /* R1841 - AIF1TX7MIX Input 1 Volume */ - [0x0732] = 0x0000, /* R1842 - AIF1TX7MIX Input 2 Source */ - [0x0733] = 0x0080, /* R1843 - AIF1TX7MIX Input 2 Volume */ - [0x0734] = 0x0000, /* R1844 - AIF1TX7MIX Input 3 Source */ - [0x0735] = 0x0080, /* R1845 - AIF1TX7MIX Input 3 Volume */ - [0x0736] = 0x0000, /* R1846 - AIF1TX7MIX Input 4 Source */ - [0x0737] = 0x0080, /* R1847 - AIF1TX7MIX Input 4 Volume */ - [0x0738] = 0x0000, /* R1848 - AIF1TX8MIX Input 1 Source */ - [0x0739] = 0x0080, /* R1849 - AIF1TX8MIX Input 1 Volume */ - [0x073A] = 0x0000, /* R1850 - AIF1TX8MIX Input 2 Source */ - [0x073B] = 0x0080, /* R1851 - AIF1TX8MIX Input 2 Volume */ - [0x073C] = 0x0000, /* R1852 - AIF1TX8MIX Input 3 Source */ - [0x073D] = 0x0080, /* R1853 - AIF1TX8MIX Input 3 Volume */ - [0x073E] = 0x0000, /* R1854 - AIF1TX8MIX Input 4 Source */ - [0x073F] = 0x0080, /* R1855 - AIF1TX8MIX Input 4 Volume */ - [0x0740] = 0x0000, /* R1856 - AIF2TX1MIX Input 1 Source */ - [0x0741] = 0x0080, /* R1857 - AIF2TX1MIX Input 1 Volume */ - [0x0742] = 0x0000, /* R1858 - AIF2TX1MIX Input 2 Source */ - [0x0743] = 0x0080, /* R1859 - AIF2TX1MIX Input 2 Volume */ - [0x0744] = 0x0000, /* R1860 - AIF2TX1MIX Input 3 Source */ - [0x0745] = 0x0080, /* R1861 - AIF2TX1MIX Input 3 Volume */ - [0x0746] = 0x0000, /* R1862 - AIF2TX1MIX Input 4 Source */ - [0x0747] = 0x0080, /* R1863 - AIF2TX1MIX Input 4 Volume */ - [0x0748] = 0x0000, /* R1864 - AIF2TX2MIX Input 1 Source */ - [0x0749] = 0x0080, /* R1865 - AIF2TX2MIX Input 1 Volume */ - [0x074A] = 0x0000, /* R1866 - AIF2TX2MIX Input 2 Source */ - [0x074B] = 0x0080, /* R1867 - AIF2TX2MIX Input 2 Volume */ - [0x074C] = 0x0000, /* R1868 - AIF2TX2MIX Input 3 Source */ - [0x074D] = 0x0080, /* R1869 - AIF2TX2MIX Input 3 Volume */ - [0x074E] = 0x0000, /* R1870 - AIF2TX2MIX Input 4 Source */ - [0x074F] = 0x0080, /* R1871 - AIF2TX2MIX Input 4 Volume */ - [0x0780] = 0x0000, /* R1920 - AIF3TX1MIX Input 1 Source */ - [0x0781] = 0x0080, /* R1921 - AIF3TX1MIX Input 1 Volume */ - [0x0782] = 0x0000, /* R1922 - AIF3TX1MIX Input 2 Source */ - [0x0783] = 0x0080, /* R1923 - AIF3TX1MIX Input 2 Volume */ - [0x0784] = 0x0000, /* R1924 - AIF3TX1MIX Input 3 Source */ - [0x0785] = 0x0080, /* R1925 - AIF3TX1MIX Input 3 Volume */ - [0x0786] = 0x0000, /* R1926 - AIF3TX1MIX Input 4 Source */ - [0x0787] = 0x0080, /* R1927 - AIF3TX1MIX Input 4 Volume */ - [0x0788] = 0x0000, /* R1928 - AIF3TX2MIX Input 1 Source */ - [0x0789] = 0x0080, /* R1929 - AIF3TX2MIX Input 1 Volume */ - [0x078A] = 0x0000, /* R1930 - AIF3TX2MIX Input 2 Source */ - [0x078B] = 0x0080, /* R1931 - AIF3TX2MIX Input 2 Volume */ - [0x078C] = 0x0000, /* R1932 - AIF3TX2MIX Input 3 Source */ - [0x078D] = 0x0080, /* R1933 - AIF3TX2MIX Input 3 Volume */ - [0x078E] = 0x0000, /* R1934 - AIF3TX2MIX Input 4 Source */ - [0x078F] = 0x0080, /* R1935 - AIF3TX2MIX Input 4 Volume */ - [0x0880] = 0x0000, /* R2176 - EQ1MIX Input 1 Source */ - [0x0881] = 0x0080, /* R2177 - EQ1MIX Input 1 Volume */ - [0x0882] = 0x0000, /* R2178 - EQ1MIX Input 2 Source */ - [0x0883] = 0x0080, /* R2179 - EQ1MIX Input 2 Volume */ - [0x0884] = 0x0000, /* R2180 - EQ1MIX Input 3 Source */ - [0x0885] = 0x0080, /* R2181 - EQ1MIX Input 3 Volume */ - [0x0886] = 0x0000, /* R2182 - EQ1MIX Input 4 Source */ - [0x0887] = 0x0080, /* R2183 - EQ1MIX Input 4 Volume */ - [0x0888] = 0x0000, /* R2184 - EQ2MIX Input 1 Source */ - [0x0889] = 0x0080, /* R2185 - EQ2MIX Input 1 Volume */ - [0x088A] = 0x0000, /* R2186 - EQ2MIX Input 2 Source */ - [0x088B] = 0x0080, /* R2187 - EQ2MIX Input 2 Volume */ - [0x088C] = 0x0000, /* R2188 - EQ2MIX Input 3 Source */ - [0x088D] = 0x0080, /* R2189 - EQ2MIX Input 3 Volume */ - [0x088E] = 0x0000, /* R2190 - EQ2MIX Input 4 Source */ - [0x088F] = 0x0080, /* R2191 - EQ2MIX Input 4 Volume */ - [0x0890] = 0x0000, /* R2192 - EQ3MIX Input 1 Source */ - [0x0891] = 0x0080, /* R2193 - EQ3MIX Input 1 Volume */ - [0x0892] = 0x0000, /* R2194 - EQ3MIX Input 2 Source */ - [0x0893] = 0x0080, /* R2195 - EQ3MIX Input 2 Volume */ - [0x0894] = 0x0000, /* R2196 - EQ3MIX Input 3 Source */ - [0x0895] = 0x0080, /* R2197 - EQ3MIX Input 3 Volume */ - [0x0896] = 0x0000, /* R2198 - EQ3MIX Input 4 Source */ - [0x0897] = 0x0080, /* R2199 - EQ3MIX Input 4 Volume */ - [0x0898] = 0x0000, /* R2200 - EQ4MIX Input 1 Source */ - [0x0899] = 0x0080, /* R2201 - EQ4MIX Input 1 Volume */ - [0x089A] = 0x0000, /* R2202 - EQ4MIX Input 2 Source */ - [0x089B] = 0x0080, /* R2203 - EQ4MIX Input 2 Volume */ - [0x089C] = 0x0000, /* R2204 - EQ4MIX Input 3 Source */ - [0x089D] = 0x0080, /* R2205 - EQ4MIX Input 3 Volume */ - [0x089E] = 0x0000, /* R2206 - EQ4MIX Input 4 Source */ - [0x089F] = 0x0080, /* R2207 - EQ4MIX Input 4 Volume */ - [0x08C0] = 0x0000, /* R2240 - DRC1LMIX Input 1 Source */ - [0x08C1] = 0x0080, /* R2241 - DRC1LMIX Input 1 Volume */ - [0x08C2] = 0x0000, /* R2242 - DRC1LMIX Input 2 Source */ - [0x08C3] = 0x0080, /* R2243 - DRC1LMIX Input 2 Volume */ - [0x08C4] = 0x0000, /* R2244 - DRC1LMIX Input 3 Source */ - [0x08C5] = 0x0080, /* R2245 - DRC1LMIX Input 3 Volume */ - [0x08C6] = 0x0000, /* R2246 - DRC1LMIX Input 4 Source */ - [0x08C7] = 0x0080, /* R2247 - DRC1LMIX Input 4 Volume */ - [0x08C8] = 0x0000, /* R2248 - DRC1RMIX Input 1 Source */ - [0x08C9] = 0x0080, /* R2249 - DRC1RMIX Input 1 Volume */ - [0x08CA] = 0x0000, /* R2250 - DRC1RMIX Input 2 Source */ - [0x08CB] = 0x0080, /* R2251 - DRC1RMIX Input 2 Volume */ - [0x08CC] = 0x0000, /* R2252 - DRC1RMIX Input 3 Source */ - [0x08CD] = 0x0080, /* R2253 - DRC1RMIX Input 3 Volume */ - [0x08CE] = 0x0000, /* R2254 - DRC1RMIX Input 4 Source */ - [0x08CF] = 0x0080, /* R2255 - DRC1RMIX Input 4 Volume */ - [0x0900] = 0x0000, /* R2304 - HPLP1MIX Input 1 Source */ - [0x0901] = 0x0080, /* R2305 - HPLP1MIX Input 1 Volume */ - [0x0902] = 0x0000, /* R2306 - HPLP1MIX Input 2 Source */ - [0x0903] = 0x0080, /* R2307 - HPLP1MIX Input 2 Volume */ - [0x0904] = 0x0000, /* R2308 - HPLP1MIX Input 3 Source */ - [0x0905] = 0x0080, /* R2309 - HPLP1MIX Input 3 Volume */ - [0x0906] = 0x0000, /* R2310 - HPLP1MIX Input 4 Source */ - [0x0907] = 0x0080, /* R2311 - HPLP1MIX Input 4 Volume */ - [0x0908] = 0x0000, /* R2312 - HPLP2MIX Input 1 Source */ - [0x0909] = 0x0080, /* R2313 - HPLP2MIX Input 1 Volume */ - [0x090A] = 0x0000, /* R2314 - HPLP2MIX Input 2 Source */ - [0x090B] = 0x0080, /* R2315 - HPLP2MIX Input 2 Volume */ - [0x090C] = 0x0000, /* R2316 - HPLP2MIX Input 3 Source */ - [0x090D] = 0x0080, /* R2317 - HPLP2MIX Input 3 Volume */ - [0x090E] = 0x0000, /* R2318 - HPLP2MIX Input 4 Source */ - [0x090F] = 0x0080, /* R2319 - HPLP2MIX Input 4 Volume */ - [0x0910] = 0x0000, /* R2320 - HPLP3MIX Input 1 Source */ - [0x0911] = 0x0080, /* R2321 - HPLP3MIX Input 1 Volume */ - [0x0912] = 0x0000, /* R2322 - HPLP3MIX Input 2 Source */ - [0x0913] = 0x0080, /* R2323 - HPLP3MIX Input 2 Volume */ - [0x0914] = 0x0000, /* R2324 - HPLP3MIX Input 3 Source */ - [0x0915] = 0x0080, /* R2325 - HPLP3MIX Input 3 Volume */ - [0x0916] = 0x0000, /* R2326 - HPLP3MIX Input 4 Source */ - [0x0917] = 0x0080, /* R2327 - HPLP3MIX Input 4 Volume */ - [0x0918] = 0x0000, /* R2328 - HPLP4MIX Input 1 Source */ - [0x0919] = 0x0080, /* R2329 - HPLP4MIX Input 1 Volume */ - [0x091A] = 0x0000, /* R2330 - HPLP4MIX Input 2 Source */ - [0x091B] = 0x0080, /* R2331 - HPLP4MIX Input 2 Volume */ - [0x091C] = 0x0000, /* R2332 - HPLP4MIX Input 3 Source */ - [0x091D] = 0x0080, /* R2333 - HPLP4MIX Input 3 Volume */ - [0x091E] = 0x0000, /* R2334 - HPLP4MIX Input 4 Source */ - [0x091F] = 0x0080, /* R2335 - HPLP4MIX Input 4 Volume */ - [0x0940] = 0x0000, /* R2368 - DSP1LMIX Input 1 Source */ - [0x0941] = 0x0080, /* R2369 - DSP1LMIX Input 1 Volume */ - [0x0942] = 0x0000, /* R2370 - DSP1LMIX Input 2 Source */ - [0x0943] = 0x0080, /* R2371 - DSP1LMIX Input 2 Volume */ - [0x0944] = 0x0000, /* R2372 - DSP1LMIX Input 3 Source */ - [0x0945] = 0x0080, /* R2373 - DSP1LMIX Input 3 Volume */ - [0x0946] = 0x0000, /* R2374 - DSP1LMIX Input 4 Source */ - [0x0947] = 0x0080, /* R2375 - DSP1LMIX Input 4 Volume */ - [0x0948] = 0x0000, /* R2376 - DSP1RMIX Input 1 Source */ - [0x0949] = 0x0080, /* R2377 - DSP1RMIX Input 1 Volume */ - [0x094A] = 0x0000, /* R2378 - DSP1RMIX Input 2 Source */ - [0x094B] = 0x0080, /* R2379 - DSP1RMIX Input 2 Volume */ - [0x094C] = 0x0000, /* R2380 - DSP1RMIX Input 3 Source */ - [0x094D] = 0x0080, /* R2381 - DSP1RMIX Input 3 Volume */ - [0x094E] = 0x0000, /* R2382 - DSP1RMIX Input 4 Source */ - [0x094F] = 0x0080, /* R2383 - DSP1RMIX Input 4 Volume */ - [0x0950] = 0x0000, /* R2384 - DSP1AUX1MIX Input 1 Source */ - [0x0958] = 0x0000, /* R2392 - DSP1AUX2MIX Input 1 Source */ - [0x0960] = 0x0000, /* R2400 - DSP1AUX3MIX Input 1 Source */ - [0x0968] = 0x0000, /* R2408 - DSP1AUX4MIX Input 1 Source */ - [0x0970] = 0x0000, /* R2416 - DSP1AUX5MIX Input 1 Source */ - [0x0978] = 0x0000, /* R2424 - DSP1AUX6MIX Input 1 Source */ - [0x0980] = 0x0000, /* R2432 - DSP2LMIX Input 1 Source */ - [0x0981] = 0x0080, /* R2433 - DSP2LMIX Input 1 Volume */ - [0x0982] = 0x0000, /* R2434 - DSP2LMIX Input 2 Source */ - [0x0983] = 0x0080, /* R2435 - DSP2LMIX Input 2 Volume */ - [0x0984] = 0x0000, /* R2436 - DSP2LMIX Input 3 Source */ - [0x0985] = 0x0080, /* R2437 - DSP2LMIX Input 3 Volume */ - [0x0986] = 0x0000, /* R2438 - DSP2LMIX Input 4 Source */ - [0x0987] = 0x0080, /* R2439 - DSP2LMIX Input 4 Volume */ - [0x0988] = 0x0000, /* R2440 - DSP2RMIX Input 1 Source */ - [0x0989] = 0x0080, /* R2441 - DSP2RMIX Input 1 Volume */ - [0x098A] = 0x0000, /* R2442 - DSP2RMIX Input 2 Source */ - [0x098B] = 0x0080, /* R2443 - DSP2RMIX Input 2 Volume */ - [0x098C] = 0x0000, /* R2444 - DSP2RMIX Input 3 Source */ - [0x098D] = 0x0080, /* R2445 - DSP2RMIX Input 3 Volume */ - [0x098E] = 0x0000, /* R2446 - DSP2RMIX Input 4 Source */ - [0x098F] = 0x0080, /* R2447 - DSP2RMIX Input 4 Volume */ - [0x0990] = 0x0000, /* R2448 - DSP2AUX1MIX Input 1 Source */ - [0x0998] = 0x0000, /* R2456 - DSP2AUX2MIX Input 1 Source */ - [0x09A0] = 0x0000, /* R2464 - DSP2AUX3MIX Input 1 Source */ - [0x09A8] = 0x0000, /* R2472 - DSP2AUX4MIX Input 1 Source */ - [0x09B0] = 0x0000, /* R2480 - DSP2AUX5MIX Input 1 Source */ - [0x09B8] = 0x0000, /* R2488 - DSP2AUX6MIX Input 1 Source */ - [0x09C0] = 0x0000, /* R2496 - DSP3LMIX Input 1 Source */ - [0x09C1] = 0x0080, /* R2497 - DSP3LMIX Input 1 Volume */ - [0x09C2] = 0x0000, /* R2498 - DSP3LMIX Input 2 Source */ - [0x09C3] = 0x0080, /* R2499 - DSP3LMIX Input 2 Volume */ - [0x09C4] = 0x0000, /* R2500 - DSP3LMIX Input 3 Source */ - [0x09C5] = 0x0080, /* R2501 - DSP3LMIX Input 3 Volume */ - [0x09C6] = 0x0000, /* R2502 - DSP3LMIX Input 4 Source */ - [0x09C7] = 0x0080, /* R2503 - DSP3LMIX Input 4 Volume */ - [0x09C8] = 0x0000, /* R2504 - DSP3RMIX Input 1 Source */ - [0x09C9] = 0x0080, /* R2505 - DSP3RMIX Input 1 Volume */ - [0x09CA] = 0x0000, /* R2506 - DSP3RMIX Input 2 Source */ - [0x09CB] = 0x0080, /* R2507 - DSP3RMIX Input 2 Volume */ - [0x09CC] = 0x0000, /* R2508 - DSP3RMIX Input 3 Source */ - [0x09CD] = 0x0080, /* R2509 - DSP3RMIX Input 3 Volume */ - [0x09CE] = 0x0000, /* R2510 - DSP3RMIX Input 4 Source */ - [0x09CF] = 0x0080, /* R2511 - DSP3RMIX Input 4 Volume */ - [0x09D0] = 0x0000, /* R2512 - DSP3AUX1MIX Input 1 Source */ - [0x09D8] = 0x0000, /* R2520 - DSP3AUX2MIX Input 1 Source */ - [0x09E0] = 0x0000, /* R2528 - DSP3AUX3MIX Input 1 Source */ - [0x09E8] = 0x0000, /* R2536 - DSP3AUX4MIX Input 1 Source */ - [0x09F0] = 0x0000, /* R2544 - DSP3AUX5MIX Input 1 Source */ - [0x09F8] = 0x0000, /* R2552 - DSP3AUX6MIX Input 1 Source */ - [0x0A80] = 0x0000, /* R2688 - ASRC1LMIX Input 1 Source */ - [0x0A88] = 0x0000, /* R2696 - ASRC1RMIX Input 1 Source */ - [0x0A90] = 0x0000, /* R2704 - ASRC2LMIX Input 1 Source */ - [0x0A98] = 0x0000, /* R2712 - ASRC2RMIX Input 1 Source */ - [0x0B00] = 0x0000, /* R2816 - ISRC1DEC1MIX Input 1 Source */ - [0x0B08] = 0x0000, /* R2824 - ISRC1DEC2MIX Input 1 Source */ - [0x0B10] = 0x0000, /* R2832 - ISRC1DEC3MIX Input 1 Source */ - [0x0B18] = 0x0000, /* R2840 - ISRC1DEC4MIX Input 1 Source */ - [0x0B20] = 0x0000, /* R2848 - ISRC1INT1MIX Input 1 Source */ - [0x0B28] = 0x0000, /* R2856 - ISRC1INT2MIX Input 1 Source */ - [0x0B30] = 0x0000, /* R2864 - ISRC1INT3MIX Input 1 Source */ - [0x0B38] = 0x0000, /* R2872 - ISRC1INT4MIX Input 1 Source */ - [0x0B40] = 0x0000, /* R2880 - ISRC2DEC1MIX Input 1 Source */ - [0x0B48] = 0x0000, /* R2888 - ISRC2DEC2MIX Input 1 Source */ - [0x0B50] = 0x0000, /* R2896 - ISRC2DEC3MIX Input 1 Source */ - [0x0B58] = 0x0000, /* R2904 - ISRC2DEC4MIX Input 1 Source */ - [0x0B60] = 0x0000, /* R2912 - ISRC2INT1MIX Input 1 Source */ - [0x0B68] = 0x0000, /* R2920 - ISRC2INT2MIX Input 1 Source */ - [0x0B70] = 0x0000, /* R2928 - ISRC2INT3MIX Input 1 Source */ - [0x0B78] = 0x0000, /* R2936 - ISRC2INT4MIX Input 1 Source */ - [0x0C00] = 0xA001, /* R3072 - GPIO CTRL 1 */ - [0x0C01] = 0xA001, /* R3073 - GPIO CTRL 2 */ - [0x0C02] = 0xA001, /* R3074 - GPIO CTRL 3 */ - [0x0C03] = 0xA001, /* R3075 - GPIO CTRL 4 */ - [0x0C04] = 0xA001, /* R3076 - GPIO CTRL 5 */ - [0x0C05] = 0xA001, /* R3077 - GPIO CTRL 6 */ - [0x0C23] = 0x4003, /* R3107 - Misc Pad Ctrl 1 */ - [0x0C24] = 0x0000, /* R3108 - Misc Pad Ctrl 2 */ - [0x0C25] = 0x0000, /* R3109 - Misc Pad Ctrl 3 */ - [0x0C26] = 0x0000, /* R3110 - Misc Pad Ctrl 4 */ - [0x0C27] = 0x0000, /* R3111 - Misc Pad Ctrl 5 */ - [0x0C28] = 0x0000, /* R3112 - Misc GPIO 1 */ - [0x0D00] = 0x0000, /* R3328 - Interrupt Status 1 */ - [0x0D01] = 0x0000, /* R3329 - Interrupt Status 2 */ - [0x0D02] = 0x0000, /* R3330 - Interrupt Status 3 */ - [0x0D03] = 0x0000, /* R3331 - Interrupt Status 4 */ - [0x0D04] = 0x0000, /* R3332 - Interrupt Raw Status 2 */ - [0x0D05] = 0x0000, /* R3333 - Interrupt Raw Status 3 */ - [0x0D06] = 0x0000, /* R3334 - Interrupt Raw Status 4 */ - [0x0D07] = 0xFFFF, /* R3335 - Interrupt Status 1 Mask */ - [0x0D08] = 0xFFFF, /* R3336 - Interrupt Status 2 Mask */ - [0x0D09] = 0xFFFF, /* R3337 - Interrupt Status 3 Mask */ - [0x0D0A] = 0xFFFF, /* R3338 - Interrupt Status 4 Mask */ - [0x0D1F] = 0x0000, /* R3359 - Interrupt Control */ - [0x0D20] = 0xFFFF, /* R3360 - IRQ Debounce 1 */ - [0x0D21] = 0xFFFF, /* R3361 - IRQ Debounce 2 */ - [0x0E00] = 0x0000, /* R3584 - FX_Ctrl */ - [0x0E10] = 0x6318, /* R3600 - EQ1_1 */ - [0x0E11] = 0x6300, /* R3601 - EQ1_2 */ - [0x0E12] = 0x0FC8, /* R3602 - EQ1_3 */ - [0x0E13] = 0x03FE, /* R3603 - EQ1_4 */ - [0x0E14] = 0x00E0, /* R3604 - EQ1_5 */ - [0x0E15] = 0x1EC4, /* R3605 - EQ1_6 */ - [0x0E16] = 0xF136, /* R3606 - EQ1_7 */ - [0x0E17] = 0x0409, /* R3607 - EQ1_8 */ - [0x0E18] = 0x04CC, /* R3608 - EQ1_9 */ - [0x0E19] = 0x1C9B, /* R3609 - EQ1_10 */ - [0x0E1A] = 0xF337, /* R3610 - EQ1_11 */ - [0x0E1B] = 0x040B, /* R3611 - EQ1_12 */ - [0x0E1C] = 0x0CBB, /* R3612 - EQ1_13 */ - [0x0E1D] = 0x16F8, /* R3613 - EQ1_14 */ - [0x0E1E] = 0xF7D9, /* R3614 - EQ1_15 */ - [0x0E1F] = 0x040A, /* R3615 - EQ1_16 */ - [0x0E20] = 0x1F14, /* R3616 - EQ1_17 */ - [0x0E21] = 0x058C, /* R3617 - EQ1_18 */ - [0x0E22] = 0x0563, /* R3618 - EQ1_19 */ - [0x0E23] = 0x4000, /* R3619 - EQ1_20 */ - [0x0E26] = 0x6318, /* R3622 - EQ2_1 */ - [0x0E27] = 0x6300, /* R3623 - EQ2_2 */ - [0x0E28] = 0x0FC8, /* R3624 - EQ2_3 */ - [0x0E29] = 0x03FE, /* R3625 - EQ2_4 */ - [0x0E2A] = 0x00E0, /* R3626 - EQ2_5 */ - [0x0E2B] = 0x1EC4, /* R3627 - EQ2_6 */ - [0x0E2C] = 0xF136, /* R3628 - EQ2_7 */ - [0x0E2D] = 0x0409, /* R3629 - EQ2_8 */ - [0x0E2E] = 0x04CC, /* R3630 - EQ2_9 */ - [0x0E2F] = 0x1C9B, /* R3631 - EQ2_10 */ - [0x0E30] = 0xF337, /* R3632 - EQ2_11 */ - [0x0E31] = 0x040B, /* R3633 - EQ2_12 */ - [0x0E32] = 0x0CBB, /* R3634 - EQ2_13 */ - [0x0E33] = 0x16F8, /* R3635 - EQ2_14 */ - [0x0E34] = 0xF7D9, /* R3636 - EQ2_15 */ - [0x0E35] = 0x040A, /* R3637 - EQ2_16 */ - [0x0E36] = 0x1F14, /* R3638 - EQ2_17 */ - [0x0E37] = 0x058C, /* R3639 - EQ2_18 */ - [0x0E38] = 0x0563, /* R3640 - EQ2_19 */ - [0x0E39] = 0x4000, /* R3641 - EQ2_20 */ - [0x0E3C] = 0x6318, /* R3644 - EQ3_1 */ - [0x0E3D] = 0x6300, /* R3645 - EQ3_2 */ - [0x0E3E] = 0x0FC8, /* R3646 - EQ3_3 */ - [0x0E3F] = 0x03FE, /* R3647 - EQ3_4 */ - [0x0E40] = 0x00E0, /* R3648 - EQ3_5 */ - [0x0E41] = 0x1EC4, /* R3649 - EQ3_6 */ - [0x0E42] = 0xF136, /* R3650 - EQ3_7 */ - [0x0E43] = 0x0409, /* R3651 - EQ3_8 */ - [0x0E44] = 0x04CC, /* R3652 - EQ3_9 */ - [0x0E45] = 0x1C9B, /* R3653 - EQ3_10 */ - [0x0E46] = 0xF337, /* R3654 - EQ3_11 */ - [0x0E47] = 0x040B, /* R3655 - EQ3_12 */ - [0x0E48] = 0x0CBB, /* R3656 - EQ3_13 */ - [0x0E49] = 0x16F8, /* R3657 - EQ3_14 */ - [0x0E4A] = 0xF7D9, /* R3658 - EQ3_15 */ - [0x0E4B] = 0x040A, /* R3659 - EQ3_16 */ - [0x0E4C] = 0x1F14, /* R3660 - EQ3_17 */ - [0x0E4D] = 0x058C, /* R3661 - EQ3_18 */ - [0x0E4E] = 0x0563, /* R3662 - EQ3_19 */ - [0x0E4F] = 0x4000, /* R3663 - EQ3_20 */ - [0x0E52] = 0x6318, /* R3666 - EQ4_1 */ - [0x0E53] = 0x6300, /* R3667 - EQ4_2 */ - [0x0E54] = 0x0FC8, /* R3668 - EQ4_3 */ - [0x0E55] = 0x03FE, /* R3669 - EQ4_4 */ - [0x0E56] = 0x00E0, /* R3670 - EQ4_5 */ - [0x0E57] = 0x1EC4, /* R3671 - EQ4_6 */ - [0x0E58] = 0xF136, /* R3672 - EQ4_7 */ - [0x0E59] = 0x0409, /* R3673 - EQ4_8 */ - [0x0E5A] = 0x04CC, /* R3674 - EQ4_9 */ - [0x0E5B] = 0x1C9B, /* R3675 - EQ4_10 */ - [0x0E5C] = 0xF337, /* R3676 - EQ4_11 */ - [0x0E5D] = 0x040B, /* R3677 - EQ4_12 */ - [0x0E5E] = 0x0CBB, /* R3678 - EQ4_13 */ - [0x0E5F] = 0x16F8, /* R3679 - EQ4_14 */ - [0x0E60] = 0xF7D9, /* R3680 - EQ4_15 */ - [0x0E61] = 0x040A, /* R3681 - EQ4_16 */ - [0x0E62] = 0x1F14, /* R3682 - EQ4_17 */ - [0x0E63] = 0x058C, /* R3683 - EQ4_18 */ - [0x0E64] = 0x0563, /* R3684 - EQ4_19 */ - [0x0E65] = 0x4000, /* R3685 - EQ4_20 */ - [0x0E80] = 0x0018, /* R3712 - DRC1 ctrl1 */ - [0x0E81] = 0x0933, /* R3713 - DRC1 ctrl2 */ - [0x0E82] = 0x0018, /* R3714 - DRC1 ctrl3 */ - [0x0E83] = 0x0000, /* R3715 - DRC1 ctrl4 */ - [0x0E84] = 0x0000, /* R3716 - DRC1 ctrl5 */ - [0x0EC0] = 0x0000, /* R3776 - HPLPF1_1 */ - [0x0EC1] = 0x0000, /* R3777 - HPLPF1_2 */ - [0x0EC4] = 0x0000, /* R3780 - HPLPF2_1 */ - [0x0EC5] = 0x0000, /* R3781 - HPLPF2_2 */ - [0x0EC8] = 0x0000, /* R3784 - HPLPF3_1 */ - [0x0EC9] = 0x0000, /* R3785 - HPLPF3_2 */ - [0x0ECC] = 0x0000, /* R3788 - HPLPF4_1 */ - [0x0ECD] = 0x0000, /* R3789 - HPLPF4_2 */ - [0x4000] = 0x0000, /* R16384 - DSP1 DM 0 */ - [0x4001] = 0x0000, /* R16385 - DSP1 DM 1 */ - [0x4002] = 0x0000, /* R16386 - DSP1 DM 2 */ - [0x4003] = 0x0000, /* R16387 - DSP1 DM 3 */ - [0x41FC] = 0x0000, /* R16892 - DSP1 DM 508 */ - [0x41FD] = 0x0000, /* R16893 - DSP1 DM 509 */ - [0x41FE] = 0x0000, /* R16894 - DSP1 DM 510 */ - [0x41FF] = 0x0000, /* R16895 - DSP1 DM 511 */ - [0x4800] = 0x0000, /* R18432 - DSP1 PM 0 */ - [0x4801] = 0x0000, /* R18433 - DSP1 PM 1 */ - [0x4802] = 0x0000, /* R18434 - DSP1 PM 2 */ - [0x4803] = 0x0000, /* R18435 - DSP1 PM 3 */ - [0x4804] = 0x0000, /* R18436 - DSP1 PM 4 */ - [0x4805] = 0x0000, /* R18437 - DSP1 PM 5 */ - [0x4DFA] = 0x0000, /* R19962 - DSP1 PM 1530 */ - [0x4DFB] = 0x0000, /* R19963 - DSP1 PM 1531 */ - [0x4DFC] = 0x0000, /* R19964 - DSP1 PM 1532 */ - [0x4DFD] = 0x0000, /* R19965 - DSP1 PM 1533 */ - [0x4DFE] = 0x0000, /* R19966 - DSP1 PM 1534 */ - [0x4DFF] = 0x0000, /* R19967 - DSP1 PM 1535 */ - [0x5000] = 0x0000, /* R20480 - DSP1 ZM 0 */ - [0x5001] = 0x0000, /* R20481 - DSP1 ZM 1 */ - [0x5002] = 0x0000, /* R20482 - DSP1 ZM 2 */ - [0x5003] = 0x0000, /* R20483 - DSP1 ZM 3 */ - [0x57FC] = 0x0000, /* R22524 - DSP1 ZM 2044 */ - [0x57FD] = 0x0000, /* R22525 - DSP1 ZM 2045 */ - [0x57FE] = 0x0000, /* R22526 - DSP1 ZM 2046 */ - [0x57FF] = 0x0000, /* R22527 - DSP1 ZM 2047 */ - [0x6000] = 0x0000, /* R24576 - DSP2 DM 0 */ - [0x6001] = 0x0000, /* R24577 - DSP2 DM 1 */ - [0x6002] = 0x0000, /* R24578 - DSP2 DM 2 */ - [0x6003] = 0x0000, /* R24579 - DSP2 DM 3 */ - [0x61FC] = 0x0000, /* R25084 - DSP2 DM 508 */ - [0x61FD] = 0x0000, /* R25085 - DSP2 DM 509 */ - [0x61FE] = 0x0000, /* R25086 - DSP2 DM 510 */ - [0x61FF] = 0x0000, /* R25087 - DSP2 DM 511 */ - [0x6800] = 0x0000, /* R26624 - DSP2 PM 0 */ - [0x6801] = 0x0000, /* R26625 - DSP2 PM 1 */ - [0x6802] = 0x0000, /* R26626 - DSP2 PM 2 */ - [0x6803] = 0x0000, /* R26627 - DSP2 PM 3 */ - [0x6804] = 0x0000, /* R26628 - DSP2 PM 4 */ - [0x6805] = 0x0000, /* R26629 - DSP2 PM 5 */ - [0x6DFA] = 0x0000, /* R28154 - DSP2 PM 1530 */ - [0x6DFB] = 0x0000, /* R28155 - DSP2 PM 1531 */ - [0x6DFC] = 0x0000, /* R28156 - DSP2 PM 1532 */ - [0x6DFD] = 0x0000, /* R28157 - DSP2 PM 1533 */ - [0x6DFE] = 0x0000, /* R28158 - DSP2 PM 1534 */ - [0x6DFF] = 0x0000, /* R28159 - DSP2 PM 1535 */ - [0x7000] = 0x0000, /* R28672 - DSP2 ZM 0 */ - [0x7001] = 0x0000, /* R28673 - DSP2 ZM 1 */ - [0x7002] = 0x0000, /* R28674 - DSP2 ZM 2 */ - [0x7003] = 0x0000, /* R28675 - DSP2 ZM 3 */ - [0x77FC] = 0x0000, /* R30716 - DSP2 ZM 2044 */ - [0x77FD] = 0x0000, /* R30717 - DSP2 ZM 2045 */ - [0x77FE] = 0x0000, /* R30718 - DSP2 ZM 2046 */ - [0x77FF] = 0x0000, /* R30719 - DSP2 ZM 2047 */ - [0x8000] = 0x0000, /* R32768 - DSP3 DM 0 */ - [0x8001] = 0x0000, /* R32769 - DSP3 DM 1 */ - [0x8002] = 0x0000, /* R32770 - DSP3 DM 2 */ - [0x8003] = 0x0000, /* R32771 - DSP3 DM 3 */ - [0x81FC] = 0x0000, /* R33276 - DSP3 DM 508 */ - [0x81FD] = 0x0000, /* R33277 - DSP3 DM 509 */ - [0x81FE] = 0x0000, /* R33278 - DSP3 DM 510 */ - [0x81FF] = 0x0000, /* R33279 - DSP3 DM 511 */ - [0x8800] = 0x0000, /* R34816 - DSP3 PM 0 */ - [0x8801] = 0x0000, /* R34817 - DSP3 PM 1 */ - [0x8802] = 0x0000, /* R34818 - DSP3 PM 2 */ - [0x8803] = 0x0000, /* R34819 - DSP3 PM 3 */ - [0x8804] = 0x0000, /* R34820 - DSP3 PM 4 */ - [0x8805] = 0x0000, /* R34821 - DSP3 PM 5 */ - [0x8DFA] = 0x0000, /* R36346 - DSP3 PM 1530 */ - [0x8DFB] = 0x0000, /* R36347 - DSP3 PM 1531 */ - [0x8DFC] = 0x0000, /* R36348 - DSP3 PM 1532 */ - [0x8DFD] = 0x0000, /* R36349 - DSP3 PM 1533 */ - [0x8DFE] = 0x0000, /* R36350 - DSP3 PM 1534 */ - [0x8DFF] = 0x0000, /* R36351 - DSP3 PM 1535 */ - [0x9000] = 0x0000, /* R36864 - DSP3 ZM 0 */ - [0x9001] = 0x0000, /* R36865 - DSP3 ZM 1 */ - [0x9002] = 0x0000, /* R36866 - DSP3 ZM 2 */ - [0x9003] = 0x0000, /* R36867 - DSP3 ZM 3 */ - [0x97FC] = 0x0000, /* R38908 - DSP3 ZM 2044 */ - [0x97FD] = 0x0000, /* R38909 - DSP3 ZM 2045 */ - [0x97FE] = 0x0000, /* R38910 - DSP3 ZM 2046 */ - [0x97FF] = 0x0000 /* R38911 - DSP3 ZM 2047 */ +struct reg_default wm5100_reg_defaults[WM5100_REGISTER_COUNT] = { + { 0x0000, 0x0000 }, /* R0 - software reset */ + { 0x0001, 0x0000 }, /* R1 - Device Revision */ + { 0x0010, 0x0801 }, /* R16 - Ctrl IF 1 */ + { 0x0020, 0x0000 }, /* R32 - Tone Generator 1 */ + { 0x0030, 0x0000 }, /* R48 - PWM Drive 1 */ + { 0x0031, 0x0100 }, /* R49 - PWM Drive 2 */ + { 0x0032, 0x0100 }, /* R50 - PWM Drive 3 */ + { 0x0100, 0x0002 }, /* R256 - Clocking 1 */ + { 0x0101, 0x0000 }, /* R257 - Clocking 3 */ + { 0x0102, 0x0011 }, /* R258 - Clocking 4 */ + { 0x0103, 0x0011 }, /* R259 - Clocking 5 */ + { 0x0104, 0x0011 }, /* R260 - Clocking 6 */ + { 0x0107, 0x0000 }, /* R263 - Clocking 7 */ + { 0x0108, 0x0000 }, /* R264 - Clocking 8 */ + { 0x0120, 0x0000 }, /* R288 - ASRC_ENABLE */ + { 0x0121, 0x0000 }, /* R289 - ASRC_STATUS */ + { 0x0122, 0x0000 }, /* R290 - ASRC_RATE1 */ + { 0x0141, 0x8000 }, /* R321 - ISRC 1 CTRL 1 */ + { 0x0142, 0x0000 }, /* R322 - ISRC 1 CTRL 2 */ + { 0x0143, 0x8000 }, /* R323 - ISRC 2 CTRL1 */ + { 0x0144, 0x0000 }, /* R324 - ISRC 2 CTRL 2 */ + { 0x0182, 0x0000 }, /* R386 - FLL1 Control 1 */ + { 0x0183, 0x0000 }, /* R387 - FLL1 Control 2 */ + { 0x0184, 0x0000 }, /* R388 - FLL1 Control 3 */ + { 0x0186, 0x0177 }, /* R390 - FLL1 Control 5 */ + { 0x0187, 0x0001 }, /* R391 - FLL1 Control 6 */ + { 0x0188, 0x0000 }, /* R392 - FLL1 EFS 1 */ + { 0x01A2, 0x0000 }, /* R418 - FLL2 Control 1 */ + { 0x01A3, 0x0000 }, /* R419 - FLL2 Control 2 */ + { 0x01A4, 0x0000 }, /* R420 - FLL2 Control 3 */ + { 0x01A6, 0x0177 }, /* R422 - FLL2 Control 5 */ + { 0x01A7, 0x0001 }, /* R423 - FLL2 Control 6 */ + { 0x01A8, 0x0000 }, /* R424 - FLL2 EFS 1 */ + { 0x0200, 0x0020 }, /* R512 - Mic Charge Pump 1 */ + { 0x0201, 0xB084 }, /* R513 - Mic Charge Pump 2 */ + { 0x0202, 0xBBDE }, /* R514 - HP Charge Pump 1 */ + { 0x0211, 0x20D4 }, /* R529 - LDO1 Control */ + { 0x0215, 0x0062 }, /* R533 - Mic Bias Ctrl 1 */ + { 0x0216, 0x0062 }, /* R534 - Mic Bias Ctrl 2 */ + { 0x0217, 0x0062 }, /* R535 - Mic Bias Ctrl 3 */ + { 0x0280, 0x0004 }, /* R640 - Accessory Detect Mode 1 */ + { 0x0288, 0x0020 }, /* R648 - Headphone Detect 1 */ + { 0x0289, 0x0000 }, /* R649 - Headphone Detect 2 */ + { 0x0290, 0x1100 }, /* R656 - Mic Detect 1 */ + { 0x0291, 0x009F }, /* R657 - Mic Detect 2 */ + { 0x0292, 0x0000 }, /* R658 - Mic Detect 3 */ + { 0x0301, 0x0000 }, /* R769 - Input Enables */ + { 0x0302, 0x0000 }, /* R770 - Input Enables Status */ + { 0x0310, 0x2280 }, /* R784 - Status */ + { 0x0311, 0x0080 }, /* R785 - IN1R Control */ + { 0x0312, 0x2280 }, /* R786 - IN2L Control */ + { 0x0313, 0x0080 }, /* R787 - IN2R Control */ + { 0x0314, 0x2280 }, /* R788 - IN3L Control */ + { 0x0315, 0x0080 }, /* R789 - IN3R Control */ + { 0x0316, 0x2280 }, /* R790 - IN4L Control */ + { 0x0317, 0x0080 }, /* R791 - IN4R Control */ + { 0x0318, 0x0000 }, /* R792 - RXANC_SRC */ + { 0x0319, 0x0022 }, /* R793 - Input Volume Ramp */ + { 0x0320, 0x0180 }, /* R800 - ADC Digital Volume 1L */ + { 0x0321, 0x0180 }, /* R801 - ADC Digital Volume 1R */ + { 0x0322, 0x0180 }, /* R802 - ADC Digital Volume 2L */ + { 0x0323, 0x0180 }, /* R803 - ADC Digital Volume 2R */ + { 0x0324, 0x0180 }, /* R804 - ADC Digital Volume 3L */ + { 0x0325, 0x0180 }, /* R805 - ADC Digital Volume 3R */ + { 0x0326, 0x0180 }, /* R806 - ADC Digital Volume 4L */ + { 0x0327, 0x0180 }, /* R807 - ADC Digital Volume 4R */ + { 0x0401, 0x0000 }, /* R1025 - Output Enables 2 */ + { 0x0402, 0x0000 }, /* R1026 - Output Status 1 */ + { 0x0403, 0x0000 }, /* R1027 - Output Status 2 */ + { 0x0408, 0x0000 }, /* R1032 - Channel Enables 1 */ + { 0x0410, 0x0080 }, /* R1040 - Out Volume 1L */ + { 0x0411, 0x0080 }, /* R1041 - Out Volume 1R */ + { 0x0412, 0x0080 }, /* R1042 - DAC Volume Limit 1L */ + { 0x0413, 0x0080 }, /* R1043 - DAC Volume Limit 1R */ + { 0x0414, 0x0080 }, /* R1044 - Out Volume 2L */ + { 0x0415, 0x0080 }, /* R1045 - Out Volume 2R */ + { 0x0416, 0x0080 }, /* R1046 - DAC Volume Limit 2L */ + { 0x0417, 0x0080 }, /* R1047 - DAC Volume Limit 2R */ + { 0x0418, 0x0080 }, /* R1048 - Out Volume 3L */ + { 0x0419, 0x0080 }, /* R1049 - Out Volume 3R */ + { 0x041A, 0x0080 }, /* R1050 - DAC Volume Limit 3L */ + { 0x041B, 0x0080 }, /* R1051 - DAC Volume Limit 3R */ + { 0x041C, 0x0080 }, /* R1052 - Out Volume 4L */ + { 0x041D, 0x0080 }, /* R1053 - Out Volume 4R */ + { 0x041E, 0x0080 }, /* R1054 - DAC Volume Limit 5L */ + { 0x041F, 0x0080 }, /* R1055 - DAC Volume Limit 5R */ + { 0x0420, 0x0080 }, /* R1056 - DAC Volume Limit 6L */ + { 0x0421, 0x0080 }, /* R1057 - DAC Volume Limit 6R */ + { 0x0440, 0x0000 }, /* R1088 - DAC AEC Control 1 */ + { 0x0441, 0x0022 }, /* R1089 - Output Volume Ramp */ + { 0x0480, 0x0180 }, /* R1152 - DAC Digital Volume 1L */ + { 0x0481, 0x0180 }, /* R1153 - DAC Digital Volume 1R */ + { 0x0482, 0x0180 }, /* R1154 - DAC Digital Volume 2L */ + { 0x0483, 0x0180 }, /* R1155 - DAC Digital Volume 2R */ + { 0x0484, 0x0180 }, /* R1156 - DAC Digital Volume 3L */ + { 0x0485, 0x0180 }, /* R1157 - DAC Digital Volume 3R */ + { 0x0486, 0x0180 }, /* R1158 - DAC Digital Volume 4L */ + { 0x0487, 0x0180 }, /* R1159 - DAC Digital Volume 4R */ + { 0x0488, 0x0180 }, /* R1160 - DAC Digital Volume 5L */ + { 0x0489, 0x0180 }, /* R1161 - DAC Digital Volume 5R */ + { 0x048A, 0x0180 }, /* R1162 - DAC Digital Volume 6L */ + { 0x048B, 0x0180 }, /* R1163 - DAC Digital Volume 6R */ + { 0x04C0, 0x0069 }, /* R1216 - PDM SPK1 CTRL 1 */ + { 0x04C1, 0x0000 }, /* R1217 - PDM SPK1 CTRL 2 */ + { 0x04C2, 0x0069 }, /* R1218 - PDM SPK2 CTRL 1 */ + { 0x04C3, 0x0000 }, /* R1219 - PDM SPK2 CTRL 2 */ + { 0x0500, 0x000C }, /* R1280 - Audio IF 1_1 */ + { 0x0501, 0x0008 }, /* R1281 - Audio IF 1_2 */ + { 0x0502, 0x0000 }, /* R1282 - Audio IF 1_3 */ + { 0x0503, 0x0000 }, /* R1283 - Audio IF 1_4 */ + { 0x0504, 0x0000 }, /* R1284 - Audio IF 1_5 */ + { 0x0505, 0x0300 }, /* R1285 - Audio IF 1_6 */ + { 0x0506, 0x0300 }, /* R1286 - Audio IF 1_7 */ + { 0x0507, 0x1820 }, /* R1287 - Audio IF 1_8 */ + { 0x0508, 0x1820 }, /* R1288 - Audio IF 1_9 */ + { 0x0509, 0x0000 }, /* R1289 - Audio IF 1_10 */ + { 0x050A, 0x0001 }, /* R1290 - Audio IF 1_11 */ + { 0x050B, 0x0002 }, /* R1291 - Audio IF 1_12 */ + { 0x050C, 0x0003 }, /* R1292 - Audio IF 1_13 */ + { 0x050D, 0x0004 }, /* R1293 - Audio IF 1_14 */ + { 0x050E, 0x0005 }, /* R1294 - Audio IF 1_15 */ + { 0x050F, 0x0006 }, /* R1295 - Audio IF 1_16 */ + { 0x0510, 0x0007 }, /* R1296 - Audio IF 1_17 */ + { 0x0511, 0x0000 }, /* R1297 - Audio IF 1_18 */ + { 0x0512, 0x0001 }, /* R1298 - Audio IF 1_19 */ + { 0x0513, 0x0002 }, /* R1299 - Audio IF 1_20 */ + { 0x0514, 0x0003 }, /* R1300 - Audio IF 1_21 */ + { 0x0515, 0x0004 }, /* R1301 - Audio IF 1_22 */ + { 0x0516, 0x0005 }, /* R1302 - Audio IF 1_23 */ + { 0x0517, 0x0006 }, /* R1303 - Audio IF 1_24 */ + { 0x0518, 0x0007 }, /* R1304 - Audio IF 1_25 */ + { 0x0519, 0x0000 }, /* R1305 - Audio IF 1_26 */ + { 0x051A, 0x0000 }, /* R1306 - Audio IF 1_27 */ + { 0x0540, 0x000C }, /* R1344 - Audio IF 2_1 */ + { 0x0541, 0x0008 }, /* R1345 - Audio IF 2_2 */ + { 0x0542, 0x0000 }, /* R1346 - Audio IF 2_3 */ + { 0x0543, 0x0000 }, /* R1347 - Audio IF 2_4 */ + { 0x0544, 0x0000 }, /* R1348 - Audio IF 2_5 */ + { 0x0545, 0x0300 }, /* R1349 - Audio IF 2_6 */ + { 0x0546, 0x0300 }, /* R1350 - Audio IF 2_7 */ + { 0x0547, 0x1820 }, /* R1351 - Audio IF 2_8 */ + { 0x0548, 0x1820 }, /* R1352 - Audio IF 2_9 */ + { 0x0549, 0x0000 }, /* R1353 - Audio IF 2_10 */ + { 0x054A, 0x0001 }, /* R1354 - Audio IF 2_11 */ + { 0x0551, 0x0000 }, /* R1361 - Audio IF 2_18 */ + { 0x0552, 0x0001 }, /* R1362 - Audio IF 2_19 */ + { 0x0559, 0x0000 }, /* R1369 - Audio IF 2_26 */ + { 0x055A, 0x0000 }, /* R1370 - Audio IF 2_27 */ + { 0x0580, 0x000C }, /* R1408 - Audio IF 3_1 */ + { 0x0581, 0x0008 }, /* R1409 - Audio IF 3_2 */ + { 0x0582, 0x0000 }, /* R1410 - Audio IF 3_3 */ + { 0x0583, 0x0000 }, /* R1411 - Audio IF 3_4 */ + { 0x0584, 0x0000 }, /* R1412 - Audio IF 3_5 */ + { 0x0585, 0x0300 }, /* R1413 - Audio IF 3_6 */ + { 0x0586, 0x0300 }, /* R1414 - Audio IF 3_7 */ + { 0x0587, 0x1820 }, /* R1415 - Audio IF 3_8 */ + { 0x0588, 0x1820 }, /* R1416 - Audio IF 3_9 */ + { 0x0589, 0x0000 }, /* R1417 - Audio IF 3_10 */ + { 0x058A, 0x0001 }, /* R1418 - Audio IF 3_11 */ + { 0x0591, 0x0000 }, /* R1425 - Audio IF 3_18 */ + { 0x0592, 0x0001 }, /* R1426 - Audio IF 3_19 */ + { 0x0599, 0x0000 }, /* R1433 - Audio IF 3_26 */ + { 0x059A, 0x0000 }, /* R1434 - Audio IF 3_27 */ + { 0x0640, 0x0000 }, /* R1600 - PWM1MIX Input 1 Source */ + { 0x0641, 0x0080 }, /* R1601 - PWM1MIX Input 1 Volume */ + { 0x0642, 0x0000 }, /* R1602 - PWM1MIX Input 2 Source */ + { 0x0643, 0x0080 }, /* R1603 - PWM1MIX Input 2 Volume */ + { 0x0644, 0x0000 }, /* R1604 - PWM1MIX Input 3 Source */ + { 0x0645, 0x0080 }, /* R1605 - PWM1MIX Input 3 Volume */ + { 0x0646, 0x0000 }, /* R1606 - PWM1MIX Input 4 Source */ + { 0x0647, 0x0080 }, /* R1607 - PWM1MIX Input 4 Volume */ + { 0x0648, 0x0000 }, /* R1608 - PWM2MIX Input 1 Source */ + { 0x0649, 0x0080 }, /* R1609 - PWM2MIX Input 1 Volume */ + { 0x064A, 0x0000 }, /* R1610 - PWM2MIX Input 2 Source */ + { 0x064B, 0x0080 }, /* R1611 - PWM2MIX Input 2 Volume */ + { 0x064C, 0x0000 }, /* R1612 - PWM2MIX Input 3 Source */ + { 0x064D, 0x0080 }, /* R1613 - PWM2MIX Input 3 Volume */ + { 0x064E, 0x0000 }, /* R1614 - PWM2MIX Input 4 Source */ + { 0x064F, 0x0080 }, /* R1615 - PWM2MIX Input 4 Volume */ + { 0x0680, 0x0000 }, /* R1664 - OUT1LMIX Input 1 Source */ + { 0x0681, 0x0080 }, /* R1665 - OUT1LMIX Input 1 Volume */ + { 0x0682, 0x0000 }, /* R1666 - OUT1LMIX Input 2 Source */ + { 0x0683, 0x0080 }, /* R1667 - OUT1LMIX Input 2 Volume */ + { 0x0684, 0x0000 }, /* R1668 - OUT1LMIX Input 3 Source */ + { 0x0685, 0x0080 }, /* R1669 - OUT1LMIX Input 3 Volume */ + { 0x0686, 0x0000 }, /* R1670 - OUT1LMIX Input 4 Source */ + { 0x0687, 0x0080 }, /* R1671 - OUT1LMIX Input 4 Volume */ + { 0x0688, 0x0000 }, /* R1672 - OUT1RMIX Input 1 Source */ + { 0x0689, 0x0080 }, /* R1673 - OUT1RMIX Input 1 Volume */ + { 0x068A, 0x0000 }, /* R1674 - OUT1RMIX Input 2 Source */ + { 0x068B, 0x0080 }, /* R1675 - OUT1RMIX Input 2 Volume */ + { 0x068C, 0x0000 }, /* R1676 - OUT1RMIX Input 3 Source */ + { 0x068D, 0x0080 }, /* R1677 - OUT1RMIX Input 3 Volume */ + { 0x068E, 0x0000 }, /* R1678 - OUT1RMIX Input 4 Source */ + { 0x068F, 0x0080 }, /* R1679 - OUT1RMIX Input 4 Volume */ + { 0x0690, 0x0000 }, /* R1680 - OUT2LMIX Input 1 Source */ + { 0x0691, 0x0080 }, /* R1681 - OUT2LMIX Input 1 Volume */ + { 0x0692, 0x0000 }, /* R1682 - OUT2LMIX Input 2 Source */ + { 0x0693, 0x0080 }, /* R1683 - OUT2LMIX Input 2 Volume */ + { 0x0694, 0x0000 }, /* R1684 - OUT2LMIX Input 3 Source */ + { 0x0695, 0x0080 }, /* R1685 - OUT2LMIX Input 3 Volume */ + { 0x0696, 0x0000 }, /* R1686 - OUT2LMIX Input 4 Source */ + { 0x0697, 0x0080 }, /* R1687 - OUT2LMIX Input 4 Volume */ + { 0x0698, 0x0000 }, /* R1688 - OUT2RMIX Input 1 Source */ + { 0x0699, 0x0080 }, /* R1689 - OUT2RMIX Input 1 Volume */ + { 0x069A, 0x0000 }, /* R1690 - OUT2RMIX Input 2 Source */ + { 0x069B, 0x0080 }, /* R1691 - OUT2RMIX Input 2 Volume */ + { 0x069C, 0x0000 }, /* R1692 - OUT2RMIX Input 3 Source */ + { 0x069D, 0x0080 }, /* R1693 - OUT2RMIX Input 3 Volume */ + { 0x069E, 0x0000 }, /* R1694 - OUT2RMIX Input 4 Source */ + { 0x069F, 0x0080 }, /* R1695 - OUT2RMIX Input 4 Volume */ + { 0x06A0, 0x0000 }, /* R1696 - OUT3LMIX Input 1 Source */ + { 0x06A1, 0x0080 }, /* R1697 - OUT3LMIX Input 1 Volume */ + { 0x06A2, 0x0000 }, /* R1698 - OUT3LMIX Input 2 Source */ + { 0x06A3, 0x0080 }, /* R1699 - OUT3LMIX Input 2 Volume */ + { 0x06A4, 0x0000 }, /* R1700 - OUT3LMIX Input 3 Source */ + { 0x06A5, 0x0080 }, /* R1701 - OUT3LMIX Input 3 Volume */ + { 0x06A6, 0x0000 }, /* R1702 - OUT3LMIX Input 4 Source */ + { 0x06A7, 0x0080 }, /* R1703 - OUT3LMIX Input 4 Volume */ + { 0x06A8, 0x0000 }, /* R1704 - OUT3RMIX Input 1 Source */ + { 0x06A9, 0x0080 }, /* R1705 - OUT3RMIX Input 1 Volume */ + { 0x06AA, 0x0000 }, /* R1706 - OUT3RMIX Input 2 Source */ + { 0x06AB, 0x0080 }, /* R1707 - OUT3RMIX Input 2 Volume */ + { 0x06AC, 0x0000 }, /* R1708 - OUT3RMIX Input 3 Source */ + { 0x06AD, 0x0080 }, /* R1709 - OUT3RMIX Input 3 Volume */ + { 0x06AE, 0x0000 }, /* R1710 - OUT3RMIX Input 4 Source */ + { 0x06AF, 0x0080 }, /* R1711 - OUT3RMIX Input 4 Volume */ + { 0x06B0, 0x0000 }, /* R1712 - OUT4LMIX Input 1 Source */ + { 0x06B1, 0x0080 }, /* R1713 - OUT4LMIX Input 1 Volume */ + { 0x06B2, 0x0000 }, /* R1714 - OUT4LMIX Input 2 Source */ + { 0x06B3, 0x0080 }, /* R1715 - OUT4LMIX Input 2 Volume */ + { 0x06B4, 0x0000 }, /* R1716 - OUT4LMIX Input 3 Source */ + { 0x06B5, 0x0080 }, /* R1717 - OUT4LMIX Input 3 Volume */ + { 0x06B6, 0x0000 }, /* R1718 - OUT4LMIX Input 4 Source */ + { 0x06B7, 0x0080 }, /* R1719 - OUT4LMIX Input 4 Volume */ + { 0x06B8, 0x0000 }, /* R1720 - OUT4RMIX Input 1 Source */ + { 0x06B9, 0x0080 }, /* R1721 - OUT4RMIX Input 1 Volume */ + { 0x06BA, 0x0000 }, /* R1722 - OUT4RMIX Input 2 Source */ + { 0x06BB, 0x0080 }, /* R1723 - OUT4RMIX Input 2 Volume */ + { 0x06BC, 0x0000 }, /* R1724 - OUT4RMIX Input 3 Source */ + { 0x06BD, 0x0080 }, /* R1725 - OUT4RMIX Input 3 Volume */ + { 0x06BE, 0x0000 }, /* R1726 - OUT4RMIX Input 4 Source */ + { 0x06BF, 0x0080 }, /* R1727 - OUT4RMIX Input 4 Volume */ + { 0x06C0, 0x0000 }, /* R1728 - OUT5LMIX Input 1 Source */ + { 0x06C1, 0x0080 }, /* R1729 - OUT5LMIX Input 1 Volume */ + { 0x06C2, 0x0000 }, /* R1730 - OUT5LMIX Input 2 Source */ + { 0x06C3, 0x0080 }, /* R1731 - OUT5LMIX Input 2 Volume */ + { 0x06C4, 0x0000 }, /* R1732 - OUT5LMIX Input 3 Source */ + { 0x06C5, 0x0080 }, /* R1733 - OUT5LMIX Input 3 Volume */ + { 0x06C6, 0x0000 }, /* R1734 - OUT5LMIX Input 4 Source */ + { 0x06C7, 0x0080 }, /* R1735 - OUT5LMIX Input 4 Volume */ + { 0x06C8, 0x0000 }, /* R1736 - OUT5RMIX Input 1 Source */ + { 0x06C9, 0x0080 }, /* R1737 - OUT5RMIX Input 1 Volume */ + { 0x06CA, 0x0000 }, /* R1738 - OUT5RMIX Input 2 Source */ + { 0x06CB, 0x0080 }, /* R1739 - OUT5RMIX Input 2 Volume */ + { 0x06CC, 0x0000 }, /* R1740 - OUT5RMIX Input 3 Source */ + { 0x06CD, 0x0080 }, /* R1741 - OUT5RMIX Input 3 Volume */ + { 0x06CE, 0x0000 }, /* R1742 - OUT5RMIX Input 4 Source */ + { 0x06CF, 0x0080 }, /* R1743 - OUT5RMIX Input 4 Volume */ + { 0x06D0, 0x0000 }, /* R1744 - OUT6LMIX Input 1 Source */ + { 0x06D1, 0x0080 }, /* R1745 - OUT6LMIX Input 1 Volume */ + { 0x06D2, 0x0000 }, /* R1746 - OUT6LMIX Input 2 Source */ + { 0x06D3, 0x0080 }, /* R1747 - OUT6LMIX Input 2 Volume */ + { 0x06D4, 0x0000 }, /* R1748 - OUT6LMIX Input 3 Source */ + { 0x06D5, 0x0080 }, /* R1749 - OUT6LMIX Input 3 Volume */ + { 0x06D6, 0x0000 }, /* R1750 - OUT6LMIX Input 4 Source */ + { 0x06D7, 0x0080 }, /* R1751 - OUT6LMIX Input 4 Volume */ + { 0x06D8, 0x0000 }, /* R1752 - OUT6RMIX Input 1 Source */ + { 0x06D9, 0x0080 }, /* R1753 - OUT6RMIX Input 1 Volume */ + { 0x06DA, 0x0000 }, /* R1754 - OUT6RMIX Input 2 Source */ + { 0x06DB, 0x0080 }, /* R1755 - OUT6RMIX Input 2 Volume */ + { 0x06DC, 0x0000 }, /* R1756 - OUT6RMIX Input 3 Source */ + { 0x06DD, 0x0080 }, /* R1757 - OUT6RMIX Input 3 Volume */ + { 0x06DE, 0x0000 }, /* R1758 - OUT6RMIX Input 4 Source */ + { 0x06DF, 0x0080 }, /* R1759 - OUT6RMIX Input 4 Volume */ + { 0x0700, 0x0000 }, /* R1792 - AIF1TX1MIX Input 1 Source */ + { 0x0701, 0x0080 }, /* R1793 - AIF1TX1MIX Input 1 Volume */ + { 0x0702, 0x0000 }, /* R1794 - AIF1TX1MIX Input 2 Source */ + { 0x0703, 0x0080 }, /* R1795 - AIF1TX1MIX Input 2 Volume */ + { 0x0704, 0x0000 }, /* R1796 - AIF1TX1MIX Input 3 Source */ + { 0x0705, 0x0080 }, /* R1797 - AIF1TX1MIX Input 3 Volume */ + { 0x0706, 0x0000 }, /* R1798 - AIF1TX1MIX Input 4 Source */ + { 0x0707, 0x0080 }, /* R1799 - AIF1TX1MIX Input 4 Volume */ + { 0x0708, 0x0000 }, /* R1800 - AIF1TX2MIX Input 1 Source */ + { 0x0709, 0x0080 }, /* R1801 - AIF1TX2MIX Input 1 Volume */ + { 0x070A, 0x0000 }, /* R1802 - AIF1TX2MIX Input 2 Source */ + { 0x070B, 0x0080 }, /* R1803 - AIF1TX2MIX Input 2 Volume */ + { 0x070C, 0x0000 }, /* R1804 - AIF1TX2MIX Input 3 Source */ + { 0x070D, 0x0080 }, /* R1805 - AIF1TX2MIX Input 3 Volume */ + { 0x070E, 0x0000 }, /* R1806 - AIF1TX2MIX Input 4 Source */ + { 0x070F, 0x0080 }, /* R1807 - AIF1TX2MIX Input 4 Volume */ + { 0x0710, 0x0000 }, /* R1808 - AIF1TX3MIX Input 1 Source */ + { 0x0711, 0x0080 }, /* R1809 - AIF1TX3MIX Input 1 Volume */ + { 0x0712, 0x0000 }, /* R1810 - AIF1TX3MIX Input 2 Source */ + { 0x0713, 0x0080 }, /* R1811 - AIF1TX3MIX Input 2 Volume */ + { 0x0714, 0x0000 }, /* R1812 - AIF1TX3MIX Input 3 Source */ + { 0x0715, 0x0080 }, /* R1813 - AIF1TX3MIX Input 3 Volume */ + { 0x0716, 0x0000 }, /* R1814 - AIF1TX3MIX Input 4 Source */ + { 0x0717, 0x0080 }, /* R1815 - AIF1TX3MIX Input 4 Volume */ + { 0x0718, 0x0000 }, /* R1816 - AIF1TX4MIX Input 1 Source */ + { 0x0719, 0x0080 }, /* R1817 - AIF1TX4MIX Input 1 Volume */ + { 0x071A, 0x0000 }, /* R1818 - AIF1TX4MIX Input 2 Source */ + { 0x071B, 0x0080 }, /* R1819 - AIF1TX4MIX Input 2 Volume */ + { 0x071C, 0x0000 }, /* R1820 - AIF1TX4MIX Input 3 Source */ + { 0x071D, 0x0080 }, /* R1821 - AIF1TX4MIX Input 3 Volume */ + { 0x071E, 0x0000 }, /* R1822 - AIF1TX4MIX Input 4 Source */ + { 0x071F, 0x0080 }, /* R1823 - AIF1TX4MIX Input 4 Volume */ + { 0x0720, 0x0000 }, /* R1824 - AIF1TX5MIX Input 1 Source */ + { 0x0721, 0x0080 }, /* R1825 - AIF1TX5MIX Input 1 Volume */ + { 0x0722, 0x0000 }, /* R1826 - AIF1TX5MIX Input 2 Source */ + { 0x0723, 0x0080 }, /* R1827 - AIF1TX5MIX Input 2 Volume */ + { 0x0724, 0x0000 }, /* R1828 - AIF1TX5MIX Input 3 Source */ + { 0x0725, 0x0080 }, /* R1829 - AIF1TX5MIX Input 3 Volume */ + { 0x0726, 0x0000 }, /* R1830 - AIF1TX5MIX Input 4 Source */ + { 0x0727, 0x0080 }, /* R1831 - AIF1TX5MIX Input 4 Volume */ + { 0x0728, 0x0000 }, /* R1832 - AIF1TX6MIX Input 1 Source */ + { 0x0729, 0x0080 }, /* R1833 - AIF1TX6MIX Input 1 Volume */ + { 0x072A, 0x0000 }, /* R1834 - AIF1TX6MIX Input 2 Source */ + { 0x072B, 0x0080 }, /* R1835 - AIF1TX6MIX Input 2 Volume */ + { 0x072C, 0x0000 }, /* R1836 - AIF1TX6MIX Input 3 Source */ + { 0x072D, 0x0080 }, /* R1837 - AIF1TX6MIX Input 3 Volume */ + { 0x072E, 0x0000 }, /* R1838 - AIF1TX6MIX Input 4 Source */ + { 0x072F, 0x0080 }, /* R1839 - AIF1TX6MIX Input 4 Volume */ + { 0x0730, 0x0000 }, /* R1840 - AIF1TX7MIX Input 1 Source */ + { 0x0731, 0x0080 }, /* R1841 - AIF1TX7MIX Input 1 Volume */ + { 0x0732, 0x0000 }, /* R1842 - AIF1TX7MIX Input 2 Source */ + { 0x0733, 0x0080 }, /* R1843 - AIF1TX7MIX Input 2 Volume */ + { 0x0734, 0x0000 }, /* R1844 - AIF1TX7MIX Input 3 Source */ + { 0x0735, 0x0080 }, /* R1845 - AIF1TX7MIX Input 3 Volume */ + { 0x0736, 0x0000 }, /* R1846 - AIF1TX7MIX Input 4 Source */ + { 0x0737, 0x0080 }, /* R1847 - AIF1TX7MIX Input 4 Volume */ + { 0x0738, 0x0000 }, /* R1848 - AIF1TX8MIX Input 1 Source */ + { 0x0739, 0x0080 }, /* R1849 - AIF1TX8MIX Input 1 Volume */ + { 0x073A, 0x0000 }, /* R1850 - AIF1TX8MIX Input 2 Source */ + { 0x073B, 0x0080 }, /* R1851 - AIF1TX8MIX Input 2 Volume */ + { 0x073C, 0x0000 }, /* R1852 - AIF1TX8MIX Input 3 Source */ + { 0x073D, 0x0080 }, /* R1853 - AIF1TX8MIX Input 3 Volume */ + { 0x073E, 0x0000 }, /* R1854 - AIF1TX8MIX Input 4 Source */ + { 0x073F, 0x0080 }, /* R1855 - AIF1TX8MIX Input 4 Volume */ + { 0x0740, 0x0000 }, /* R1856 - AIF2TX1MIX Input 1 Source */ + { 0x0741, 0x0080 }, /* R1857 - AIF2TX1MIX Input 1 Volume */ + { 0x0742, 0x0000 }, /* R1858 - AIF2TX1MIX Input 2 Source */ + { 0x0743, 0x0080 }, /* R1859 - AIF2TX1MIX Input 2 Volume */ + { 0x0744, 0x0000 }, /* R1860 - AIF2TX1MIX Input 3 Source */ + { 0x0745, 0x0080 }, /* R1861 - AIF2TX1MIX Input 3 Volume */ + { 0x0746, 0x0000 }, /* R1862 - AIF2TX1MIX Input 4 Source */ + { 0x0747, 0x0080 }, /* R1863 - AIF2TX1MIX Input 4 Volume */ + { 0x0748, 0x0000 }, /* R1864 - AIF2TX2MIX Input 1 Source */ + { 0x0749, 0x0080 }, /* R1865 - AIF2TX2MIX Input 1 Volume */ + { 0x074A, 0x0000 }, /* R1866 - AIF2TX2MIX Input 2 Source */ + { 0x074B, 0x0080 }, /* R1867 - AIF2TX2MIX Input 2 Volume */ + { 0x074C, 0x0000 }, /* R1868 - AIF2TX2MIX Input 3 Source */ + { 0x074D, 0x0080 }, /* R1869 - AIF2TX2MIX Input 3 Volume */ + { 0x074E, 0x0000 }, /* R1870 - AIF2TX2MIX Input 4 Source */ + { 0x074F, 0x0080 }, /* R1871 - AIF2TX2MIX Input 4 Volume */ + { 0x0780, 0x0000 }, /* R1920 - AIF3TX1MIX Input 1 Source */ + { 0x0781, 0x0080 }, /* R1921 - AIF3TX1MIX Input 1 Volume */ + { 0x0782, 0x0000 }, /* R1922 - AIF3TX1MIX Input 2 Source */ + { 0x0783, 0x0080 }, /* R1923 - AIF3TX1MIX Input 2 Volume */ + { 0x0784, 0x0000 }, /* R1924 - AIF3TX1MIX Input 3 Source */ + { 0x0785, 0x0080 }, /* R1925 - AIF3TX1MIX Input 3 Volume */ + { 0x0786, 0x0000 }, /* R1926 - AIF3TX1MIX Input 4 Source */ + { 0x0787, 0x0080 }, /* R1927 - AIF3TX1MIX Input 4 Volume */ + { 0x0788, 0x0000 }, /* R1928 - AIF3TX2MIX Input 1 Source */ + { 0x0789, 0x0080 }, /* R1929 - AIF3TX2MIX Input 1 Volume */ + { 0x078A, 0x0000 }, /* R1930 - AIF3TX2MIX Input 2 Source */ + { 0x078B, 0x0080 }, /* R1931 - AIF3TX2MIX Input 2 Volume */ + { 0x078C, 0x0000 }, /* R1932 - AIF3TX2MIX Input 3 Source */ + { 0x078D, 0x0080 }, /* R1933 - AIF3TX2MIX Input 3 Volume */ + { 0x078E, 0x0000 }, /* R1934 - AIF3TX2MIX Input 4 Source */ + { 0x078F, 0x0080 }, /* R1935 - AIF3TX2MIX Input 4 Volume */ + { 0x0880, 0x0000 }, /* R2176 - EQ1MIX Input 1 Source */ + { 0x0881, 0x0080 }, /* R2177 - EQ1MIX Input 1 Volume */ + { 0x0882, 0x0000 }, /* R2178 - EQ1MIX Input 2 Source */ + { 0x0883, 0x0080 }, /* R2179 - EQ1MIX Input 2 Volume */ + { 0x0884, 0x0000 }, /* R2180 - EQ1MIX Input 3 Source */ + { 0x0885, 0x0080 }, /* R2181 - EQ1MIX Input 3 Volume */ + { 0x0886, 0x0000 }, /* R2182 - EQ1MIX Input 4 Source */ + { 0x0887, 0x0080 }, /* R2183 - EQ1MIX Input 4 Volume */ + { 0x0888, 0x0000 }, /* R2184 - EQ2MIX Input 1 Source */ + { 0x0889, 0x0080 }, /* R2185 - EQ2MIX Input 1 Volume */ + { 0x088A, 0x0000 }, /* R2186 - EQ2MIX Input 2 Source */ + { 0x088B, 0x0080 }, /* R2187 - EQ2MIX Input 2 Volume */ + { 0x088C, 0x0000 }, /* R2188 - EQ2MIX Input 3 Source */ + { 0x088D, 0x0080 }, /* R2189 - EQ2MIX Input 3 Volume */ + { 0x088E, 0x0000 }, /* R2190 - EQ2MIX Input 4 Source */ + { 0x088F, 0x0080 }, /* R2191 - EQ2MIX Input 4 Volume */ + { 0x0890, 0x0000 }, /* R2192 - EQ3MIX Input 1 Source */ + { 0x0891, 0x0080 }, /* R2193 - EQ3MIX Input 1 Volume */ + { 0x0892, 0x0000 }, /* R2194 - EQ3MIX Input 2 Source */ + { 0x0893, 0x0080 }, /* R2195 - EQ3MIX Input 2 Volume */ + { 0x0894, 0x0000 }, /* R2196 - EQ3MIX Input 3 Source */ + { 0x0895, 0x0080 }, /* R2197 - EQ3MIX Input 3 Volume */ + { 0x0896, 0x0000 }, /* R2198 - EQ3MIX Input 4 Source */ + { 0x0897, 0x0080 }, /* R2199 - EQ3MIX Input 4 Volume */ + { 0x0898, 0x0000 }, /* R2200 - EQ4MIX Input 1 Source */ + { 0x0899, 0x0080 }, /* R2201 - EQ4MIX Input 1 Volume */ + { 0x089A, 0x0000 }, /* R2202 - EQ4MIX Input 2 Source */ + { 0x089B, 0x0080 }, /* R2203 - EQ4MIX Input 2 Volume */ + { 0x089C, 0x0000 }, /* R2204 - EQ4MIX Input 3 Source */ + { 0x089D, 0x0080 }, /* R2205 - EQ4MIX Input 3 Volume */ + { 0x089E, 0x0000 }, /* R2206 - EQ4MIX Input 4 Source */ + { 0x089F, 0x0080 }, /* R2207 - EQ4MIX Input 4 Volume */ + { 0x08C0, 0x0000 }, /* R2240 - DRC1LMIX Input 1 Source */ + { 0x08C1, 0x0080 }, /* R2241 - DRC1LMIX Input 1 Volume */ + { 0x08C2, 0x0000 }, /* R2242 - DRC1LMIX Input 2 Source */ + { 0x08C3, 0x0080 }, /* R2243 - DRC1LMIX Input 2 Volume */ + { 0x08C4, 0x0000 }, /* R2244 - DRC1LMIX Input 3 Source */ + { 0x08C5, 0x0080 }, /* R2245 - DRC1LMIX Input 3 Volume */ + { 0x08C6, 0x0000 }, /* R2246 - DRC1LMIX Input 4 Source */ + { 0x08C7, 0x0080 }, /* R2247 - DRC1LMIX Input 4 Volume */ + { 0x08C8, 0x0000 }, /* R2248 - DRC1RMIX Input 1 Source */ + { 0x08C9, 0x0080 }, /* R2249 - DRC1RMIX Input 1 Volume */ + { 0x08CA, 0x0000 }, /* R2250 - DRC1RMIX Input 2 Source */ + { 0x08CB, 0x0080 }, /* R2251 - DRC1RMIX Input 2 Volume */ + { 0x08CC, 0x0000 }, /* R2252 - DRC1RMIX Input 3 Source */ + { 0x08CD, 0x0080 }, /* R2253 - DRC1RMIX Input 3 Volume */ + { 0x08CE, 0x0000 }, /* R2254 - DRC1RMIX Input 4 Source */ + { 0x08CF, 0x0080 }, /* R2255 - DRC1RMIX Input 4 Volume */ + { 0x0900, 0x0000 }, /* R2304 - HPLP1MIX Input 1 Source */ + { 0x0901, 0x0080 }, /* R2305 - HPLP1MIX Input 1 Volume */ + { 0x0902, 0x0000 }, /* R2306 - HPLP1MIX Input 2 Source */ + { 0x0903, 0x0080 }, /* R2307 - HPLP1MIX Input 2 Volume */ + { 0x0904, 0x0000 }, /* R2308 - HPLP1MIX Input 3 Source */ + { 0x0905, 0x0080 }, /* R2309 - HPLP1MIX Input 3 Volume */ + { 0x0906, 0x0000 }, /* R2310 - HPLP1MIX Input 4 Source */ + { 0x0907, 0x0080 }, /* R2311 - HPLP1MIX Input 4 Volume */ + { 0x0908, 0x0000 }, /* R2312 - HPLP2MIX Input 1 Source */ + { 0x0909, 0x0080 }, /* R2313 - HPLP2MIX Input 1 Volume */ + { 0x090A, 0x0000 }, /* R2314 - HPLP2MIX Input 2 Source */ + { 0x090B, 0x0080 }, /* R2315 - HPLP2MIX Input 2 Volume */ + { 0x090C, 0x0000 }, /* R2316 - HPLP2MIX Input 3 Source */ + { 0x090D, 0x0080 }, /* R2317 - HPLP2MIX Input 3 Volume */ + { 0x090E, 0x0000 }, /* R2318 - HPLP2MIX Input 4 Source */ + { 0x090F, 0x0080 }, /* R2319 - HPLP2MIX Input 4 Volume */ + { 0x0910, 0x0000 }, /* R2320 - HPLP3MIX Input 1 Source */ + { 0x0911, 0x0080 }, /* R2321 - HPLP3MIX Input 1 Volume */ + { 0x0912, 0x0000 }, /* R2322 - HPLP3MIX Input 2 Source */ + { 0x0913, 0x0080 }, /* R2323 - HPLP3MIX Input 2 Volume */ + { 0x0914, 0x0000 }, /* R2324 - HPLP3MIX Input 3 Source */ + { 0x0915, 0x0080 }, /* R2325 - HPLP3MIX Input 3 Volume */ + { 0x0916, 0x0000 }, /* R2326 - HPLP3MIX Input 4 Source */ + { 0x0917, 0x0080 }, /* R2327 - HPLP3MIX Input 4 Volume */ + { 0x0918, 0x0000 }, /* R2328 - HPLP4MIX Input 1 Source */ + { 0x0919, 0x0080 }, /* R2329 - HPLP4MIX Input 1 Volume */ + { 0x091A, 0x0000 }, /* R2330 - HPLP4MIX Input 2 Source */ + { 0x091B, 0x0080 }, /* R2331 - HPLP4MIX Input 2 Volume */ + { 0x091C, 0x0000 }, /* R2332 - HPLP4MIX Input 3 Source */ + { 0x091D, 0x0080 }, /* R2333 - HPLP4MIX Input 3 Volume */ + { 0x091E, 0x0000 }, /* R2334 - HPLP4MIX Input 4 Source */ + { 0x091F, 0x0080 }, /* R2335 - HPLP4MIX Input 4 Volume */ + { 0x0940, 0x0000 }, /* R2368 - DSP1LMIX Input 1 Source */ + { 0x0941, 0x0080 }, /* R2369 - DSP1LMIX Input 1 Volume */ + { 0x0942, 0x0000 }, /* R2370 - DSP1LMIX Input 2 Source */ + { 0x0943, 0x0080 }, /* R2371 - DSP1LMIX Input 2 Volume */ + { 0x0944, 0x0000 }, /* R2372 - DSP1LMIX Input 3 Source */ + { 0x0945, 0x0080 }, /* R2373 - DSP1LMIX Input 3 Volume */ + { 0x0946, 0x0000 }, /* R2374 - DSP1LMIX Input 4 Source */ + { 0x0947, 0x0080 }, /* R2375 - DSP1LMIX Input 4 Volume */ + { 0x0948, 0x0000 }, /* R2376 - DSP1RMIX Input 1 Source */ + { 0x0949, 0x0080 }, /* R2377 - DSP1RMIX Input 1 Volume */ + { 0x094A, 0x0000 }, /* R2378 - DSP1RMIX Input 2 Source */ + { 0x094B, 0x0080 }, /* R2379 - DSP1RMIX Input 2 Volume */ + { 0x094C, 0x0000 }, /* R2380 - DSP1RMIX Input 3 Source */ + { 0x094D, 0x0080 }, /* R2381 - DSP1RMIX Input 3 Volume */ + { 0x094E, 0x0000 }, /* R2382 - DSP1RMIX Input 4 Source */ + { 0x094F, 0x0080 }, /* R2383 - DSP1RMIX Input 4 Volume */ + { 0x0950, 0x0000 }, /* R2384 - DSP1AUX1MIX Input 1 Source */ + { 0x0958, 0x0000 }, /* R2392 - DSP1AUX2MIX Input 1 Source */ + { 0x0960, 0x0000 }, /* R2400 - DSP1AUX3MIX Input 1 Source */ + { 0x0968, 0x0000 }, /* R2408 - DSP1AUX4MIX Input 1 Source */ + { 0x0970, 0x0000 }, /* R2416 - DSP1AUX5MIX Input 1 Source */ + { 0x0978, 0x0000 }, /* R2424 - DSP1AUX6MIX Input 1 Source */ + { 0x0980, 0x0000 }, /* R2432 - DSP2LMIX Input 1 Source */ + { 0x0981, 0x0080 }, /* R2433 - DSP2LMIX Input 1 Volume */ + { 0x0982, 0x0000 }, /* R2434 - DSP2LMIX Input 2 Source */ + { 0x0983, 0x0080 }, /* R2435 - DSP2LMIX Input 2 Volume */ + { 0x0984, 0x0000 }, /* R2436 - DSP2LMIX Input 3 Source */ + { 0x0985, 0x0080 }, /* R2437 - DSP2LMIX Input 3 Volume */ + { 0x0986, 0x0000 }, /* R2438 - DSP2LMIX Input 4 Source */ + { 0x0987, 0x0080 }, /* R2439 - DSP2LMIX Input 4 Volume */ + { 0x0988, 0x0000 }, /* R2440 - DSP2RMIX Input 1 Source */ + { 0x0989, 0x0080 }, /* R2441 - DSP2RMIX Input 1 Volume */ + { 0x098A, 0x0000 }, /* R2442 - DSP2RMIX Input 2 Source */ + { 0x098B, 0x0080 }, /* R2443 - DSP2RMIX Input 2 Volume */ + { 0x098C, 0x0000 }, /* R2444 - DSP2RMIX Input 3 Source */ + { 0x098D, 0x0080 }, /* R2445 - DSP2RMIX Input 3 Volume */ + { 0x098E, 0x0000 }, /* R2446 - DSP2RMIX Input 4 Source */ + { 0x098F, 0x0080 }, /* R2447 - DSP2RMIX Input 4 Volume */ + { 0x0990, 0x0000 }, /* R2448 - DSP2AUX1MIX Input 1 Source */ + { 0x0998, 0x0000 }, /* R2456 - DSP2AUX2MIX Input 1 Source */ + { 0x09A0, 0x0000 }, /* R2464 - DSP2AUX3MIX Input 1 Source */ + { 0x09A8, 0x0000 }, /* R2472 - DSP2AUX4MIX Input 1 Source */ + { 0x09B0, 0x0000 }, /* R2480 - DSP2AUX5MIX Input 1 Source */ + { 0x09B8, 0x0000 }, /* R2488 - DSP2AUX6MIX Input 1 Source */ + { 0x09C0, 0x0000 }, /* R2496 - DSP3LMIX Input 1 Source */ + { 0x09C1, 0x0080 }, /* R2497 - DSP3LMIX Input 1 Volume */ + { 0x09C2, 0x0000 }, /* R2498 - DSP3LMIX Input 2 Source */ + { 0x09C3, 0x0080 }, /* R2499 - DSP3LMIX Input 2 Volume */ + { 0x09C4, 0x0000 }, /* R2500 - DSP3LMIX Input 3 Source */ + { 0x09C5, 0x0080 }, /* R2501 - DSP3LMIX Input 3 Volume */ + { 0x09C6, 0x0000 }, /* R2502 - DSP3LMIX Input 4 Source */ + { 0x09C7, 0x0080 }, /* R2503 - DSP3LMIX Input 4 Volume */ + { 0x09C8, 0x0000 }, /* R2504 - DSP3RMIX Input 1 Source */ + { 0x09C9, 0x0080 }, /* R2505 - DSP3RMIX Input 1 Volume */ + { 0x09CA, 0x0000 }, /* R2506 - DSP3RMIX Input 2 Source */ + { 0x09CB, 0x0080 }, /* R2507 - DSP3RMIX Input 2 Volume */ + { 0x09CC, 0x0000 }, /* R2508 - DSP3RMIX Input 3 Source */ + { 0x09CD, 0x0080 }, /* R2509 - DSP3RMIX Input 3 Volume */ + { 0x09CE, 0x0000 }, /* R2510 - DSP3RMIX Input 4 Source */ + { 0x09CF, 0x0080 }, /* R2511 - DSP3RMIX Input 4 Volume */ + { 0x09D0, 0x0000 }, /* R2512 - DSP3AUX1MIX Input 1 Source */ + { 0x09D8, 0x0000 }, /* R2520 - DSP3AUX2MIX Input 1 Source */ + { 0x09E0, 0x0000 }, /* R2528 - DSP3AUX3MIX Input 1 Source */ + { 0x09E8, 0x0000 }, /* R2536 - DSP3AUX4MIX Input 1 Source */ + { 0x09F0, 0x0000 }, /* R2544 - DSP3AUX5MIX Input 1 Source */ + { 0x09F8, 0x0000 }, /* R2552 - DSP3AUX6MIX Input 1 Source */ + { 0x0A80, 0x0000 }, /* R2688 - ASRC1LMIX Input 1 Source */ + { 0x0A88, 0x0000 }, /* R2696 - ASRC1RMIX Input 1 Source */ + { 0x0A90, 0x0000 }, /* R2704 - ASRC2LMIX Input 1 Source */ + { 0x0A98, 0x0000 }, /* R2712 - ASRC2RMIX Input 1 Source */ + { 0x0B00, 0x0000 }, /* R2816 - ISRC1DEC1MIX Input 1 Source */ + { 0x0B08, 0x0000 }, /* R2824 - ISRC1DEC2MIX Input 1 Source */ + { 0x0B10, 0x0000 }, /* R2832 - ISRC1DEC3MIX Input 1 Source */ + { 0x0B18, 0x0000 }, /* R2840 - ISRC1DEC4MIX Input 1 Source */ + { 0x0B20, 0x0000 }, /* R2848 - ISRC1INT1MIX Input 1 Source */ + { 0x0B28, 0x0000 }, /* R2856 - ISRC1INT2MIX Input 1 Source */ + { 0x0B30, 0x0000 }, /* R2864 - ISRC1INT3MIX Input 1 Source */ + { 0x0B38, 0x0000 }, /* R2872 - ISRC1INT4MIX Input 1 Source */ + { 0x0B40, 0x0000 }, /* R2880 - ISRC2DEC1MIX Input 1 Source */ + { 0x0B48, 0x0000 }, /* R2888 - ISRC2DEC2MIX Input 1 Source */ + { 0x0B50, 0x0000 }, /* R2896 - ISRC2DEC3MIX Input 1 Source */ + { 0x0B58, 0x0000 }, /* R2904 - ISRC2DEC4MIX Input 1 Source */ + { 0x0B60, 0x0000 }, /* R2912 - ISRC2INT1MIX Input 1 Source */ + { 0x0B68, 0x0000 }, /* R2920 - ISRC2INT2MIX Input 1 Source */ + { 0x0B70, 0x0000 }, /* R2928 - ISRC2INT3MIX Input 1 Source */ + { 0x0B78, 0x0000 }, /* R2936 - ISRC2INT4MIX Input 1 Source */ + { 0x0C00, 0xA001 }, /* R3072 - GPIO CTRL 1 */ + { 0x0C01, 0xA001 }, /* R3073 - GPIO CTRL 2 */ + { 0x0C02, 0xA001 }, /* R3074 - GPIO CTRL 3 */ + { 0x0C03, 0xA001 }, /* R3075 - GPIO CTRL 4 */ + { 0x0C04, 0xA001 }, /* R3076 - GPIO CTRL 5 */ + { 0x0C05, 0xA001 }, /* R3077 - GPIO CTRL 6 */ + { 0x0C23, 0x4003 }, /* R3107 - Misc Pad Ctrl 1 */ + { 0x0C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 2 */ + { 0x0C25, 0x0000 }, /* R3109 - Misc Pad Ctrl 3 */ + { 0x0C26, 0x0000 }, /* R3110 - Misc Pad Ctrl 4 */ + { 0x0C27, 0x0000 }, /* R3111 - Misc Pad Ctrl 5 */ + { 0x0C28, 0x0000 }, /* R3112 - Misc GPIO 1 */ + { 0x0D00, 0x0000 }, /* R3328 - Interrupt Status 1 */ + { 0x0D01, 0x0000 }, /* R3329 - Interrupt Status 2 */ + { 0x0D02, 0x0000 }, /* R3330 - Interrupt Status 3 */ + { 0x0D03, 0x0000 }, /* R3331 - Interrupt Status 4 */ + { 0x0D04, 0x0000 }, /* R3332 - Interrupt Raw Status 2 */ + { 0x0D05, 0x0000 }, /* R3333 - Interrupt Raw Status 3 */ + { 0x0D06, 0x0000 }, /* R3334 - Interrupt Raw Status 4 */ + { 0x0D07, 0xFFFF }, /* R3335 - Interrupt Status 1 Mask */ + { 0x0D08, 0xFFFF }, /* R3336 - Interrupt Status 2 Mask */ + { 0x0D09, 0xFFFF }, /* R3337 - Interrupt Status 3 Mask */ + { 0x0D0A, 0xFFFF }, /* R3338 - Interrupt Status 4 Mask */ + { 0x0D1F, 0x0000 }, /* R3359 - Interrupt Control */ + { 0x0D20, 0xFFFF }, /* R3360 - IRQ Debounce 1 */ + { 0x0D21, 0xFFFF }, /* R3361 - IRQ Debounce 2 */ + { 0x0E00, 0x0000 }, /* R3584 - FX_Ctrl */ + { 0x0E10, 0x6318 }, /* R3600 - EQ1_1 */ + { 0x0E11, 0x6300 }, /* R3601 - EQ1_2 */ + { 0x0E12, 0x0FC8 }, /* R3602 - EQ1_3 */ + { 0x0E13, 0x03FE }, /* R3603 - EQ1_4 */ + { 0x0E14, 0x00E0 }, /* R3604 - EQ1_5 */ + { 0x0E15, 0x1EC4 }, /* R3605 - EQ1_6 */ + { 0x0E16, 0xF136 }, /* R3606 - EQ1_7 */ + { 0x0E17, 0x0409 }, /* R3607 - EQ1_8 */ + { 0x0E18, 0x04CC }, /* R3608 - EQ1_9 */ + { 0x0E19, 0x1C9B }, /* R3609 - EQ1_10 */ + { 0x0E1A, 0xF337 }, /* R3610 - EQ1_11 */ + { 0x0E1B, 0x040B }, /* R3611 - EQ1_12 */ + { 0x0E1C, 0x0CBB }, /* R3612 - EQ1_13 */ + { 0x0E1D, 0x16F8 }, /* R3613 - EQ1_14 */ + { 0x0E1E, 0xF7D9 }, /* R3614 - EQ1_15 */ + { 0x0E1F, 0x040A }, /* R3615 - EQ1_16 */ + { 0x0E20, 0x1F14 }, /* R3616 - EQ1_17 */ + { 0x0E21, 0x058C }, /* R3617 - EQ1_18 */ + { 0x0E22, 0x0563 }, /* R3618 - EQ1_19 */ + { 0x0E23, 0x4000 }, /* R3619 - EQ1_20 */ + { 0x0E26, 0x6318 }, /* R3622 - EQ2_1 */ + { 0x0E27, 0x6300 }, /* R3623 - EQ2_2 */ + { 0x0E28, 0x0FC8 }, /* R3624 - EQ2_3 */ + { 0x0E29, 0x03FE }, /* R3625 - EQ2_4 */ + { 0x0E2A, 0x00E0 }, /* R3626 - EQ2_5 */ + { 0x0E2B, 0x1EC4 }, /* R3627 - EQ2_6 */ + { 0x0E2C, 0xF136 }, /* R3628 - EQ2_7 */ + { 0x0E2D, 0x0409 }, /* R3629 - EQ2_8 */ + { 0x0E2E, 0x04CC }, /* R3630 - EQ2_9 */ + { 0x0E2F, 0x1C9B }, /* R3631 - EQ2_10 */ + { 0x0E30, 0xF337 }, /* R3632 - EQ2_11 */ + { 0x0E31, 0x040B }, /* R3633 - EQ2_12 */ + { 0x0E32, 0x0CBB }, /* R3634 - EQ2_13 */ + { 0x0E33, 0x16F8 }, /* R3635 - EQ2_14 */ + { 0x0E34, 0xF7D9 }, /* R3636 - EQ2_15 */ + { 0x0E35, 0x040A }, /* R3637 - EQ2_16 */ + { 0x0E36, 0x1F14 }, /* R3638 - EQ2_17 */ + { 0x0E37, 0x058C }, /* R3639 - EQ2_18 */ + { 0x0E38, 0x0563 }, /* R3640 - EQ2_19 */ + { 0x0E39, 0x4000 }, /* R3641 - EQ2_20 */ + { 0x0E3C, 0x6318 }, /* R3644 - EQ3_1 */ + { 0x0E3D, 0x6300 }, /* R3645 - EQ3_2 */ + { 0x0E3E, 0x0FC8 }, /* R3646 - EQ3_3 */ + { 0x0E3F, 0x03FE }, /* R3647 - EQ3_4 */ + { 0x0E40, 0x00E0 }, /* R3648 - EQ3_5 */ + { 0x0E41, 0x1EC4 }, /* R3649 - EQ3_6 */ + { 0x0E42, 0xF136 }, /* R3650 - EQ3_7 */ + { 0x0E43, 0x0409 }, /* R3651 - EQ3_8 */ + { 0x0E44, 0x04CC }, /* R3652 - EQ3_9 */ + { 0x0E45, 0x1C9B }, /* R3653 - EQ3_10 */ + { 0x0E46, 0xF337 }, /* R3654 - EQ3_11 */ + { 0x0E47, 0x040B }, /* R3655 - EQ3_12 */ + { 0x0E48, 0x0CBB }, /* R3656 - EQ3_13 */ + { 0x0E49, 0x16F8 }, /* R3657 - EQ3_14 */ + { 0x0E4A, 0xF7D9 }, /* R3658 - EQ3_15 */ + { 0x0E4B, 0x040A }, /* R3659 - EQ3_16 */ + { 0x0E4C, 0x1F14 }, /* R3660 - EQ3_17 */ + { 0x0E4D, 0x058C }, /* R3661 - EQ3_18 */ + { 0x0E4E, 0x0563 }, /* R3662 - EQ3_19 */ + { 0x0E4F, 0x4000 }, /* R3663 - EQ3_20 */ + { 0x0E52, 0x6318 }, /* R3666 - EQ4_1 */ + { 0x0E53, 0x6300 }, /* R3667 - EQ4_2 */ + { 0x0E54, 0x0FC8 }, /* R3668 - EQ4_3 */ + { 0x0E55, 0x03FE }, /* R3669 - EQ4_4 */ + { 0x0E56, 0x00E0 }, /* R3670 - EQ4_5 */ + { 0x0E57, 0x1EC4 }, /* R3671 - EQ4_6 */ + { 0x0E58, 0xF136 }, /* R3672 - EQ4_7 */ + { 0x0E59, 0x0409 }, /* R3673 - EQ4_8 */ + { 0x0E5A, 0x04CC }, /* R3674 - EQ4_9 */ + { 0x0E5B, 0x1C9B }, /* R3675 - EQ4_10 */ + { 0x0E5C, 0xF337 }, /* R3676 - EQ4_11 */ + { 0x0E5D, 0x040B }, /* R3677 - EQ4_12 */ + { 0x0E5E, 0x0CBB }, /* R3678 - EQ4_13 */ + { 0x0E5F, 0x16F8 }, /* R3679 - EQ4_14 */ + { 0x0E60, 0xF7D9 }, /* R3680 - EQ4_15 */ + { 0x0E61, 0x040A }, /* R3681 - EQ4_16 */ + { 0x0E62, 0x1F14 }, /* R3682 - EQ4_17 */ + { 0x0E63, 0x058C }, /* R3683 - EQ4_18 */ + { 0x0E64, 0x0563 }, /* R3684 - EQ4_19 */ + { 0x0E65, 0x4000 }, /* R3685 - EQ4_20 */ + { 0x0E80, 0x0018 }, /* R3712 - DRC1 ctrl1 */ + { 0x0E81, 0x0933 }, /* R3713 - DRC1 ctrl2 */ + { 0x0E82, 0x0018 }, /* R3714 - DRC1 ctrl3 */ + { 0x0E83, 0x0000 }, /* R3715 - DRC1 ctrl4 */ + { 0x0E84, 0x0000 }, /* R3716 - DRC1 ctrl5 */ + { 0x0EC0, 0x0000 }, /* R3776 - HPLPF1_1 */ + { 0x0EC1, 0x0000 }, /* R3777 - HPLPF1_2 */ + { 0x0EC4, 0x0000 }, /* R3780 - HPLPF2_1 */ + { 0x0EC5, 0x0000 }, /* R3781 - HPLPF2_2 */ + { 0x0EC8, 0x0000 }, /* R3784 - HPLPF3_1 */ + { 0x0EC9, 0x0000 }, /* R3785 - HPLPF3_2 */ + { 0x0ECC, 0x0000 }, /* R3788 - HPLPF4_1 */ + { 0x0ECD, 0x0000 }, /* R3789 - HPLPF4_2 */ + { 0x4000, 0x0000 }, /* R16384 - DSP1 DM 0 */ + { 0x4001, 0x0000 }, /* R16385 - DSP1 DM 1 */ + { 0x4002, 0x0000 }, /* R16386 - DSP1 DM 2 */ + { 0x4003, 0x0000 }, /* R16387 - DSP1 DM 3 */ + { 0x41FC, 0x0000 }, /* R16892 - DSP1 DM 508 */ + { 0x41FD, 0x0000 }, /* R16893 - DSP1 DM 509 */ + { 0x41FE, 0x0000 }, /* R16894 - DSP1 DM 510 */ + { 0x41FF, 0x0000 }, /* R16895 - DSP1 DM 511 */ + { 0x4800, 0x0000 }, /* R18432 - DSP1 PM 0 */ + { 0x4801, 0x0000 }, /* R18433 - DSP1 PM 1 */ + { 0x4802, 0x0000 }, /* R18434 - DSP1 PM 2 */ + { 0x4803, 0x0000 }, /* R18435 - DSP1 PM 3 */ + { 0x4804, 0x0000 }, /* R18436 - DSP1 PM 4 */ + { 0x4805, 0x0000 }, /* R18437 - DSP1 PM 5 */ + { 0x4DFA, 0x0000 }, /* R19962 - DSP1 PM 1530 */ + { 0x4DFB, 0x0000 }, /* R19963 - DSP1 PM 1531 */ + { 0x4DFC, 0x0000 }, /* R19964 - DSP1 PM 1532 */ + { 0x4DFD, 0x0000 }, /* R19965 - DSP1 PM 1533 */ + { 0x4DFE, 0x0000 }, /* R19966 - DSP1 PM 1534 */ + { 0x4DFF, 0x0000 }, /* R19967 - DSP1 PM 1535 */ + { 0x5000, 0x0000 }, /* R20480 - DSP1 ZM 0 */ + { 0x5001, 0x0000 }, /* R20481 - DSP1 ZM 1 */ + { 0x5002, 0x0000 }, /* R20482 - DSP1 ZM 2 */ + { 0x5003, 0x0000 }, /* R20483 - DSP1 ZM 3 */ + { 0x57FC, 0x0000 }, /* R22524 - DSP1 ZM 2044 */ + { 0x57FD, 0x0000 }, /* R22525 - DSP1 ZM 2045 */ + { 0x57FE, 0x0000 }, /* R22526 - DSP1 ZM 2046 */ + { 0x57FF, 0x0000 }, /* R22527 - DSP1 ZM 2047 */ + { 0x6000, 0x0000 }, /* R24576 - DSP2 DM 0 */ + { 0x6001, 0x0000 }, /* R24577 - DSP2 DM 1 */ + { 0x6002, 0x0000 }, /* R24578 - DSP2 DM 2 */ + { 0x6003, 0x0000 }, /* R24579 - DSP2 DM 3 */ + { 0x61FC, 0x0000 }, /* R25084 - DSP2 DM 508 */ + { 0x61FD, 0x0000 }, /* R25085 - DSP2 DM 509 */ + { 0x61FE, 0x0000 }, /* R25086 - DSP2 DM 510 */ + { 0x61FF, 0x0000 }, /* R25087 - DSP2 DM 511 */ + { 0x6800, 0x0000 }, /* R26624 - DSP2 PM 0 */ + { 0x6801, 0x0000 }, /* R26625 - DSP2 PM 1 */ + { 0x6802, 0x0000 }, /* R26626 - DSP2 PM 2 */ + { 0x6803, 0x0000 }, /* R26627 - DSP2 PM 3 */ + { 0x6804, 0x0000 }, /* R26628 - DSP2 PM 4 */ + { 0x6805, 0x0000 }, /* R26629 - DSP2 PM 5 */ + { 0x6DFA, 0x0000 }, /* R28154 - DSP2 PM 1530 */ + { 0x6DFB, 0x0000 }, /* R28155 - DSP2 PM 1531 */ + { 0x6DFC, 0x0000 }, /* R28156 - DSP2 PM 1532 */ + { 0x6DFD, 0x0000 }, /* R28157 - DSP2 PM 1533 */ + { 0x6DFE, 0x0000 }, /* R28158 - DSP2 PM 1534 */ + { 0x6DFF, 0x0000 }, /* R28159 - DSP2 PM 1535 */ + { 0x7000, 0x0000 }, /* R28672 - DSP2 ZM 0 */ + { 0x7001, 0x0000 }, /* R28673 - DSP2 ZM 1 */ + { 0x7002, 0x0000 }, /* R28674 - DSP2 ZM 2 */ + { 0x7003, 0x0000 }, /* R28675 - DSP2 ZM 3 */ + { 0x77FC, 0x0000 }, /* R30716 - DSP2 ZM 2044 */ + { 0x77FD, 0x0000 }, /* R30717 - DSP2 ZM 2045 */ + { 0x77FE, 0x0000 }, /* R30718 - DSP2 ZM 2046 */ + { 0x77FF, 0x0000 }, /* R30719 - DSP2 ZM 2047 */ + { 0x8000, 0x0000 }, /* R32768 - DSP3 DM 0 */ + { 0x8001, 0x0000 }, /* R32769 - DSP3 DM 1 */ + { 0x8002, 0x0000 }, /* R32770 - DSP3 DM 2 */ + { 0x8003, 0x0000 }, /* R32771 - DSP3 DM 3 */ + { 0x81FC, 0x0000 }, /* R33276 - DSP3 DM 508 */ + { 0x81FD, 0x0000 }, /* R33277 - DSP3 DM 509 */ + { 0x81FE, 0x0000 }, /* R33278 - DSP3 DM 510 */ + { 0x81FF, 0x0000 }, /* R33279 - DSP3 DM 511 */ + { 0x8800, 0x0000 }, /* R34816 - DSP3 PM 0 */ + { 0x8801, 0x0000 }, /* R34817 - DSP3 PM 1 */ + { 0x8802, 0x0000 }, /* R34818 - DSP3 PM 2 */ + { 0x8803, 0x0000 }, /* R34819 - DSP3 PM 3 */ + { 0x8804, 0x0000 }, /* R34820 - DSP3 PM 4 */ + { 0x8805, 0x0000 }, /* R34821 - DSP3 PM 5 */ + { 0x8DFA, 0x0000 }, /* R36346 - DSP3 PM 1530 */ + { 0x8DFB, 0x0000 }, /* R36347 - DSP3 PM 1531 */ + { 0x8DFC, 0x0000 }, /* R36348 - DSP3 PM 1532 */ + { 0x8DFD, 0x0000 }, /* R36349 - DSP3 PM 1533 */ + { 0x8DFE, 0x0000 }, /* R36350 - DSP3 PM 1534 */ + { 0x8DFF, 0x0000 }, /* R36351 - DSP3 PM 1535 */ + { 0x9000, 0x0000 }, /* R36864 - DSP3 ZM 0 */ + { 0x9001, 0x0000 }, /* R36865 - DSP3 ZM 1 */ + { 0x9002, 0x0000 }, /* R36866 - DSP3 ZM 2 */ + { 0x9003, 0x0000 }, /* R36867 - DSP3 ZM 3 */ + { 0x97FC, 0x0000 }, /* R38908 - DSP3 ZM 2044 */ + { 0x97FD, 0x0000 }, /* R38909 - DSP3 ZM 2045 */ + { 0x97FE, 0x0000 }, /* R38910 - DSP3 ZM 2046 */ + { 0x97FF, 0x0000 }, /* R38911 - DSP3 ZM 2047 */ }; diff --git a/sound/soc/codecs/wm5100.c b/sound/soc/codecs/wm5100.c index 42d9039a49e9..0077086d8e5b 100644 --- a/sound/soc/codecs/wm5100.c +++ b/sound/soc/codecs/wm5100.c @@ -51,6 +51,7 @@ struct wm5100_fll { /* codec private data */ struct wm5100_priv { + struct regmap *regmap; struct snd_soc_codec *codec; struct regulator_bulk_data core_supplies[WM5100_NUM_CORE_SUPPLIES]; @@ -204,17 +205,15 @@ static void wm5100_free_sr(struct snd_soc_codec *codec, int rate) } } -static int wm5100_reset(struct snd_soc_codec *codec) +static int wm5100_reset(struct wm5100_priv *wm5100) { - struct wm5100_priv *wm5100 = snd_soc_codec_get_drvdata(codec); - if (wm5100->pdata.reset) { gpio_set_value_cansleep(wm5100->pdata.reset, 0); gpio_set_value_cansleep(wm5100->pdata.reset, 1); return 0; } else { - return snd_soc_write(codec, WM5100_SOFTWARE_RESET, 0); + return regmap_write(wm5100->regmap, WM5100_SOFTWARE_RESET, 0); } } @@ -1375,7 +1374,7 @@ static int wm5100_set_bias_level(struct snd_soc_codec *codec, msleep(2); } - codec->cache_only = false; + regcache_cache_only(wm5100->regmap, false); switch (wm5100->rev) { case 0: @@ -1399,7 +1398,7 @@ static int wm5100_set_bias_level(struct snd_soc_codec *codec, break; } - snd_soc_cache_sync(codec); + regcache_sync(wm5100->regmap); } break; @@ -1993,6 +1992,9 @@ static int wm5100_set_fll(struct snd_soc_codec *codec, int fll_id, int source, else timeout = 50; + snd_soc_update_bits(codec, WM5100_CLOCKING_3, WM5100_SYSCLK_ENA, + WM5100_SYSCLK_ENA); + /* Poll for the lock; will use interrupt when we can test */ for (i = 0; i < timeout; i++) { if (i2c->irq) { @@ -2350,24 +2352,22 @@ static inline struct wm5100_priv *gpio_to_wm5100(struct gpio_chip *chip) static void wm5100_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct wm5100_priv *wm5100 = gpio_to_wm5100(chip); - struct snd_soc_codec *codec = wm5100->codec; - snd_soc_update_bits(codec, WM5100_GPIO_CTRL_1 + offset, - WM5100_GP1_LVL, !!value << WM5100_GP1_LVL_SHIFT); + regmap_update_bits(wm5100->regmap, WM5100_GPIO_CTRL_1 + offset, + WM5100_GP1_LVL, !!value << WM5100_GP1_LVL_SHIFT); } static int wm5100_gpio_direction_out(struct gpio_chip *chip, unsigned offset, int value) { struct wm5100_priv *wm5100 = gpio_to_wm5100(chip); - struct snd_soc_codec *codec = wm5100->codec; int val, ret; val = (1 << WM5100_GP1_FN_SHIFT) | (!!value << WM5100_GP1_LVL_SHIFT); - ret = snd_soc_update_bits(codec, WM5100_GPIO_CTRL_1 + offset, - WM5100_GP1_FN_MASK | WM5100_GP1_DIR | - WM5100_GP1_LVL, val); + ret = regmap_update_bits(wm5100->regmap, WM5100_GPIO_CTRL_1 + offset, + WM5100_GP1_FN_MASK | WM5100_GP1_DIR | + WM5100_GP1_LVL, val); if (ret < 0) return ret; else @@ -2377,25 +2377,24 @@ static int wm5100_gpio_direction_out(struct gpio_chip *chip, static int wm5100_gpio_get(struct gpio_chip *chip, unsigned offset) { struct wm5100_priv *wm5100 = gpio_to_wm5100(chip); - struct snd_soc_codec *codec = wm5100->codec; + unsigned int reg; int ret; - ret = snd_soc_read(codec, WM5100_GPIO_CTRL_1 + offset); + ret = regmap_read(wm5100->regmap, WM5100_GPIO_CTRL_1 + offset, ®); if (ret < 0) return ret; - return (ret & WM5100_GP1_LVL) != 0; + return (reg & WM5100_GP1_LVL) != 0; } static int wm5100_gpio_direction_in(struct gpio_chip *chip, unsigned offset) { struct wm5100_priv *wm5100 = gpio_to_wm5100(chip); - struct snd_soc_codec *codec = wm5100->codec; - return snd_soc_update_bits(codec, WM5100_GPIO_CTRL_1 + offset, - WM5100_GP1_FN_MASK | WM5100_GP1_DIR, - (1 << WM5100_GP1_FN_SHIFT) | - (1 << WM5100_GP1_DIR_SHIFT)); + return regmap_update_bits(wm5100->regmap, WM5100_GPIO_CTRL_1 + offset, + WM5100_GP1_FN_MASK | WM5100_GP1_DIR, + (1 << WM5100_GP1_FN_SHIFT) | + (1 << WM5100_GP1_DIR_SHIFT)); } static struct gpio_chip wm5100_template_chip = { @@ -2408,14 +2407,14 @@ static struct gpio_chip wm5100_template_chip = { .can_sleep = 1, }; -static void wm5100_init_gpio(struct snd_soc_codec *codec) +static void wm5100_init_gpio(struct i2c_client *i2c) { - struct wm5100_priv *wm5100 = snd_soc_codec_get_drvdata(codec); + struct wm5100_priv *wm5100 = i2c_get_clientdata(i2c); int ret; wm5100->gpio_chip = wm5100_template_chip; wm5100->gpio_chip.ngpio = 6; - wm5100->gpio_chip.dev = codec->dev; + wm5100->gpio_chip.dev = &i2c->dev; if (wm5100->pdata.gpio_base) wm5100->gpio_chip.base = wm5100->pdata.gpio_base; @@ -2424,24 +2423,24 @@ static void wm5100_init_gpio(struct snd_soc_codec *codec) ret = gpiochip_add(&wm5100->gpio_chip); if (ret != 0) - dev_err(codec->dev, "Failed to add GPIOs: %d\n", ret); + dev_err(&i2c->dev, "Failed to add GPIOs: %d\n", ret); } -static void wm5100_free_gpio(struct snd_soc_codec *codec) +static void wm5100_free_gpio(struct i2c_client *i2c) { - struct wm5100_priv *wm5100 = snd_soc_codec_get_drvdata(codec); + struct wm5100_priv *wm5100 = i2c_get_clientdata(i2c); int ret; ret = gpiochip_remove(&wm5100->gpio_chip); if (ret != 0) - dev_err(codec->dev, "Failed to remove GPIOs: %d\n", ret); + dev_err(&i2c->dev, "Failed to remove GPIOs: %d\n", ret); } #else -static void wm5100_init_gpio(struct snd_soc_codec *codec) +static void wm5100_init_gpio(struct i2c_client *i2c) { } -static void wm5100_free_gpio(struct snd_soc_codec *codec) +static void wm5100_free_gpio(struct i2c_client *i2c) { } #endif @@ -2453,108 +2452,16 @@ static int wm5100_probe(struct snd_soc_codec *codec) int ret, i, irq_flags; wm5100->codec = codec; + codec->control_data = wm5100->regmap; - ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_I2C); + ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP); if (ret != 0) { dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); return ret; } - for (i = 0; i < ARRAY_SIZE(wm5100->core_supplies); i++) - wm5100->core_supplies[i].supply = wm5100_core_supply_names[i]; - - ret = regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm5100->core_supplies), - wm5100->core_supplies); - if (ret != 0) { - dev_err(codec->dev, "Failed to request core supplies: %d\n", - ret); - return ret; - } - - wm5100->cpvdd = regulator_get(&i2c->dev, "CPVDD"); - if (IS_ERR(wm5100->cpvdd)) { - ret = PTR_ERR(wm5100->cpvdd); - dev_err(&i2c->dev, "Failed to get CPVDD: %d\n", ret); - goto err_core; - } - - wm5100->dbvdd2 = regulator_get(&i2c->dev, "DBVDD2"); - if (IS_ERR(wm5100->dbvdd2)) { - ret = PTR_ERR(wm5100->dbvdd2); - dev_err(&i2c->dev, "Failed to get DBVDD2: %d\n", ret); - goto err_cpvdd; - } - - wm5100->dbvdd3 = regulator_get(&i2c->dev, "DBVDD3"); - if (IS_ERR(wm5100->dbvdd3)) { - ret = PTR_ERR(wm5100->dbvdd3); - dev_err(&i2c->dev, "Failed to get DBVDD2: %d\n", ret); - goto err_dbvdd2; - } - - ret = regulator_bulk_enable(ARRAY_SIZE(wm5100->core_supplies), - wm5100->core_supplies); - if (ret != 0) { - dev_err(codec->dev, "Failed to enable core supplies: %d\n", - ret); - goto err_dbvdd3; - } - - if (wm5100->pdata.ldo_ena) { - ret = gpio_request_one(wm5100->pdata.ldo_ena, - GPIOF_OUT_INIT_HIGH, "WM5100 LDOENA"); - if (ret < 0) { - dev_err(&i2c->dev, "Failed to request LDOENA %d: %d\n", - wm5100->pdata.ldo_ena, ret); - goto err_enable; - } - msleep(2); - } - - if (wm5100->pdata.reset) { - ret = gpio_request_one(wm5100->pdata.reset, - GPIOF_OUT_INIT_HIGH, "WM5100 /RESET"); - if (ret < 0) { - dev_err(&i2c->dev, "Failed to request /RESET %d: %d\n", - wm5100->pdata.reset, ret); - goto err_ldo; - } - } - - ret = snd_soc_read(codec, WM5100_SOFTWARE_RESET); - if (ret < 0) { - dev_err(codec->dev, "Failed to read ID register\n"); - goto err_reset; - } - switch (ret) { - case 0x8997: - case 0x5100: - break; + regcache_cache_only(wm5100->regmap, true); - default: - dev_err(codec->dev, "Device is not a WM5100, ID is %x\n", ret); - ret = -EINVAL; - goto err_reset; - } - - ret = snd_soc_read(codec, WM5100_DEVICE_REVISION); - if (ret < 0) { - dev_err(codec->dev, "Failed to read revision register\n"); - goto err_reset; - } - wm5100->rev = ret & WM5100_DEVICE_REVISION_MASK; - - dev_info(codec->dev, "revision %c\n", wm5100->rev + 'A'); - - ret = wm5100_reset(codec); - if (ret < 0) { - dev_err(codec->dev, "Failed to issue reset\n"); - goto err_reset; - } - - codec->cache_only = true; - - wm5100_init_gpio(codec); for (i = 0; i < ARRAY_SIZE(wm5100_dig_vu); i++) snd_soc_update_bits(codec, wm5100_dig_vu[i], WM5100_OUT_VU, @@ -2662,29 +2569,6 @@ static int wm5100_probe(struct snd_soc_codec *codec) err_gpio: if (i2c->irq) free_irq(i2c->irq, codec); - wm5100_free_gpio(codec); -err_reset: - if (wm5100->pdata.reset) { - gpio_set_value_cansleep(wm5100->pdata.reset, 1); - gpio_free(wm5100->pdata.reset); - } -err_ldo: - if (wm5100->pdata.ldo_ena) { - gpio_set_value_cansleep(wm5100->pdata.ldo_ena, 0); - gpio_free(wm5100->pdata.ldo_ena); - } -err_enable: - regulator_bulk_disable(ARRAY_SIZE(wm5100->core_supplies), - wm5100->core_supplies); -err_dbvdd3: - regulator_put(wm5100->dbvdd3); -err_dbvdd2: - regulator_put(wm5100->dbvdd2); -err_cpvdd: - regulator_put(wm5100->cpvdd); -err_core: - regulator_bulk_free(ARRAY_SIZE(wm5100->core_supplies), - wm5100->core_supplies); return ret; } @@ -2700,20 +2584,6 @@ static int wm5100_remove(struct snd_soc_codec *codec) } if (i2c->irq) free_irq(i2c->irq, codec); - wm5100_free_gpio(codec); - if (wm5100->pdata.reset) { - gpio_set_value_cansleep(wm5100->pdata.reset, 1); - gpio_free(wm5100->pdata.reset); - } - if (wm5100->pdata.ldo_ena) { - gpio_set_value_cansleep(wm5100->pdata.ldo_ena, 0); - gpio_free(wm5100->pdata.ldo_ena); - } - regulator_put(wm5100->dbvdd3); - regulator_put(wm5100->dbvdd2); - regulator_put(wm5100->cpvdd); - regulator_bulk_free(ARRAY_SIZE(wm5100->core_supplies), - wm5100->core_supplies); return 0; } @@ -2733,14 +2603,18 @@ static struct snd_soc_codec_driver soc_codec_dev_wm5100 = { .num_dapm_widgets = ARRAY_SIZE(wm5100_dapm_widgets), .dapm_routes = wm5100_dapm_routes, .num_dapm_routes = ARRAY_SIZE(wm5100_dapm_routes), +}; - .reg_cache_size = ARRAY_SIZE(wm5100_reg_defaults), - .reg_word_size = sizeof(u16), - .compress_type = SND_SOC_RBTREE_COMPRESSION, - .reg_cache_default = wm5100_reg_defaults, +static const struct regmap_config wm5100_regmap = { + .reg_bits = 16, + .val_bits = 16, - .volatile_register = wm5100_volatile_register, - .readable_register = wm5100_readable_register, + .max_register = WM5100_MAX_REGISTER, + .reg_defaults = wm5100_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(wm5100_reg_defaults), + .volatile_reg = wm5100_volatile_register, + .readable_reg = wm5100_readable_register, + .cache_type = REGCACHE_RBTREE, }; static __devinit int wm5100_i2c_probe(struct i2c_client *i2c, @@ -2748,12 +2622,21 @@ static __devinit int wm5100_i2c_probe(struct i2c_client *i2c, { struct wm5100_pdata *pdata = dev_get_platdata(&i2c->dev); struct wm5100_priv *wm5100; + unsigned int reg; int ret, i; wm5100 = kzalloc(sizeof(struct wm5100_priv), GFP_KERNEL); if (wm5100 == NULL) return -ENOMEM; + wm5100->regmap = regmap_init_i2c(i2c, &wm5100_regmap); + if (IS_ERR(wm5100->regmap)) { + ret = PTR_ERR(wm5100->regmap); + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", + ret); + goto err_alloc; + } + for (i = 0; i < ARRAY_SIZE(wm5100->fll); i++) init_completion(&wm5100->fll[i].lock); @@ -2762,21 +2645,162 @@ static __devinit int wm5100_i2c_probe(struct i2c_client *i2c, i2c_set_clientdata(i2c, wm5100); + for (i = 0; i < ARRAY_SIZE(wm5100->core_supplies); i++) + wm5100->core_supplies[i].supply = wm5100_core_supply_names[i]; + + ret = regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm5100->core_supplies), + wm5100->core_supplies); + if (ret != 0) { + dev_err(&i2c->dev, "Failed to request core supplies: %d\n", + ret); + goto err_regmap; + } + + wm5100->cpvdd = regulator_get(&i2c->dev, "CPVDD"); + if (IS_ERR(wm5100->cpvdd)) { + ret = PTR_ERR(wm5100->cpvdd); + dev_err(&i2c->dev, "Failed to get CPVDD: %d\n", ret); + goto err_core; + } + + wm5100->dbvdd2 = regulator_get(&i2c->dev, "DBVDD2"); + if (IS_ERR(wm5100->dbvdd2)) { + ret = PTR_ERR(wm5100->dbvdd2); + dev_err(&i2c->dev, "Failed to get DBVDD2: %d\n", ret); + goto err_cpvdd; + } + + wm5100->dbvdd3 = regulator_get(&i2c->dev, "DBVDD3"); + if (IS_ERR(wm5100->dbvdd3)) { + ret = PTR_ERR(wm5100->dbvdd3); + dev_err(&i2c->dev, "Failed to get DBVDD2: %d\n", ret); + goto err_dbvdd2; + } + + ret = regulator_bulk_enable(ARRAY_SIZE(wm5100->core_supplies), + wm5100->core_supplies); + if (ret != 0) { + dev_err(&i2c->dev, "Failed to enable core supplies: %d\n", + ret); + goto err_dbvdd3; + } + + if (wm5100->pdata.ldo_ena) { + ret = gpio_request_one(wm5100->pdata.ldo_ena, + GPIOF_OUT_INIT_HIGH, "WM5100 LDOENA"); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to request LDOENA %d: %d\n", + wm5100->pdata.ldo_ena, ret); + goto err_enable; + } + msleep(2); + } + + if (wm5100->pdata.reset) { + ret = gpio_request_one(wm5100->pdata.reset, + GPIOF_OUT_INIT_HIGH, "WM5100 /RESET"); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to request /RESET %d: %d\n", + wm5100->pdata.reset, ret); + goto err_ldo; + } + } + + ret = regmap_read(wm5100->regmap, WM5100_SOFTWARE_RESET, ®); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to read ID register\n"); + goto err_reset; + } + switch (reg) { + case 0x8997: + case 0x5100: + break; + + default: + dev_err(&i2c->dev, "Device is not a WM5100, ID is %x\n", reg); + ret = -EINVAL; + goto err_reset; + } + + ret = regmap_read(wm5100->regmap, WM5100_DEVICE_REVISION, ®); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to read revision register\n"); + goto err_reset; + } + wm5100->rev = reg & WM5100_DEVICE_REVISION_MASK; + + dev_info(&i2c->dev, "revision %c\n", wm5100->rev + 'A'); + + ret = wm5100_reset(wm5100); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to issue reset\n"); + goto err_reset; + } + + wm5100_init_gpio(i2c); + ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_wm5100, wm5100_dai, ARRAY_SIZE(wm5100_dai)); if (ret < 0) { dev_err(&i2c->dev, "Failed to register WM5100: %d\n", ret); - kfree(wm5100); + goto err_reset; } return ret; + +err_reset: + wm5100_free_gpio(i2c); + if (wm5100->pdata.reset) { + gpio_set_value_cansleep(wm5100->pdata.reset, 1); + gpio_free(wm5100->pdata.reset); + } +err_ldo: + if (wm5100->pdata.ldo_ena) { + gpio_set_value_cansleep(wm5100->pdata.ldo_ena, 0); + gpio_free(wm5100->pdata.ldo_ena); + } +err_enable: + regulator_bulk_disable(ARRAY_SIZE(wm5100->core_supplies), + wm5100->core_supplies); +err_dbvdd3: + regulator_put(wm5100->dbvdd3); +err_dbvdd2: + regulator_put(wm5100->dbvdd2); +err_cpvdd: + regulator_put(wm5100->cpvdd); +err_core: + regulator_bulk_free(ARRAY_SIZE(wm5100->core_supplies), + wm5100->core_supplies); +err_regmap: + regmap_exit(wm5100->regmap); +err_alloc: + kfree(wm5100); + return ret; } static __devexit int wm5100_i2c_remove(struct i2c_client *client) { + struct wm5100_priv *wm5100 = i2c_get_clientdata(client); + snd_soc_unregister_codec(&client->dev); - kfree(i2c_get_clientdata(client)); + wm5100_free_gpio(client); + if (wm5100->pdata.reset) { + gpio_set_value_cansleep(wm5100->pdata.reset, 1); + gpio_free(wm5100->pdata.reset); + } + if (wm5100->pdata.ldo_ena) { + gpio_set_value_cansleep(wm5100->pdata.ldo_ena, 0); + gpio_free(wm5100->pdata.ldo_ena); + } + regulator_put(wm5100->dbvdd3); + regulator_put(wm5100->dbvdd2); + regulator_put(wm5100->cpvdd); + regulator_bulk_free(ARRAY_SIZE(wm5100->core_supplies), + wm5100->core_supplies); + regmap_exit(wm5100->regmap); + kfree(wm5100); + return 0; } diff --git a/sound/soc/codecs/wm5100.h b/sound/soc/codecs/wm5100.h index 970759636bdc..25cb6016f9d7 100644 --- a/sound/soc/codecs/wm5100.h +++ b/sound/soc/codecs/wm5100.h @@ -15,6 +15,7 @@ #define WM5100_ASOC_H #include <sound/soc.h> +#include <linux/regmap.h> int wm5100_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack); @@ -5147,9 +5148,9 @@ int wm5100_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack); #define WM5100_DSP3_ZM_END_SHIFT 0 /* DSP3_ZM_END - [15:0] */ #define WM5100_DSP3_ZM_END_WIDTH 16 /* DSP3_ZM_END - [15:0] */ -int wm5100_readable_register(struct snd_soc_codec *codec, unsigned int reg); -int wm5100_volatile_register(struct snd_soc_codec *codec, unsigned int reg); +bool wm5100_readable_register(struct device *dev, unsigned int reg); +bool wm5100_volatile_register(struct device *dev, unsigned int reg); -extern u16 wm5100_reg_defaults[WM5100_MAX_REGISTER + 1]; +extern struct reg_default wm5100_reg_defaults[WM5100_REGISTER_COUNT]; #endif diff --git a/sound/soc/codecs/wm8400.c b/sound/soc/codecs/wm8400.c index dc13be2a09c5..585def1ffca6 100644 --- a/sound/soc/codecs/wm8400.c +++ b/sound/soc/codecs/wm8400.c @@ -766,8 +766,8 @@ SND_SOC_DAPM_PGA("ROPGA", WM8400_POWER_MANAGEMENT_3, WM8400_ROPGA_ENA_SHIFT, 0, NULL, 0), /* MICBIAS */ -SND_SOC_DAPM_MICBIAS("MICBIAS", WM8400_POWER_MANAGEMENT_1, - WM8400_MIC1BIAS_ENA_SHIFT, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS", WM8400_POWER_MANAGEMENT_1, + WM8400_MIC1BIAS_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_OUTPUT("LON"), SND_SOC_DAPM_OUTPUT("LOP"), @@ -1059,7 +1059,7 @@ static int wm8400_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, wm8400_write(codec, WM8400_FLL_CONTROL_3, factors.n); reg = wm8400_read(codec, WM8400_FLL_CONTROL_4); - reg &= WM8400_FLL_OUTDIV_MASK; + reg &= ~WM8400_FLL_OUTDIV_MASK; reg |= factors.outdiv; wm8400_write(codec, WM8400_FLL_CONTROL_4, reg); diff --git a/sound/soc/codecs/wm8900.c b/sound/soc/codecs/wm8900.c index 3d0dc1591ecc..17a12c2df8da 100644 --- a/sound/soc/codecs/wm8900.c +++ b/sound/soc/codecs/wm8900.c @@ -513,7 +513,7 @@ SND_SOC_DAPM_MIXER("Right Input Mixer", WM8900_REG_POWER2, 4, 0, wm8900_rinmix_controls, ARRAY_SIZE(wm8900_rinmix_controls)), -SND_SOC_DAPM_MICBIAS("Mic Bias", WM8900_REG_POWER1, 4, 0), +SND_SOC_DAPM_SUPPLY("Mic Bias", WM8900_REG_POWER1, 4, 0, NULL, 0), SND_SOC_DAPM_ADC("ADCL", "Left HiFi Capture", WM8900_REG_POWER2, 1, 0), SND_SOC_DAPM_ADC("ADCR", "Right HiFi Capture", WM8900_REG_POWER2, 0, 0), diff --git a/sound/soc/codecs/wm8904.c b/sound/soc/codecs/wm8904.c index 285ef87e6704..bb070f835257 100644 --- a/sound/soc/codecs/wm8904.c +++ b/sound/soc/codecs/wm8904.c @@ -1196,7 +1196,7 @@ SND_SOC_DAPM_INPUT("IN2R"), SND_SOC_DAPM_INPUT("IN3L"), SND_SOC_DAPM_INPUT("IN3R"), -SND_SOC_DAPM_MICBIAS("MICBIAS", WM8904_MIC_BIAS_CONTROL_0, 0, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS", WM8904_MIC_BIAS_CONTROL_0, 0, 0, NULL, 0), SND_SOC_DAPM_MUX("Left Capture Mux", SND_SOC_NOPM, 0, 0, &lin_mux), SND_SOC_DAPM_MUX("Left Capture Inverting Mux", SND_SOC_NOPM, 0, 0, diff --git a/sound/soc/codecs/wm8940.c b/sound/soc/codecs/wm8940.c index de9ec9b8b7d9..1b5856b4ea7c 100644 --- a/sound/soc/codecs/wm8940.c +++ b/sound/soc/codecs/wm8940.c @@ -629,8 +629,8 @@ static int wm8940_set_dai_clkdiv(struct snd_soc_dai *codec_dai, ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 5)); break; case WM8940_OPCLKDIV: - reg = snd_soc_read(codec, WM8940_ADDCNTRL) & 0xFFCF; - ret = snd_soc_write(codec, WM8940_ADDCNTRL, reg | (div << 4)); + reg = snd_soc_read(codec, WM8940_GPIO) & 0xFFCF; + ret = snd_soc_write(codec, WM8940_GPIO, reg | (div << 4)); break; } return ret; diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index 2df253c18568..6e22f9b3d967 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -265,7 +265,7 @@ SND_SOC_DAPM_INPUT("RINPUT2"), SND_SOC_DAPM_INPUT("LINPUT3"), SND_SOC_DAPM_INPUT("RINPUT3"), -SND_SOC_DAPM_MICBIAS("MICB", WM8960_POWER1, 1, 0), +SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0), SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0, wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)), diff --git a/sound/soc/codecs/wm8961.c b/sound/soc/codecs/wm8961.c index 9568c8a49f96..7f2df7ba27f6 100644 --- a/sound/soc/codecs/wm8961.c +++ b/sound/soc/codecs/wm8961.c @@ -531,7 +531,7 @@ SND_SOC_DAPM_PGA("Right Input", WM8961_PWR_MGMT_1, 4, 0, NULL, 0), SND_SOC_DAPM_ADC("ADCL", "HiFi Capture", WM8961_PWR_MGMT_1, 3, 0), SND_SOC_DAPM_ADC("ADCR", "HiFi Capture", WM8961_PWR_MGMT_1, 2, 0), -SND_SOC_DAPM_MICBIAS("MICBIAS", WM8961_PWR_MGMT_1, 1, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS", WM8961_PWR_MGMT_1, 1, 0, NULL, 0), SND_SOC_DAPM_MUX("DACL Sidetone", SND_SOC_NOPM, 0, 0, &dacl_mux), SND_SOC_DAPM_MUX("DACR Sidetone", SND_SOC_NOPM, 0, 0, &dacr_mux), diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index 91d3c6dbeba3..2ae04ba4ab60 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c @@ -21,6 +21,7 @@ #include <linux/i2c.h> #include <linux/input.h> #include <linux/platform_device.h> +#include <linux/regmap.h> #include <linux/regulator/consumer.h> #include <linux/slab.h> #include <linux/workqueue.h> @@ -50,6 +51,7 @@ static const char *wm8962_supply_names[WM8962_NUM_SUPPLIES] = { /* codec private data */ struct wm8962_priv { + struct regmap *regmap; struct snd_soc_codec *codec; int sysclk; @@ -95,7 +97,7 @@ static int wm8962_regulator_event_##n(struct notifier_block *nb, \ struct wm8962_priv *wm8962 = container_of(nb, struct wm8962_priv, \ disable_nb[n]); \ if (event & REGULATOR_EVENT_DISABLE) { \ - wm8962->codec->cache_sync = 1; \ + regcache_cache_only(wm8962->regmap, true); \ } \ return 0; \ } @@ -109,691 +111,691 @@ WM8962_REGULATOR_EVENT(5) WM8962_REGULATOR_EVENT(6) WM8962_REGULATOR_EVENT(7) -static const u16 wm8962_reg[WM8962_MAX_REGISTER + 1] = { - [0] = 0x009F, /* R0 - Left Input volume */ - [1] = 0x049F, /* R1 - Right Input volume */ - [2] = 0x0000, /* R2 - HPOUTL volume */ - [3] = 0x0000, /* R3 - HPOUTR volume */ - [4] = 0x0020, /* R4 - Clocking1 */ - [5] = 0x0018, /* R5 - ADC & DAC Control 1 */ - [6] = 0x2008, /* R6 - ADC & DAC Control 2 */ - [7] = 0x000A, /* R7 - Audio Interface 0 */ - [8] = 0x01E4, /* R8 - Clocking2 */ - [9] = 0x0300, /* R9 - Audio Interface 1 */ - [10] = 0x00C0, /* R10 - Left DAC volume */ - [11] = 0x00C0, /* R11 - Right DAC volume */ - - [14] = 0x0040, /* R14 - Audio Interface 2 */ - [15] = 0x6243, /* R15 - Software Reset */ - - [17] = 0x007B, /* R17 - ALC1 */ - [18] = 0x0000, /* R18 - ALC2 */ - [19] = 0x1C32, /* R19 - ALC3 */ - [20] = 0x3200, /* R20 - Noise Gate */ - [21] = 0x00C0, /* R21 - Left ADC volume */ - [22] = 0x00C0, /* R22 - Right ADC volume */ - [23] = 0x0160, /* R23 - Additional control(1) */ - [24] = 0x0000, /* R24 - Additional control(2) */ - [25] = 0x0000, /* R25 - Pwr Mgmt (1) */ - [26] = 0x0000, /* R26 - Pwr Mgmt (2) */ - [27] = 0x0010, /* R27 - Additional Control (3) */ - [28] = 0x0000, /* R28 - Anti-pop */ - - [30] = 0x005E, /* R30 - Clocking 3 */ - [31] = 0x0000, /* R31 - Input mixer control (1) */ - [32] = 0x0145, /* R32 - Left input mixer volume */ - [33] = 0x0145, /* R33 - Right input mixer volume */ - [34] = 0x0009, /* R34 - Input mixer control (2) */ - [35] = 0x0003, /* R35 - Input bias control */ - [37] = 0x0008, /* R37 - Left input PGA control */ - [38] = 0x0008, /* R38 - Right input PGA control */ - - [40] = 0x0000, /* R40 - SPKOUTL volume */ - [41] = 0x0000, /* R41 - SPKOUTR volume */ - - [47] = 0x0000, /* R47 - Thermal Shutdown Status */ - [48] = 0x8027, /* R48 - Additional Control (4) */ - [49] = 0x0010, /* R49 - Class D Control 1 */ - - [51] = 0x0003, /* R51 - Class D Control 2 */ - - [56] = 0x0506, /* R56 - Clocking 4 */ - [57] = 0x0000, /* R57 - DAC DSP Mixing (1) */ - [58] = 0x0000, /* R58 - DAC DSP Mixing (2) */ - - [60] = 0x0300, /* R60 - DC Servo 0 */ - [61] = 0x0300, /* R61 - DC Servo 1 */ - - [64] = 0x0810, /* R64 - DC Servo 4 */ - - [66] = 0x0000, /* R66 - DC Servo 6 */ - - [68] = 0x001B, /* R68 - Analogue PGA Bias */ - [69] = 0x0000, /* R69 - Analogue HP 0 */ - - [71] = 0x01FB, /* R71 - Analogue HP 2 */ - [72] = 0x0000, /* R72 - Charge Pump 1 */ - - [82] = 0x0004, /* R82 - Charge Pump B */ - - [87] = 0x0000, /* R87 - Write Sequencer Control 1 */ - - [90] = 0x0000, /* R90 - Write Sequencer Control 2 */ - - [93] = 0x0000, /* R93 - Write Sequencer Control 3 */ - [94] = 0x0000, /* R94 - Control Interface */ - - [99] = 0x0000, /* R99 - Mixer Enables */ - [100] = 0x0000, /* R100 - Headphone Mixer (1) */ - [101] = 0x0000, /* R101 - Headphone Mixer (2) */ - [102] = 0x013F, /* R102 - Headphone Mixer (3) */ - [103] = 0x013F, /* R103 - Headphone Mixer (4) */ - - [105] = 0x0000, /* R105 - Speaker Mixer (1) */ - [106] = 0x0000, /* R106 - Speaker Mixer (2) */ - [107] = 0x013F, /* R107 - Speaker Mixer (3) */ - [108] = 0x013F, /* R108 - Speaker Mixer (4) */ - [109] = 0x0003, /* R109 - Speaker Mixer (5) */ - [110] = 0x0002, /* R110 - Beep Generator (1) */ - - [115] = 0x0006, /* R115 - Oscillator Trim (3) */ - [116] = 0x0026, /* R116 - Oscillator Trim (4) */ - - [119] = 0x0000, /* R119 - Oscillator Trim (7) */ - - [124] = 0x0011, /* R124 - Analogue Clocking1 */ - [125] = 0x004B, /* R125 - Analogue Clocking2 */ - [126] = 0x000D, /* R126 - Analogue Clocking3 */ - [127] = 0x0000, /* R127 - PLL Software Reset */ - - [129] = 0x0000, /* R129 - PLL2 */ - - [131] = 0x0000, /* R131 - PLL 4 */ - - [136] = 0x0067, /* R136 - PLL 9 */ - [137] = 0x001C, /* R137 - PLL 10 */ - [138] = 0x0071, /* R138 - PLL 11 */ - [139] = 0x00C7, /* R139 - PLL 12 */ - [140] = 0x0067, /* R140 - PLL 13 */ - [141] = 0x0048, /* R141 - PLL 14 */ - [142] = 0x0022, /* R142 - PLL 15 */ - [143] = 0x0097, /* R143 - PLL 16 */ - - [155] = 0x000C, /* R155 - FLL Control (1) */ - [156] = 0x0039, /* R156 - FLL Control (2) */ - [157] = 0x0180, /* R157 - FLL Control (3) */ - - [159] = 0x0032, /* R159 - FLL Control (5) */ - [160] = 0x0018, /* R160 - FLL Control (6) */ - [161] = 0x007D, /* R161 - FLL Control (7) */ - [162] = 0x0008, /* R162 - FLL Control (8) */ - - [252] = 0x0005, /* R252 - General test 1 */ - - [256] = 0x0000, /* R256 - DF1 */ - [257] = 0x0000, /* R257 - DF2 */ - [258] = 0x0000, /* R258 - DF3 */ - [259] = 0x0000, /* R259 - DF4 */ - [260] = 0x0000, /* R260 - DF5 */ - [261] = 0x0000, /* R261 - DF6 */ - [262] = 0x0000, /* R262 - DF7 */ - - [264] = 0x0000, /* R264 - LHPF1 */ - [265] = 0x0000, /* R265 - LHPF2 */ - - [268] = 0x0000, /* R268 - THREED1 */ - [269] = 0x0000, /* R269 - THREED2 */ - [270] = 0x0000, /* R270 - THREED3 */ - [271] = 0x0000, /* R271 - THREED4 */ - - [276] = 0x000C, /* R276 - DRC 1 */ - [277] = 0x0925, /* R277 - DRC 2 */ - [278] = 0x0000, /* R278 - DRC 3 */ - [279] = 0x0000, /* R279 - DRC 4 */ - [280] = 0x0000, /* R280 - DRC 5 */ - - [285] = 0x0000, /* R285 - Tloopback */ - - [335] = 0x0004, /* R335 - EQ1 */ - [336] = 0x6318, /* R336 - EQ2 */ - [337] = 0x6300, /* R337 - EQ3 */ - [338] = 0x0FCA, /* R338 - EQ4 */ - [339] = 0x0400, /* R339 - EQ5 */ - [340] = 0x00D8, /* R340 - EQ6 */ - [341] = 0x1EB5, /* R341 - EQ7 */ - [342] = 0xF145, /* R342 - EQ8 */ - [343] = 0x0B75, /* R343 - EQ9 */ - [344] = 0x01C5, /* R344 - EQ10 */ - [345] = 0x1C58, /* R345 - EQ11 */ - [346] = 0xF373, /* R346 - EQ12 */ - [347] = 0x0A54, /* R347 - EQ13 */ - [348] = 0x0558, /* R348 - EQ14 */ - [349] = 0x168E, /* R349 - EQ15 */ - [350] = 0xF829, /* R350 - EQ16 */ - [351] = 0x07AD, /* R351 - EQ17 */ - [352] = 0x1103, /* R352 - EQ18 */ - [353] = 0x0564, /* R353 - EQ19 */ - [354] = 0x0559, /* R354 - EQ20 */ - [355] = 0x4000, /* R355 - EQ21 */ - [356] = 0x6318, /* R356 - EQ22 */ - [357] = 0x6300, /* R357 - EQ23 */ - [358] = 0x0FCA, /* R358 - EQ24 */ - [359] = 0x0400, /* R359 - EQ25 */ - [360] = 0x00D8, /* R360 - EQ26 */ - [361] = 0x1EB5, /* R361 - EQ27 */ - [362] = 0xF145, /* R362 - EQ28 */ - [363] = 0x0B75, /* R363 - EQ29 */ - [364] = 0x01C5, /* R364 - EQ30 */ - [365] = 0x1C58, /* R365 - EQ31 */ - [366] = 0xF373, /* R366 - EQ32 */ - [367] = 0x0A54, /* R367 - EQ33 */ - [368] = 0x0558, /* R368 - EQ34 */ - [369] = 0x168E, /* R369 - EQ35 */ - [370] = 0xF829, /* R370 - EQ36 */ - [371] = 0x07AD, /* R371 - EQ37 */ - [372] = 0x1103, /* R372 - EQ38 */ - [373] = 0x0564, /* R373 - EQ39 */ - [374] = 0x0559, /* R374 - EQ40 */ - [375] = 0x4000, /* R375 - EQ41 */ - - [513] = 0x0000, /* R513 - GPIO 2 */ - [514] = 0x0000, /* R514 - GPIO 3 */ - - [516] = 0x8100, /* R516 - GPIO 5 */ - [517] = 0x8100, /* R517 - GPIO 6 */ - - [560] = 0x0000, /* R560 - Interrupt Status 1 */ - [561] = 0x0000, /* R561 - Interrupt Status 2 */ - - [568] = 0x0030, /* R568 - Interrupt Status 1 Mask */ - [569] = 0xFFED, /* R569 - Interrupt Status 2 Mask */ - - [576] = 0x0000, /* R576 - Interrupt Control */ - - [584] = 0x002D, /* R584 - IRQ Debounce */ - - [586] = 0x0000, /* R586 - MICINT Source Pol */ - - [768] = 0x1C00, /* R768 - DSP2 Power Management */ - - [1037] = 0x0000, /* R1037 - DSP2_ExecControl */ - - [8192] = 0x0000, /* R8192 - DSP2 Instruction RAM 0 */ - - [9216] = 0x0030, /* R9216 - DSP2 Address RAM 2 */ - [9217] = 0x0000, /* R9217 - DSP2 Address RAM 1 */ - [9218] = 0x0000, /* R9218 - DSP2 Address RAM 0 */ - - [12288] = 0x0000, /* R12288 - DSP2 Data1 RAM 1 */ - [12289] = 0x0000, /* R12289 - DSP2 Data1 RAM 0 */ - - [13312] = 0x0000, /* R13312 - DSP2 Data2 RAM 1 */ - [13313] = 0x0000, /* R13313 - DSP2 Data2 RAM 0 */ - - [14336] = 0x0000, /* R14336 - DSP2 Data3 RAM 1 */ - [14337] = 0x0000, /* R14337 - DSP2 Data3 RAM 0 */ - - [15360] = 0x000A, /* R15360 - DSP2 Coeff RAM 0 */ - - [16384] = 0x0000, /* R16384 - RETUNEADC_SHARED_COEFF_1 */ - [16385] = 0x0000, /* R16385 - RETUNEADC_SHARED_COEFF_0 */ - [16386] = 0x0000, /* R16386 - RETUNEDAC_SHARED_COEFF_1 */ - [16387] = 0x0000, /* R16387 - RETUNEDAC_SHARED_COEFF_0 */ - [16388] = 0x0000, /* R16388 - SOUNDSTAGE_ENABLES_1 */ - [16389] = 0x0000, /* R16389 - SOUNDSTAGE_ENABLES_0 */ - - [16896] = 0x0002, /* R16896 - HDBASS_AI_1 */ - [16897] = 0xBD12, /* R16897 - HDBASS_AI_0 */ - [16898] = 0x007C, /* R16898 - HDBASS_AR_1 */ - [16899] = 0x586C, /* R16899 - HDBASS_AR_0 */ - [16900] = 0x0053, /* R16900 - HDBASS_B_1 */ - [16901] = 0x8121, /* R16901 - HDBASS_B_0 */ - [16902] = 0x003F, /* R16902 - HDBASS_K_1 */ - [16903] = 0x8BD8, /* R16903 - HDBASS_K_0 */ - [16904] = 0x0032, /* R16904 - HDBASS_N1_1 */ - [16905] = 0xF52D, /* R16905 - HDBASS_N1_0 */ - [16906] = 0x0065, /* R16906 - HDBASS_N2_1 */ - [16907] = 0xAC8C, /* R16907 - HDBASS_N2_0 */ - [16908] = 0x006B, /* R16908 - HDBASS_N3_1 */ - [16909] = 0xE087, /* R16909 - HDBASS_N3_0 */ - [16910] = 0x0072, /* R16910 - HDBASS_N4_1 */ - [16911] = 0x1483, /* R16911 - HDBASS_N4_0 */ - [16912] = 0x0072, /* R16912 - HDBASS_N5_1 */ - [16913] = 0x1483, /* R16913 - HDBASS_N5_0 */ - [16914] = 0x0043, /* R16914 - HDBASS_X1_1 */ - [16915] = 0x3525, /* R16915 - HDBASS_X1_0 */ - [16916] = 0x0006, /* R16916 - HDBASS_X2_1 */ - [16917] = 0x6A4A, /* R16917 - HDBASS_X2_0 */ - [16918] = 0x0043, /* R16918 - HDBASS_X3_1 */ - [16919] = 0x6079, /* R16919 - HDBASS_X3_0 */ - [16920] = 0x0008, /* R16920 - HDBASS_ATK_1 */ - [16921] = 0x0000, /* R16921 - HDBASS_ATK_0 */ - [16922] = 0x0001, /* R16922 - HDBASS_DCY_1 */ - [16923] = 0x0000, /* R16923 - HDBASS_DCY_0 */ - [16924] = 0x0059, /* R16924 - HDBASS_PG_1 */ - [16925] = 0x999A, /* R16925 - HDBASS_PG_0 */ - - [17048] = 0x0083, /* R17408 - HPF_C_1 */ - [17049] = 0x98AD, /* R17409 - HPF_C_0 */ - - [17920] = 0x007F, /* R17920 - ADCL_RETUNE_C1_1 */ - [17921] = 0xFFFF, /* R17921 - ADCL_RETUNE_C1_0 */ - [17922] = 0x0000, /* R17922 - ADCL_RETUNE_C2_1 */ - [17923] = 0x0000, /* R17923 - ADCL_RETUNE_C2_0 */ - [17924] = 0x0000, /* R17924 - ADCL_RETUNE_C3_1 */ - [17925] = 0x0000, /* R17925 - ADCL_RETUNE_C3_0 */ - [17926] = 0x0000, /* R17926 - ADCL_RETUNE_C4_1 */ - [17927] = 0x0000, /* R17927 - ADCL_RETUNE_C4_0 */ - [17928] = 0x0000, /* R17928 - ADCL_RETUNE_C5_1 */ - [17929] = 0x0000, /* R17929 - ADCL_RETUNE_C5_0 */ - [17930] = 0x0000, /* R17930 - ADCL_RETUNE_C6_1 */ - [17931] = 0x0000, /* R17931 - ADCL_RETUNE_C6_0 */ - [17932] = 0x0000, /* R17932 - ADCL_RETUNE_C7_1 */ - [17933] = 0x0000, /* R17933 - ADCL_RETUNE_C7_0 */ - [17934] = 0x0000, /* R17934 - ADCL_RETUNE_C8_1 */ - [17935] = 0x0000, /* R17935 - ADCL_RETUNE_C8_0 */ - [17936] = 0x0000, /* R17936 - ADCL_RETUNE_C9_1 */ - [17937] = 0x0000, /* R17937 - ADCL_RETUNE_C9_0 */ - [17938] = 0x0000, /* R17938 - ADCL_RETUNE_C10_1 */ - [17939] = 0x0000, /* R17939 - ADCL_RETUNE_C10_0 */ - [17940] = 0x0000, /* R17940 - ADCL_RETUNE_C11_1 */ - [17941] = 0x0000, /* R17941 - ADCL_RETUNE_C11_0 */ - [17942] = 0x0000, /* R17942 - ADCL_RETUNE_C12_1 */ - [17943] = 0x0000, /* R17943 - ADCL_RETUNE_C12_0 */ - [17944] = 0x0000, /* R17944 - ADCL_RETUNE_C13_1 */ - [17945] = 0x0000, /* R17945 - ADCL_RETUNE_C13_0 */ - [17946] = 0x0000, /* R17946 - ADCL_RETUNE_C14_1 */ - [17947] = 0x0000, /* R17947 - ADCL_RETUNE_C14_0 */ - [17948] = 0x0000, /* R17948 - ADCL_RETUNE_C15_1 */ - [17949] = 0x0000, /* R17949 - ADCL_RETUNE_C15_0 */ - [17950] = 0x0000, /* R17950 - ADCL_RETUNE_C16_1 */ - [17951] = 0x0000, /* R17951 - ADCL_RETUNE_C16_0 */ - [17952] = 0x0000, /* R17952 - ADCL_RETUNE_C17_1 */ - [17953] = 0x0000, /* R17953 - ADCL_RETUNE_C17_0 */ - [17954] = 0x0000, /* R17954 - ADCL_RETUNE_C18_1 */ - [17955] = 0x0000, /* R17955 - ADCL_RETUNE_C18_0 */ - [17956] = 0x0000, /* R17956 - ADCL_RETUNE_C19_1 */ - [17957] = 0x0000, /* R17957 - ADCL_RETUNE_C19_0 */ - [17958] = 0x0000, /* R17958 - ADCL_RETUNE_C20_1 */ - [17959] = 0x0000, /* R17959 - ADCL_RETUNE_C20_0 */ - [17960] = 0x0000, /* R17960 - ADCL_RETUNE_C21_1 */ - [17961] = 0x0000, /* R17961 - ADCL_RETUNE_C21_0 */ - [17962] = 0x0000, /* R17962 - ADCL_RETUNE_C22_1 */ - [17963] = 0x0000, /* R17963 - ADCL_RETUNE_C22_0 */ - [17964] = 0x0000, /* R17964 - ADCL_RETUNE_C23_1 */ - [17965] = 0x0000, /* R17965 - ADCL_RETUNE_C23_0 */ - [17966] = 0x0000, /* R17966 - ADCL_RETUNE_C24_1 */ - [17967] = 0x0000, /* R17967 - ADCL_RETUNE_C24_0 */ - [17968] = 0x0000, /* R17968 - ADCL_RETUNE_C25_1 */ - [17969] = 0x0000, /* R17969 - ADCL_RETUNE_C25_0 */ - [17970] = 0x0000, /* R17970 - ADCL_RETUNE_C26_1 */ - [17971] = 0x0000, /* R17971 - ADCL_RETUNE_C26_0 */ - [17972] = 0x0000, /* R17972 - ADCL_RETUNE_C27_1 */ - [17973] = 0x0000, /* R17973 - ADCL_RETUNE_C27_0 */ - [17974] = 0x0000, /* R17974 - ADCL_RETUNE_C28_1 */ - [17975] = 0x0000, /* R17975 - ADCL_RETUNE_C28_0 */ - [17976] = 0x0000, /* R17976 - ADCL_RETUNE_C29_1 */ - [17977] = 0x0000, /* R17977 - ADCL_RETUNE_C29_0 */ - [17978] = 0x0000, /* R17978 - ADCL_RETUNE_C30_1 */ - [17979] = 0x0000, /* R17979 - ADCL_RETUNE_C30_0 */ - [17980] = 0x0000, /* R17980 - ADCL_RETUNE_C31_1 */ - [17981] = 0x0000, /* R17981 - ADCL_RETUNE_C31_0 */ - [17982] = 0x0000, /* R17982 - ADCL_RETUNE_C32_1 */ - [17983] = 0x0000, /* R17983 - ADCL_RETUNE_C32_0 */ - - [18432] = 0x0020, /* R18432 - RETUNEADC_PG2_1 */ - [18433] = 0x0000, /* R18433 - RETUNEADC_PG2_0 */ - [18434] = 0x0040, /* R18434 - RETUNEADC_PG_1 */ - [18435] = 0x0000, /* R18435 - RETUNEADC_PG_0 */ - - [18944] = 0x007F, /* R18944 - ADCR_RETUNE_C1_1 */ - [18945] = 0xFFFF, /* R18945 - ADCR_RETUNE_C1_0 */ - [18946] = 0x0000, /* R18946 - ADCR_RETUNE_C2_1 */ - [18947] = 0x0000, /* R18947 - ADCR_RETUNE_C2_0 */ - [18948] = 0x0000, /* R18948 - ADCR_RETUNE_C3_1 */ - [18949] = 0x0000, /* R18949 - ADCR_RETUNE_C3_0 */ - [18950] = 0x0000, /* R18950 - ADCR_RETUNE_C4_1 */ - [18951] = 0x0000, /* R18951 - ADCR_RETUNE_C4_0 */ - [18952] = 0x0000, /* R18952 - ADCR_RETUNE_C5_1 */ - [18953] = 0x0000, /* R18953 - ADCR_RETUNE_C5_0 */ - [18954] = 0x0000, /* R18954 - ADCR_RETUNE_C6_1 */ - [18955] = 0x0000, /* R18955 - ADCR_RETUNE_C6_0 */ - [18956] = 0x0000, /* R18956 - ADCR_RETUNE_C7_1 */ - [18957] = 0x0000, /* R18957 - ADCR_RETUNE_C7_0 */ - [18958] = 0x0000, /* R18958 - ADCR_RETUNE_C8_1 */ - [18959] = 0x0000, /* R18959 - ADCR_RETUNE_C8_0 */ - [18960] = 0x0000, /* R18960 - ADCR_RETUNE_C9_1 */ - [18961] = 0x0000, /* R18961 - ADCR_RETUNE_C9_0 */ - [18962] = 0x0000, /* R18962 - ADCR_RETUNE_C10_1 */ - [18963] = 0x0000, /* R18963 - ADCR_RETUNE_C10_0 */ - [18964] = 0x0000, /* R18964 - ADCR_RETUNE_C11_1 */ - [18965] = 0x0000, /* R18965 - ADCR_RETUNE_C11_0 */ - [18966] = 0x0000, /* R18966 - ADCR_RETUNE_C12_1 */ - [18967] = 0x0000, /* R18967 - ADCR_RETUNE_C12_0 */ - [18968] = 0x0000, /* R18968 - ADCR_RETUNE_C13_1 */ - [18969] = 0x0000, /* R18969 - ADCR_RETUNE_C13_0 */ - [18970] = 0x0000, /* R18970 - ADCR_RETUNE_C14_1 */ - [18971] = 0x0000, /* R18971 - ADCR_RETUNE_C14_0 */ - [18972] = 0x0000, /* R18972 - ADCR_RETUNE_C15_1 */ - [18973] = 0x0000, /* R18973 - ADCR_RETUNE_C15_0 */ - [18974] = 0x0000, /* R18974 - ADCR_RETUNE_C16_1 */ - [18975] = 0x0000, /* R18975 - ADCR_RETUNE_C16_0 */ - [18976] = 0x0000, /* R18976 - ADCR_RETUNE_C17_1 */ - [18977] = 0x0000, /* R18977 - ADCR_RETUNE_C17_0 */ - [18978] = 0x0000, /* R18978 - ADCR_RETUNE_C18_1 */ - [18979] = 0x0000, /* R18979 - ADCR_RETUNE_C18_0 */ - [18980] = 0x0000, /* R18980 - ADCR_RETUNE_C19_1 */ - [18981] = 0x0000, /* R18981 - ADCR_RETUNE_C19_0 */ - [18982] = 0x0000, /* R18982 - ADCR_RETUNE_C20_1 */ - [18983] = 0x0000, /* R18983 - ADCR_RETUNE_C20_0 */ - [18984] = 0x0000, /* R18984 - ADCR_RETUNE_C21_1 */ - [18985] = 0x0000, /* R18985 - ADCR_RETUNE_C21_0 */ - [18986] = 0x0000, /* R18986 - ADCR_RETUNE_C22_1 */ - [18987] = 0x0000, /* R18987 - ADCR_RETUNE_C22_0 */ - [18988] = 0x0000, /* R18988 - ADCR_RETUNE_C23_1 */ - [18989] = 0x0000, /* R18989 - ADCR_RETUNE_C23_0 */ - [18990] = 0x0000, /* R18990 - ADCR_RETUNE_C24_1 */ - [18991] = 0x0000, /* R18991 - ADCR_RETUNE_C24_0 */ - [18992] = 0x0000, /* R18992 - ADCR_RETUNE_C25_1 */ - [18993] = 0x0000, /* R18993 - ADCR_RETUNE_C25_0 */ - [18994] = 0x0000, /* R18994 - ADCR_RETUNE_C26_1 */ - [18995] = 0x0000, /* R18995 - ADCR_RETUNE_C26_0 */ - [18996] = 0x0000, /* R18996 - ADCR_RETUNE_C27_1 */ - [18997] = 0x0000, /* R18997 - ADCR_RETUNE_C27_0 */ - [18998] = 0x0000, /* R18998 - ADCR_RETUNE_C28_1 */ - [18999] = 0x0000, /* R18999 - ADCR_RETUNE_C28_0 */ - [19000] = 0x0000, /* R19000 - ADCR_RETUNE_C29_1 */ - [19001] = 0x0000, /* R19001 - ADCR_RETUNE_C29_0 */ - [19002] = 0x0000, /* R19002 - ADCR_RETUNE_C30_1 */ - [19003] = 0x0000, /* R19003 - ADCR_RETUNE_C30_0 */ - [19004] = 0x0000, /* R19004 - ADCR_RETUNE_C31_1 */ - [19005] = 0x0000, /* R19005 - ADCR_RETUNE_C31_0 */ - [19006] = 0x0000, /* R19006 - ADCR_RETUNE_C32_1 */ - [19007] = 0x0000, /* R19007 - ADCR_RETUNE_C32_0 */ - - [19456] = 0x007F, /* R19456 - DACL_RETUNE_C1_1 */ - [19457] = 0xFFFF, /* R19457 - DACL_RETUNE_C1_0 */ - [19458] = 0x0000, /* R19458 - DACL_RETUNE_C2_1 */ - [19459] = 0x0000, /* R19459 - DACL_RETUNE_C2_0 */ - [19460] = 0x0000, /* R19460 - DACL_RETUNE_C3_1 */ - [19461] = 0x0000, /* R19461 - DACL_RETUNE_C3_0 */ - [19462] = 0x0000, /* R19462 - DACL_RETUNE_C4_1 */ - [19463] = 0x0000, /* R19463 - DACL_RETUNE_C4_0 */ - [19464] = 0x0000, /* R19464 - DACL_RETUNE_C5_1 */ - [19465] = 0x0000, /* R19465 - DACL_RETUNE_C5_0 */ - [19466] = 0x0000, /* R19466 - DACL_RETUNE_C6_1 */ - [19467] = 0x0000, /* R19467 - DACL_RETUNE_C6_0 */ - [19468] = 0x0000, /* R19468 - DACL_RETUNE_C7_1 */ - [19469] = 0x0000, /* R19469 - DACL_RETUNE_C7_0 */ - [19470] = 0x0000, /* R19470 - DACL_RETUNE_C8_1 */ - [19471] = 0x0000, /* R19471 - DACL_RETUNE_C8_0 */ - [19472] = 0x0000, /* R19472 - DACL_RETUNE_C9_1 */ - [19473] = 0x0000, /* R19473 - DACL_RETUNE_C9_0 */ - [19474] = 0x0000, /* R19474 - DACL_RETUNE_C10_1 */ - [19475] = 0x0000, /* R19475 - DACL_RETUNE_C10_0 */ - [19476] = 0x0000, /* R19476 - DACL_RETUNE_C11_1 */ - [19477] = 0x0000, /* R19477 - DACL_RETUNE_C11_0 */ - [19478] = 0x0000, /* R19478 - DACL_RETUNE_C12_1 */ - [19479] = 0x0000, /* R19479 - DACL_RETUNE_C12_0 */ - [19480] = 0x0000, /* R19480 - DACL_RETUNE_C13_1 */ - [19481] = 0x0000, /* R19481 - DACL_RETUNE_C13_0 */ - [19482] = 0x0000, /* R19482 - DACL_RETUNE_C14_1 */ - [19483] = 0x0000, /* R19483 - DACL_RETUNE_C14_0 */ - [19484] = 0x0000, /* R19484 - DACL_RETUNE_C15_1 */ - [19485] = 0x0000, /* R19485 - DACL_RETUNE_C15_0 */ - [19486] = 0x0000, /* R19486 - DACL_RETUNE_C16_1 */ - [19487] = 0x0000, /* R19487 - DACL_RETUNE_C16_0 */ - [19488] = 0x0000, /* R19488 - DACL_RETUNE_C17_1 */ - [19489] = 0x0000, /* R19489 - DACL_RETUNE_C17_0 */ - [19490] = 0x0000, /* R19490 - DACL_RETUNE_C18_1 */ - [19491] = 0x0000, /* R19491 - DACL_RETUNE_C18_0 */ - [19492] = 0x0000, /* R19492 - DACL_RETUNE_C19_1 */ - [19493] = 0x0000, /* R19493 - DACL_RETUNE_C19_0 */ - [19494] = 0x0000, /* R19494 - DACL_RETUNE_C20_1 */ - [19495] = 0x0000, /* R19495 - DACL_RETUNE_C20_0 */ - [19496] = 0x0000, /* R19496 - DACL_RETUNE_C21_1 */ - [19497] = 0x0000, /* R19497 - DACL_RETUNE_C21_0 */ - [19498] = 0x0000, /* R19498 - DACL_RETUNE_C22_1 */ - [19499] = 0x0000, /* R19499 - DACL_RETUNE_C22_0 */ - [19500] = 0x0000, /* R19500 - DACL_RETUNE_C23_1 */ - [19501] = 0x0000, /* R19501 - DACL_RETUNE_C23_0 */ - [19502] = 0x0000, /* R19502 - DACL_RETUNE_C24_1 */ - [19503] = 0x0000, /* R19503 - DACL_RETUNE_C24_0 */ - [19504] = 0x0000, /* R19504 - DACL_RETUNE_C25_1 */ - [19505] = 0x0000, /* R19505 - DACL_RETUNE_C25_0 */ - [19506] = 0x0000, /* R19506 - DACL_RETUNE_C26_1 */ - [19507] = 0x0000, /* R19507 - DACL_RETUNE_C26_0 */ - [19508] = 0x0000, /* R19508 - DACL_RETUNE_C27_1 */ - [19509] = 0x0000, /* R19509 - DACL_RETUNE_C27_0 */ - [19510] = 0x0000, /* R19510 - DACL_RETUNE_C28_1 */ - [19511] = 0x0000, /* R19511 - DACL_RETUNE_C28_0 */ - [19512] = 0x0000, /* R19512 - DACL_RETUNE_C29_1 */ - [19513] = 0x0000, /* R19513 - DACL_RETUNE_C29_0 */ - [19514] = 0x0000, /* R19514 - DACL_RETUNE_C30_1 */ - [19515] = 0x0000, /* R19515 - DACL_RETUNE_C30_0 */ - [19516] = 0x0000, /* R19516 - DACL_RETUNE_C31_1 */ - [19517] = 0x0000, /* R19517 - DACL_RETUNE_C31_0 */ - [19518] = 0x0000, /* R19518 - DACL_RETUNE_C32_1 */ - [19519] = 0x0000, /* R19519 - DACL_RETUNE_C32_0 */ - - [19968] = 0x0020, /* R19968 - RETUNEDAC_PG2_1 */ - [19969] = 0x0000, /* R19969 - RETUNEDAC_PG2_0 */ - [19970] = 0x0040, /* R19970 - RETUNEDAC_PG_1 */ - [19971] = 0x0000, /* R19971 - RETUNEDAC_PG_0 */ - - [20480] = 0x007F, /* R20480 - DACR_RETUNE_C1_1 */ - [20481] = 0xFFFF, /* R20481 - DACR_RETUNE_C1_0 */ - [20482] = 0x0000, /* R20482 - DACR_RETUNE_C2_1 */ - [20483] = 0x0000, /* R20483 - DACR_RETUNE_C2_0 */ - [20484] = 0x0000, /* R20484 - DACR_RETUNE_C3_1 */ - [20485] = 0x0000, /* R20485 - DACR_RETUNE_C3_0 */ - [20486] = 0x0000, /* R20486 - DACR_RETUNE_C4_1 */ - [20487] = 0x0000, /* R20487 - DACR_RETUNE_C4_0 */ - [20488] = 0x0000, /* R20488 - DACR_RETUNE_C5_1 */ - [20489] = 0x0000, /* R20489 - DACR_RETUNE_C5_0 */ - [20490] = 0x0000, /* R20490 - DACR_RETUNE_C6_1 */ - [20491] = 0x0000, /* R20491 - DACR_RETUNE_C6_0 */ - [20492] = 0x0000, /* R20492 - DACR_RETUNE_C7_1 */ - [20493] = 0x0000, /* R20493 - DACR_RETUNE_C7_0 */ - [20494] = 0x0000, /* R20494 - DACR_RETUNE_C8_1 */ - [20495] = 0x0000, /* R20495 - DACR_RETUNE_C8_0 */ - [20496] = 0x0000, /* R20496 - DACR_RETUNE_C9_1 */ - [20497] = 0x0000, /* R20497 - DACR_RETUNE_C9_0 */ - [20498] = 0x0000, /* R20498 - DACR_RETUNE_C10_1 */ - [20499] = 0x0000, /* R20499 - DACR_RETUNE_C10_0 */ - [20500] = 0x0000, /* R20500 - DACR_RETUNE_C11_1 */ - [20501] = 0x0000, /* R20501 - DACR_RETUNE_C11_0 */ - [20502] = 0x0000, /* R20502 - DACR_RETUNE_C12_1 */ - [20503] = 0x0000, /* R20503 - DACR_RETUNE_C12_0 */ - [20504] = 0x0000, /* R20504 - DACR_RETUNE_C13_1 */ - [20505] = 0x0000, /* R20505 - DACR_RETUNE_C13_0 */ - [20506] = 0x0000, /* R20506 - DACR_RETUNE_C14_1 */ - [20507] = 0x0000, /* R20507 - DACR_RETUNE_C14_0 */ - [20508] = 0x0000, /* R20508 - DACR_RETUNE_C15_1 */ - [20509] = 0x0000, /* R20509 - DACR_RETUNE_C15_0 */ - [20510] = 0x0000, /* R20510 - DACR_RETUNE_C16_1 */ - [20511] = 0x0000, /* R20511 - DACR_RETUNE_C16_0 */ - [20512] = 0x0000, /* R20512 - DACR_RETUNE_C17_1 */ - [20513] = 0x0000, /* R20513 - DACR_RETUNE_C17_0 */ - [20514] = 0x0000, /* R20514 - DACR_RETUNE_C18_1 */ - [20515] = 0x0000, /* R20515 - DACR_RETUNE_C18_0 */ - [20516] = 0x0000, /* R20516 - DACR_RETUNE_C19_1 */ - [20517] = 0x0000, /* R20517 - DACR_RETUNE_C19_0 */ - [20518] = 0x0000, /* R20518 - DACR_RETUNE_C20_1 */ - [20519] = 0x0000, /* R20519 - DACR_RETUNE_C20_0 */ - [20520] = 0x0000, /* R20520 - DACR_RETUNE_C21_1 */ - [20521] = 0x0000, /* R20521 - DACR_RETUNE_C21_0 */ - [20522] = 0x0000, /* R20522 - DACR_RETUNE_C22_1 */ - [20523] = 0x0000, /* R20523 - DACR_RETUNE_C22_0 */ - [20524] = 0x0000, /* R20524 - DACR_RETUNE_C23_1 */ - [20525] = 0x0000, /* R20525 - DACR_RETUNE_C23_0 */ - [20526] = 0x0000, /* R20526 - DACR_RETUNE_C24_1 */ - [20527] = 0x0000, /* R20527 - DACR_RETUNE_C24_0 */ - [20528] = 0x0000, /* R20528 - DACR_RETUNE_C25_1 */ - [20529] = 0x0000, /* R20529 - DACR_RETUNE_C25_0 */ - [20530] = 0x0000, /* R20530 - DACR_RETUNE_C26_1 */ - [20531] = 0x0000, /* R20531 - DACR_RETUNE_C26_0 */ - [20532] = 0x0000, /* R20532 - DACR_RETUNE_C27_1 */ - [20533] = 0x0000, /* R20533 - DACR_RETUNE_C27_0 */ - [20534] = 0x0000, /* R20534 - DACR_RETUNE_C28_1 */ - [20535] = 0x0000, /* R20535 - DACR_RETUNE_C28_0 */ - [20536] = 0x0000, /* R20536 - DACR_RETUNE_C29_1 */ - [20537] = 0x0000, /* R20537 - DACR_RETUNE_C29_0 */ - [20538] = 0x0000, /* R20538 - DACR_RETUNE_C30_1 */ - [20539] = 0x0000, /* R20539 - DACR_RETUNE_C30_0 */ - [20540] = 0x0000, /* R20540 - DACR_RETUNE_C31_1 */ - [20541] = 0x0000, /* R20541 - DACR_RETUNE_C31_0 */ - [20542] = 0x0000, /* R20542 - DACR_RETUNE_C32_1 */ - [20543] = 0x0000, /* R20543 - DACR_RETUNE_C32_0 */ - - [20992] = 0x008C, /* R20992 - VSS_XHD2_1 */ - [20993] = 0x0200, /* R20993 - VSS_XHD2_0 */ - [20994] = 0x0035, /* R20994 - VSS_XHD3_1 */ - [20995] = 0x0700, /* R20995 - VSS_XHD3_0 */ - [20996] = 0x003A, /* R20996 - VSS_XHN1_1 */ - [20997] = 0x4100, /* R20997 - VSS_XHN1_0 */ - [20998] = 0x008B, /* R20998 - VSS_XHN2_1 */ - [20999] = 0x7D00, /* R20999 - VSS_XHN2_0 */ - [21000] = 0x003A, /* R21000 - VSS_XHN3_1 */ - [21001] = 0x4100, /* R21001 - VSS_XHN3_0 */ - [21002] = 0x008C, /* R21002 - VSS_XLA_1 */ - [21003] = 0xFEE8, /* R21003 - VSS_XLA_0 */ - [21004] = 0x0078, /* R21004 - VSS_XLB_1 */ - [21005] = 0x0000, /* R21005 - VSS_XLB_0 */ - [21006] = 0x003F, /* R21006 - VSS_XLG_1 */ - [21007] = 0xB260, /* R21007 - VSS_XLG_0 */ - [21008] = 0x002D, /* R21008 - VSS_PG2_1 */ - [21009] = 0x1818, /* R21009 - VSS_PG2_0 */ - [21010] = 0x0020, /* R21010 - VSS_PG_1 */ - [21011] = 0x0000, /* R21011 - VSS_PG_0 */ - [21012] = 0x00F1, /* R21012 - VSS_XTD1_1 */ - [21013] = 0x8340, /* R21013 - VSS_XTD1_0 */ - [21014] = 0x00FB, /* R21014 - VSS_XTD2_1 */ - [21015] = 0x8300, /* R21015 - VSS_XTD2_0 */ - [21016] = 0x00EE, /* R21016 - VSS_XTD3_1 */ - [21017] = 0xAEC0, /* R21017 - VSS_XTD3_0 */ - [21018] = 0x00FB, /* R21018 - VSS_XTD4_1 */ - [21019] = 0xAC40, /* R21019 - VSS_XTD4_0 */ - [21020] = 0x00F1, /* R21020 - VSS_XTD5_1 */ - [21021] = 0x7F80, /* R21021 - VSS_XTD5_0 */ - [21022] = 0x00F4, /* R21022 - VSS_XTD6_1 */ - [21023] = 0x3B40, /* R21023 - VSS_XTD6_0 */ - [21024] = 0x00F5, /* R21024 - VSS_XTD7_1 */ - [21025] = 0xFB00, /* R21025 - VSS_XTD7_0 */ - [21026] = 0x00EA, /* R21026 - VSS_XTD8_1 */ - [21027] = 0x10C0, /* R21027 - VSS_XTD8_0 */ - [21028] = 0x00FC, /* R21028 - VSS_XTD9_1 */ - [21029] = 0xC580, /* R21029 - VSS_XTD9_0 */ - [21030] = 0x00E2, /* R21030 - VSS_XTD10_1 */ - [21031] = 0x75C0, /* R21031 - VSS_XTD10_0 */ - [21032] = 0x0004, /* R21032 - VSS_XTD11_1 */ - [21033] = 0xB480, /* R21033 - VSS_XTD11_0 */ - [21034] = 0x00D4, /* R21034 - VSS_XTD12_1 */ - [21035] = 0xF980, /* R21035 - VSS_XTD12_0 */ - [21036] = 0x0004, /* R21036 - VSS_XTD13_1 */ - [21037] = 0x9140, /* R21037 - VSS_XTD13_0 */ - [21038] = 0x00D8, /* R21038 - VSS_XTD14_1 */ - [21039] = 0xA480, /* R21039 - VSS_XTD14_0 */ - [21040] = 0x0002, /* R21040 - VSS_XTD15_1 */ - [21041] = 0x3DC0, /* R21041 - VSS_XTD15_0 */ - [21042] = 0x00CF, /* R21042 - VSS_XTD16_1 */ - [21043] = 0x7A80, /* R21043 - VSS_XTD16_0 */ - [21044] = 0x00DC, /* R21044 - VSS_XTD17_1 */ - [21045] = 0x0600, /* R21045 - VSS_XTD17_0 */ - [21046] = 0x00F2, /* R21046 - VSS_XTD18_1 */ - [21047] = 0xDAC0, /* R21047 - VSS_XTD18_0 */ - [21048] = 0x00BA, /* R21048 - VSS_XTD19_1 */ - [21049] = 0xF340, /* R21049 - VSS_XTD19_0 */ - [21050] = 0x000A, /* R21050 - VSS_XTD20_1 */ - [21051] = 0x7940, /* R21051 - VSS_XTD20_0 */ - [21052] = 0x001C, /* R21052 - VSS_XTD21_1 */ - [21053] = 0x0680, /* R21053 - VSS_XTD21_0 */ - [21054] = 0x00FD, /* R21054 - VSS_XTD22_1 */ - [21055] = 0x2D00, /* R21055 - VSS_XTD22_0 */ - [21056] = 0x001C, /* R21056 - VSS_XTD23_1 */ - [21057] = 0xE840, /* R21057 - VSS_XTD23_0 */ - [21058] = 0x000D, /* R21058 - VSS_XTD24_1 */ - [21059] = 0xDC40, /* R21059 - VSS_XTD24_0 */ - [21060] = 0x00FC, /* R21060 - VSS_XTD25_1 */ - [21061] = 0x9D00, /* R21061 - VSS_XTD25_0 */ - [21062] = 0x0009, /* R21062 - VSS_XTD26_1 */ - [21063] = 0x5580, /* R21063 - VSS_XTD26_0 */ - [21064] = 0x00FE, /* R21064 - VSS_XTD27_1 */ - [21065] = 0x7E80, /* R21065 - VSS_XTD27_0 */ - [21066] = 0x000E, /* R21066 - VSS_XTD28_1 */ - [21067] = 0xAB40, /* R21067 - VSS_XTD28_0 */ - [21068] = 0x00F9, /* R21068 - VSS_XTD29_1 */ - [21069] = 0x9880, /* R21069 - VSS_XTD29_0 */ - [21070] = 0x0009, /* R21070 - VSS_XTD30_1 */ - [21071] = 0x87C0, /* R21071 - VSS_XTD30_0 */ - [21072] = 0x00FD, /* R21072 - VSS_XTD31_1 */ - [21073] = 0x2C40, /* R21073 - VSS_XTD31_0 */ - [21074] = 0x0009, /* R21074 - VSS_XTD32_1 */ - [21075] = 0x4800, /* R21075 - VSS_XTD32_0 */ - [21076] = 0x0003, /* R21076 - VSS_XTS1_1 */ - [21077] = 0x5F40, /* R21077 - VSS_XTS1_0 */ - [21078] = 0x0000, /* R21078 - VSS_XTS2_1 */ - [21079] = 0x8700, /* R21079 - VSS_XTS2_0 */ - [21080] = 0x00FA, /* R21080 - VSS_XTS3_1 */ - [21081] = 0xE4C0, /* R21081 - VSS_XTS3_0 */ - [21082] = 0x0000, /* R21082 - VSS_XTS4_1 */ - [21083] = 0x0B40, /* R21083 - VSS_XTS4_0 */ - [21084] = 0x0004, /* R21084 - VSS_XTS5_1 */ - [21085] = 0xE180, /* R21085 - VSS_XTS5_0 */ - [21086] = 0x0001, /* R21086 - VSS_XTS6_1 */ - [21087] = 0x1F40, /* R21087 - VSS_XTS6_0 */ - [21088] = 0x00F8, /* R21088 - VSS_XTS7_1 */ - [21089] = 0xB000, /* R21089 - VSS_XTS7_0 */ - [21090] = 0x00FB, /* R21090 - VSS_XTS8_1 */ - [21091] = 0xCBC0, /* R21091 - VSS_XTS8_0 */ - [21092] = 0x0004, /* R21092 - VSS_XTS9_1 */ - [21093] = 0xF380, /* R21093 - VSS_XTS9_0 */ - [21094] = 0x0007, /* R21094 - VSS_XTS10_1 */ - [21095] = 0xDF40, /* R21095 - VSS_XTS10_0 */ - [21096] = 0x00FF, /* R21096 - VSS_XTS11_1 */ - [21097] = 0x0700, /* R21097 - VSS_XTS11_0 */ - [21098] = 0x00EF, /* R21098 - VSS_XTS12_1 */ - [21099] = 0xD700, /* R21099 - VSS_XTS12_0 */ - [21100] = 0x00FB, /* R21100 - VSS_XTS13_1 */ - [21101] = 0xAF40, /* R21101 - VSS_XTS13_0 */ - [21102] = 0x0010, /* R21102 - VSS_XTS14_1 */ - [21103] = 0x8A80, /* R21103 - VSS_XTS14_0 */ - [21104] = 0x0011, /* R21104 - VSS_XTS15_1 */ - [21105] = 0x07C0, /* R21105 - VSS_XTS15_0 */ - [21106] = 0x00E0, /* R21106 - VSS_XTS16_1 */ - [21107] = 0x0800, /* R21107 - VSS_XTS16_0 */ - [21108] = 0x00D2, /* R21108 - VSS_XTS17_1 */ - [21109] = 0x7600, /* R21109 - VSS_XTS17_0 */ - [21110] = 0x0020, /* R21110 - VSS_XTS18_1 */ - [21111] = 0xCF40, /* R21111 - VSS_XTS18_0 */ - [21112] = 0x0030, /* R21112 - VSS_XTS19_1 */ - [21113] = 0x2340, /* R21113 - VSS_XTS19_0 */ - [21114] = 0x00FD, /* R21114 - VSS_XTS20_1 */ - [21115] = 0x69C0, /* R21115 - VSS_XTS20_0 */ - [21116] = 0x0028, /* R21116 - VSS_XTS21_1 */ - [21117] = 0x3500, /* R21117 - VSS_XTS21_0 */ - [21118] = 0x0006, /* R21118 - VSS_XTS22_1 */ - [21119] = 0x3300, /* R21119 - VSS_XTS22_0 */ - [21120] = 0x00D9, /* R21120 - VSS_XTS23_1 */ - [21121] = 0xF6C0, /* R21121 - VSS_XTS23_0 */ - [21122] = 0x00F3, /* R21122 - VSS_XTS24_1 */ - [21123] = 0x3340, /* R21123 - VSS_XTS24_0 */ - [21124] = 0x000F, /* R21124 - VSS_XTS25_1 */ - [21125] = 0x4200, /* R21125 - VSS_XTS25_0 */ - [21126] = 0x0004, /* R21126 - VSS_XTS26_1 */ - [21127] = 0x0C80, /* R21127 - VSS_XTS26_0 */ - [21128] = 0x00FB, /* R21128 - VSS_XTS27_1 */ - [21129] = 0x3F80, /* R21129 - VSS_XTS27_0 */ - [21130] = 0x00F7, /* R21130 - VSS_XTS28_1 */ - [21131] = 0x57C0, /* R21131 - VSS_XTS28_0 */ - [21132] = 0x0003, /* R21132 - VSS_XTS29_1 */ - [21133] = 0x5400, /* R21133 - VSS_XTS29_0 */ - [21134] = 0x0000, /* R21134 - VSS_XTS30_1 */ - [21135] = 0xC6C0, /* R21135 - VSS_XTS30_0 */ - [21136] = 0x0003, /* R21136 - VSS_XTS31_1 */ - [21137] = 0x12C0, /* R21137 - VSS_XTS31_0 */ - [21138] = 0x00FD, /* R21138 - VSS_XTS32_1 */ - [21139] = 0x8580, /* R21139 - VSS_XTS32_0 */ +static struct reg_default wm8962_reg[] = { + { 0, 0x009F }, /* R0 - Left Input volume */ + { 1, 0x049F }, /* R1 - Right Input volume */ + { 2, 0x0000 }, /* R2 - HPOUTL volume */ + { 3, 0x0000 }, /* R3 - HPOUTR volume */ + { 4, 0x0020 }, /* R4 - Clocking1 */ + { 5, 0x0018 }, /* R5 - ADC & DAC Control 1 */ + { 6, 0x2008 }, /* R6 - ADC & DAC Control 2 */ + { 7, 0x000A }, /* R7 - Audio Interface 0 */ + { 8, 0x01E4 }, /* R8 - Clocking2 */ + { 9, 0x0300 }, /* R9 - Audio Interface 1 */ + { 10, 0x00C0 }, /* R10 - Left DAC volume */ + { 11, 0x00C0 }, /* R11 - Right DAC volume */ + + { 14, 0x0040 }, /* R14 - Audio Interface 2 */ + { 15, 0x6243 }, /* R15 - Software Reset */ + + { 17, 0x007B }, /* R17 - ALC1 */ + { 18, 0x0000 }, /* R18 - ALC2 */ + { 19, 0x1C32 }, /* R19 - ALC3 */ + { 20, 0x3200 }, /* R20 - Noise Gate */ + { 21, 0x00C0 }, /* R21 - Left ADC volume */ + { 22, 0x00C0 }, /* R22 - Right ADC volume */ + { 23, 0x0160 }, /* R23 - Additional control(1) */ + { 24, 0x0000 }, /* R24 - Additional control(2) */ + { 25, 0x0000 }, /* R25 - Pwr Mgmt (1) */ + { 26, 0x0000 }, /* R26 - Pwr Mgmt (2) */ + { 27, 0x0010 }, /* R27 - Additional Control (3) */ + { 28, 0x0000 }, /* R28 - Anti-pop */ + + { 30, 0x005E }, /* R30 - Clocking 3 */ + { 31, 0x0000 }, /* R31 - Input mixer control (1) */ + { 32, 0x0145 }, /* R32 - Left input mixer volume */ + { 33, 0x0145 }, /* R33 - Right input mixer volume */ + { 34, 0x0009 }, /* R34 - Input mixer control (2) */ + { 35, 0x0003 }, /* R35 - Input bias control */ + { 37, 0x0008 }, /* R37 - Left input PGA control */ + { 38, 0x0008 }, /* R38 - Right input PGA control */ + + { 40, 0x0000 }, /* R40 - SPKOUTL volume */ + { 41, 0x0000 }, /* R41 - SPKOUTR volume */ + + { 47, 0x0000 }, /* R47 - Thermal Shutdown Status */ + { 48, 0x8027 }, /* R48 - Additional Control (4) */ + { 49, 0x0010 }, /* R49 - Class D Control 1 */ + + { 51, 0x0003 }, /* R51 - Class D Control 2 */ + + { 56, 0x0506 }, /* R56 - Clocking 4 */ + { 57, 0x0000 }, /* R57 - DAC DSP Mixing (1) */ + { 58, 0x0000 }, /* R58 - DAC DSP Mixing (2) */ + + { 60, 0x0300 }, /* R60 - DC Servo 0 */ + { 61, 0x0300 }, /* R61 - DC Servo 1 */ + + { 64, 0x0810 }, /* R64 - DC Servo 4 */ + + { 66, 0x0000 }, /* R66 - DC Servo 6 */ + + { 68, 0x001B }, /* R68 - Analogue PGA Bias */ + { 69, 0x0000 }, /* R69 - Analogue HP 0 */ + + { 71, 0x01FB }, /* R71 - Analogue HP 2 */ + { 72, 0x0000 }, /* R72 - Charge Pump 1 */ + + { 82, 0x0004 }, /* R82 - Charge Pump B */ + + { 87, 0x0000 }, /* R87 - Write Sequencer Control 1 */ + + { 90, 0x0000 }, /* R90 - Write Sequencer Control 2 */ + + { 93, 0x0000 }, /* R93 - Write Sequencer Control 3 */ + { 94, 0x0000 }, /* R94 - Control Interface */ + + { 99, 0x0000 }, /* R99 - Mixer Enables */ + { 100, 0x0000 }, /* R100 - Headphone Mixer (1) */ + { 101, 0x0000 }, /* R101 - Headphone Mixer (2) */ + { 102, 0x013F }, /* R102 - Headphone Mixer (3) */ + { 103, 0x013F }, /* R103 - Headphone Mixer (4) */ + + { 105, 0x0000 }, /* R105 - Speaker Mixer (1) */ + { 106, 0x0000 }, /* R106 - Speaker Mixer (2) */ + { 107, 0x013F }, /* R107 - Speaker Mixer (3) */ + { 108, 0x013F }, /* R108 - Speaker Mixer (4) */ + { 109, 0x0003 }, /* R109 - Speaker Mixer (5) */ + { 110, 0x0002 }, /* R110 - Beep Generator (1) */ + + { 115, 0x0006 }, /* R115 - Oscillator Trim (3) */ + { 116, 0x0026 }, /* R116 - Oscillator Trim (4) */ + + { 119, 0x0000 }, /* R119 - Oscillator Trim (7) */ + + { 124, 0x0011 }, /* R124 - Analogue Clocking1 */ + { 125, 0x004B }, /* R125 - Analogue Clocking2 */ + { 126, 0x000D }, /* R126 - Analogue Clocking3 */ + { 127, 0x0000 }, /* R127 - PLL Software Reset */ + + { 129, 0x0000 }, /* R129 - PLL2 */ + + { 131, 0x0000 }, /* R131 - PLL 4 */ + + { 136, 0x0067 }, /* R136 - PLL 9 */ + { 137, 0x001C }, /* R137 - PLL 10 */ + { 138, 0x0071 }, /* R138 - PLL 11 */ + { 139, 0x00C7 }, /* R139 - PLL 12 */ + { 140, 0x0067 }, /* R140 - PLL 13 */ + { 141, 0x0048 }, /* R141 - PLL 14 */ + { 142, 0x0022 }, /* R142 - PLL 15 */ + { 143, 0x0097 }, /* R143 - PLL 16 */ + + { 155, 0x000C }, /* R155 - FLL Control (1) */ + { 156, 0x0039 }, /* R156 - FLL Control (2) */ + { 157, 0x0180 }, /* R157 - FLL Control (3) */ + + { 159, 0x0032 }, /* R159 - FLL Control (5) */ + { 160, 0x0018 }, /* R160 - FLL Control (6) */ + { 161, 0x007D }, /* R161 - FLL Control (7) */ + { 162, 0x0008 }, /* R162 - FLL Control (8) */ + + { 252, 0x0005 }, /* R252 - General test 1 */ + + { 256, 0x0000 }, /* R256 - DF1 */ + { 257, 0x0000 }, /* R257 - DF2 */ + { 258, 0x0000 }, /* R258 - DF3 */ + { 259, 0x0000 }, /* R259 - DF4 */ + { 260, 0x0000 }, /* R260 - DF5 */ + { 261, 0x0000 }, /* R261 - DF6 */ + { 262, 0x0000 }, /* R262 - DF7 */ + + { 264, 0x0000 }, /* R264 - LHPF1 */ + { 265, 0x0000 }, /* R265 - LHPF2 */ + + { 268, 0x0000 }, /* R268 - THREED1 */ + { 269, 0x0000 }, /* R269 - THREED2 */ + { 270, 0x0000 }, /* R270 - THREED3 */ + { 271, 0x0000 }, /* R271 - THREED4 */ + + { 276, 0x000C }, /* R276 - DRC 1 */ + { 277, 0x0925 }, /* R277 - DRC 2 */ + { 278, 0x0000 }, /* R278 - DRC 3 */ + { 279, 0x0000 }, /* R279 - DRC 4 */ + { 280, 0x0000 }, /* R280 - DRC 5 */ + + { 285, 0x0000 }, /* R285 - Tloopback */ + + { 335, 0x0004 }, /* R335 - EQ1 */ + { 336, 0x6318 }, /* R336 - EQ2 */ + { 337, 0x6300 }, /* R337 - EQ3 */ + { 338, 0x0FCA }, /* R338 - EQ4 */ + { 339, 0x0400 }, /* R339 - EQ5 */ + { 340, 0x00D8 }, /* R340 - EQ6 */ + { 341, 0x1EB5 }, /* R341 - EQ7 */ + { 342, 0xF145 }, /* R342 - EQ8 */ + { 343, 0x0B75 }, /* R343 - EQ9 */ + { 344, 0x01C5 }, /* R344 - EQ10 */ + { 345, 0x1C58 }, /* R345 - EQ11 */ + { 346, 0xF373 }, /* R346 - EQ12 */ + { 347, 0x0A54 }, /* R347 - EQ13 */ + { 348, 0x0558 }, /* R348 - EQ14 */ + { 349, 0x168E }, /* R349 - EQ15 */ + { 350, 0xF829 }, /* R350 - EQ16 */ + { 351, 0x07AD }, /* R351 - EQ17 */ + { 352, 0x1103 }, /* R352 - EQ18 */ + { 353, 0x0564 }, /* R353 - EQ19 */ + { 354, 0x0559 }, /* R354 - EQ20 */ + { 355, 0x4000 }, /* R355 - EQ21 */ + { 356, 0x6318 }, /* R356 - EQ22 */ + { 357, 0x6300 }, /* R357 - EQ23 */ + { 358, 0x0FCA }, /* R358 - EQ24 */ + { 359, 0x0400 }, /* R359 - EQ25 */ + { 360, 0x00D8 }, /* R360 - EQ26 */ + { 361, 0x1EB5 }, /* R361 - EQ27 */ + { 362, 0xF145 }, /* R362 - EQ28 */ + { 363, 0x0B75 }, /* R363 - EQ29 */ + { 364, 0x01C5 }, /* R364 - EQ30 */ + { 365, 0x1C58 }, /* R365 - EQ31 */ + { 366, 0xF373 }, /* R366 - EQ32 */ + { 367, 0x0A54 }, /* R367 - EQ33 */ + { 368, 0x0558 }, /* R368 - EQ34 */ + { 369, 0x168E }, /* R369 - EQ35 */ + { 370, 0xF829 }, /* R370 - EQ36 */ + { 371, 0x07AD }, /* R371 - EQ37 */ + { 372, 0x1103 }, /* R372 - EQ38 */ + { 373, 0x0564 }, /* R373 - EQ39 */ + { 374, 0x0559 }, /* R374 - EQ40 */ + { 375, 0x4000 }, /* R375 - EQ41 */ + + { 513, 0x0000 }, /* R513 - GPIO 2 */ + { 514, 0x0000 }, /* R514 - GPIO 3 */ + + { 516, 0x8100 }, /* R516 - GPIO 5 */ + { 517, 0x8100 }, /* R517 - GPIO 6 */ + + { 560, 0x0000 }, /* R560 - Interrupt Status 1 */ + { 561, 0x0000 }, /* R561 - Interrupt Status 2 */ + + { 568, 0x0030 }, /* R568 - Interrupt Status 1 Mask */ + { 569, 0xFFED }, /* R569 - Interrupt Status 2 Mask */ + + { 576, 0x0000 }, /* R576 - Interrupt Control */ + + { 584, 0x002D }, /* R584 - IRQ Debounce */ + + { 586, 0x0000 }, /* R586 - MICINT Source Pol */ + + { 768, 0x1C00 }, /* R768 - DSP2 Power Management */ + + { 1037, 0x0000 }, /* R1037 - DSP2_ExecControl */ + + { 8192, 0x0000 }, /* R8192 - DSP2 Instruction RAM 0 */ + + { 9216, 0x0030 }, /* R9216 - DSP2 Address RAM 2 */ + { 9217, 0x0000 }, /* R9217 - DSP2 Address RAM 1 */ + { 9218, 0x0000 }, /* R9218 - DSP2 Address RAM 0 */ + + { 12288, 0x0000 }, /* R12288 - DSP2 Data1 RAM 1 */ + { 12289, 0x0000 }, /* R12289 - DSP2 Data1 RAM 0 */ + + { 13312, 0x0000 }, /* R13312 - DSP2 Data2 RAM 1 */ + { 13313, 0x0000 }, /* R13313 - DSP2 Data2 RAM 0 */ + + { 14336, 0x0000 }, /* R14336 - DSP2 Data3 RAM 1 */ + { 14337, 0x0000 }, /* R14337 - DSP2 Data3 RAM 0 */ + + { 15360, 0x000A }, /* R15360 - DSP2 Coeff RAM 0 */ + + { 16384, 0x0000 }, /* R16384 - RETUNEADC_SHARED_COEFF_1 */ + { 16385, 0x0000 }, /* R16385 - RETUNEADC_SHARED_COEFF_0 */ + { 16386, 0x0000 }, /* R16386 - RETUNEDAC_SHARED_COEFF_1 */ + { 16387, 0x0000 }, /* R16387 - RETUNEDAC_SHARED_COEFF_0 */ + { 16388, 0x0000 }, /* R16388 - SOUNDSTAGE_ENABLES_1 */ + { 16389, 0x0000 }, /* R16389 - SOUNDSTAGE_ENABLES_0 */ + + { 16896, 0x0002 }, /* R16896 - HDBASS_AI_1 */ + { 16897, 0xBD12 }, /* R16897 - HDBASS_AI_0 */ + { 16898, 0x007C }, /* R16898 - HDBASS_AR_1 */ + { 16899, 0x586C }, /* R16899 - HDBASS_AR_0 */ + { 16900, 0x0053 }, /* R16900 - HDBASS_B_1 */ + { 16901, 0x8121 }, /* R16901 - HDBASS_B_0 */ + { 16902, 0x003F }, /* R16902 - HDBASS_K_1 */ + { 16903, 0x8BD8 }, /* R16903 - HDBASS_K_0 */ + { 16904, 0x0032 }, /* R16904 - HDBASS_N1_1 */ + { 16905, 0xF52D }, /* R16905 - HDBASS_N1_0 */ + { 16906, 0x0065 }, /* R16906 - HDBASS_N2_1 */ + { 16907, 0xAC8C }, /* R16907 - HDBASS_N2_0 */ + { 16908, 0x006B }, /* R16908 - HDBASS_N3_1 */ + { 16909, 0xE087 }, /* R16909 - HDBASS_N3_0 */ + { 16910, 0x0072 }, /* R16910 - HDBASS_N4_1 */ + { 16911, 0x1483 }, /* R16911 - HDBASS_N4_0 */ + { 16912, 0x0072 }, /* R16912 - HDBASS_N5_1 */ + { 16913, 0x1483 }, /* R16913 - HDBASS_N5_0 */ + { 16914, 0x0043 }, /* R16914 - HDBASS_X1_1 */ + { 16915, 0x3525 }, /* R16915 - HDBASS_X1_0 */ + { 16916, 0x0006 }, /* R16916 - HDBASS_X2_1 */ + { 16917, 0x6A4A }, /* R16917 - HDBASS_X2_0 */ + { 16918, 0x0043 }, /* R16918 - HDBASS_X3_1 */ + { 16919, 0x6079 }, /* R16919 - HDBASS_X3_0 */ + { 16920, 0x0008 }, /* R16920 - HDBASS_ATK_1 */ + { 16921, 0x0000 }, /* R16921 - HDBASS_ATK_0 */ + { 16922, 0x0001 }, /* R16922 - HDBASS_DCY_1 */ + { 16923, 0x0000 }, /* R16923 - HDBASS_DCY_0 */ + { 16924, 0x0059 }, /* R16924 - HDBASS_PG_1 */ + { 16925, 0x999A }, /* R16925 - HDBASS_PG_0 */ + + { 17048, 0x0083 }, /* R17408 - HPF_C_1 */ + { 17049, 0x98AD }, /* R17409 - HPF_C_0 */ + + { 17920, 0x007F }, /* R17920 - ADCL_RETUNE_C1_1 */ + { 17921, 0xFFFF }, /* R17921 - ADCL_RETUNE_C1_0 */ + { 17922, 0x0000 }, /* R17922 - ADCL_RETUNE_C2_1 */ + { 17923, 0x0000 }, /* R17923 - ADCL_RETUNE_C2_0 */ + { 17924, 0x0000 }, /* R17924 - ADCL_RETUNE_C3_1 */ + { 17925, 0x0000 }, /* R17925 - ADCL_RETUNE_C3_0 */ + { 17926, 0x0000 }, /* R17926 - ADCL_RETUNE_C4_1 */ + { 17927, 0x0000 }, /* R17927 - ADCL_RETUNE_C4_0 */ + { 17928, 0x0000 }, /* R17928 - ADCL_RETUNE_C5_1 */ + { 17929, 0x0000 }, /* R17929 - ADCL_RETUNE_C5_0 */ + { 17930, 0x0000 }, /* R17930 - ADCL_RETUNE_C6_1 */ + { 17931, 0x0000 }, /* R17931 - ADCL_RETUNE_C6_0 */ + { 17932, 0x0000 }, /* R17932 - ADCL_RETUNE_C7_1 */ + { 17933, 0x0000 }, /* R17933 - ADCL_RETUNE_C7_0 */ + { 17934, 0x0000 }, /* R17934 - ADCL_RETUNE_C8_1 */ + { 17935, 0x0000 }, /* R17935 - ADCL_RETUNE_C8_0 */ + { 17936, 0x0000 }, /* R17936 - ADCL_RETUNE_C9_1 */ + { 17937, 0x0000 }, /* R17937 - ADCL_RETUNE_C9_0 */ + { 17938, 0x0000 }, /* R17938 - ADCL_RETUNE_C10_1 */ + { 17939, 0x0000 }, /* R17939 - ADCL_RETUNE_C10_0 */ + { 17940, 0x0000 }, /* R17940 - ADCL_RETUNE_C11_1 */ + { 17941, 0x0000 }, /* R17941 - ADCL_RETUNE_C11_0 */ + { 17942, 0x0000 }, /* R17942 - ADCL_RETUNE_C12_1 */ + { 17943, 0x0000 }, /* R17943 - ADCL_RETUNE_C12_0 */ + { 17944, 0x0000 }, /* R17944 - ADCL_RETUNE_C13_1 */ + { 17945, 0x0000 }, /* R17945 - ADCL_RETUNE_C13_0 */ + { 17946, 0x0000 }, /* R17946 - ADCL_RETUNE_C14_1 */ + { 17947, 0x0000 }, /* R17947 - ADCL_RETUNE_C14_0 */ + { 17948, 0x0000 }, /* R17948 - ADCL_RETUNE_C15_1 */ + { 17949, 0x0000 }, /* R17949 - ADCL_RETUNE_C15_0 */ + { 17950, 0x0000 }, /* R17950 - ADCL_RETUNE_C16_1 */ + { 17951, 0x0000 }, /* R17951 - ADCL_RETUNE_C16_0 */ + { 17952, 0x0000 }, /* R17952 - ADCL_RETUNE_C17_1 */ + { 17953, 0x0000 }, /* R17953 - ADCL_RETUNE_C17_0 */ + { 17954, 0x0000 }, /* R17954 - ADCL_RETUNE_C18_1 */ + { 17955, 0x0000 }, /* R17955 - ADCL_RETUNE_C18_0 */ + { 17956, 0x0000 }, /* R17956 - ADCL_RETUNE_C19_1 */ + { 17957, 0x0000 }, /* R17957 - ADCL_RETUNE_C19_0 */ + { 17958, 0x0000 }, /* R17958 - ADCL_RETUNE_C20_1 */ + { 17959, 0x0000 }, /* R17959 - ADCL_RETUNE_C20_0 */ + { 17960, 0x0000 }, /* R17960 - ADCL_RETUNE_C21_1 */ + { 17961, 0x0000 }, /* R17961 - ADCL_RETUNE_C21_0 */ + { 17962, 0x0000 }, /* R17962 - ADCL_RETUNE_C22_1 */ + { 17963, 0x0000 }, /* R17963 - ADCL_RETUNE_C22_0 */ + { 17964, 0x0000 }, /* R17964 - ADCL_RETUNE_C23_1 */ + { 17965, 0x0000 }, /* R17965 - ADCL_RETUNE_C23_0 */ + { 17966, 0x0000 }, /* R17966 - ADCL_RETUNE_C24_1 */ + { 17967, 0x0000 }, /* R17967 - ADCL_RETUNE_C24_0 */ + { 17968, 0x0000 }, /* R17968 - ADCL_RETUNE_C25_1 */ + { 17969, 0x0000 }, /* R17969 - ADCL_RETUNE_C25_0 */ + { 17970, 0x0000 }, /* R17970 - ADCL_RETUNE_C26_1 */ + { 17971, 0x0000 }, /* R17971 - ADCL_RETUNE_C26_0 */ + { 17972, 0x0000 }, /* R17972 - ADCL_RETUNE_C27_1 */ + { 17973, 0x0000 }, /* R17973 - ADCL_RETUNE_C27_0 */ + { 17974, 0x0000 }, /* R17974 - ADCL_RETUNE_C28_1 */ + { 17975, 0x0000 }, /* R17975 - ADCL_RETUNE_C28_0 */ + { 17976, 0x0000 }, /* R17976 - ADCL_RETUNE_C29_1 */ + { 17977, 0x0000 }, /* R17977 - ADCL_RETUNE_C29_0 */ + { 17978, 0x0000 }, /* R17978 - ADCL_RETUNE_C30_1 */ + { 17979, 0x0000 }, /* R17979 - ADCL_RETUNE_C30_0 */ + { 17980, 0x0000 }, /* R17980 - ADCL_RETUNE_C31_1 */ + { 17981, 0x0000 }, /* R17981 - ADCL_RETUNE_C31_0 */ + { 17982, 0x0000 }, /* R17982 - ADCL_RETUNE_C32_1 */ + { 17983, 0x0000 }, /* R17983 - ADCL_RETUNE_C32_0 */ + + { 18432, 0x0020 }, /* R18432 - RETUNEADC_PG2_1 */ + { 18433, 0x0000 }, /* R18433 - RETUNEADC_PG2_0 */ + { 18434, 0x0040 }, /* R18434 - RETUNEADC_PG_1 */ + { 18435, 0x0000 }, /* R18435 - RETUNEADC_PG_0 */ + + { 18944, 0x007F }, /* R18944 - ADCR_RETUNE_C1_1 */ + { 18945, 0xFFFF }, /* R18945 - ADCR_RETUNE_C1_0 */ + { 18946, 0x0000 }, /* R18946 - ADCR_RETUNE_C2_1 */ + { 18947, 0x0000 }, /* R18947 - ADCR_RETUNE_C2_0 */ + { 18948, 0x0000 }, /* R18948 - ADCR_RETUNE_C3_1 */ + { 18949, 0x0000 }, /* R18949 - ADCR_RETUNE_C3_0 */ + { 18950, 0x0000 }, /* R18950 - ADCR_RETUNE_C4_1 */ + { 18951, 0x0000 }, /* R18951 - ADCR_RETUNE_C4_0 */ + { 18952, 0x0000 }, /* R18952 - ADCR_RETUNE_C5_1 */ + { 18953, 0x0000 }, /* R18953 - ADCR_RETUNE_C5_0 */ + { 18954, 0x0000 }, /* R18954 - ADCR_RETUNE_C6_1 */ + { 18955, 0x0000 }, /* R18955 - ADCR_RETUNE_C6_0 */ + { 18956, 0x0000 }, /* R18956 - ADCR_RETUNE_C7_1 */ + { 18957, 0x0000 }, /* R18957 - ADCR_RETUNE_C7_0 */ + { 18958, 0x0000 }, /* R18958 - ADCR_RETUNE_C8_1 */ + { 18959, 0x0000 }, /* R18959 - ADCR_RETUNE_C8_0 */ + { 18960, 0x0000 }, /* R18960 - ADCR_RETUNE_C9_1 */ + { 18961, 0x0000 }, /* R18961 - ADCR_RETUNE_C9_0 */ + { 18962, 0x0000 }, /* R18962 - ADCR_RETUNE_C10_1 */ + { 18963, 0x0000 }, /* R18963 - ADCR_RETUNE_C10_0 */ + { 18964, 0x0000 }, /* R18964 - ADCR_RETUNE_C11_1 */ + { 18965, 0x0000 }, /* R18965 - ADCR_RETUNE_C11_0 */ + { 18966, 0x0000 }, /* R18966 - ADCR_RETUNE_C12_1 */ + { 18967, 0x0000 }, /* R18967 - ADCR_RETUNE_C12_0 */ + { 18968, 0x0000 }, /* R18968 - ADCR_RETUNE_C13_1 */ + { 18969, 0x0000 }, /* R18969 - ADCR_RETUNE_C13_0 */ + { 18970, 0x0000 }, /* R18970 - ADCR_RETUNE_C14_1 */ + { 18971, 0x0000 }, /* R18971 - ADCR_RETUNE_C14_0 */ + { 18972, 0x0000 }, /* R18972 - ADCR_RETUNE_C15_1 */ + { 18973, 0x0000 }, /* R18973 - ADCR_RETUNE_C15_0 */ + { 18974, 0x0000 }, /* R18974 - ADCR_RETUNE_C16_1 */ + { 18975, 0x0000 }, /* R18975 - ADCR_RETUNE_C16_0 */ + { 18976, 0x0000 }, /* R18976 - ADCR_RETUNE_C17_1 */ + { 18977, 0x0000 }, /* R18977 - ADCR_RETUNE_C17_0 */ + { 18978, 0x0000 }, /* R18978 - ADCR_RETUNE_C18_1 */ + { 18979, 0x0000 }, /* R18979 - ADCR_RETUNE_C18_0 */ + { 18980, 0x0000 }, /* R18980 - ADCR_RETUNE_C19_1 */ + { 18981, 0x0000 }, /* R18981 - ADCR_RETUNE_C19_0 */ + { 18982, 0x0000 }, /* R18982 - ADCR_RETUNE_C20_1 */ + { 18983, 0x0000 }, /* R18983 - ADCR_RETUNE_C20_0 */ + { 18984, 0x0000 }, /* R18984 - ADCR_RETUNE_C21_1 */ + { 18985, 0x0000 }, /* R18985 - ADCR_RETUNE_C21_0 */ + { 18986, 0x0000 }, /* R18986 - ADCR_RETUNE_C22_1 */ + { 18987, 0x0000 }, /* R18987 - ADCR_RETUNE_C22_0 */ + { 18988, 0x0000 }, /* R18988 - ADCR_RETUNE_C23_1 */ + { 18989, 0x0000 }, /* R18989 - ADCR_RETUNE_C23_0 */ + { 18990, 0x0000 }, /* R18990 - ADCR_RETUNE_C24_1 */ + { 18991, 0x0000 }, /* R18991 - ADCR_RETUNE_C24_0 */ + { 18992, 0x0000 }, /* R18992 - ADCR_RETUNE_C25_1 */ + { 18993, 0x0000 }, /* R18993 - ADCR_RETUNE_C25_0 */ + { 18994, 0x0000 }, /* R18994 - ADCR_RETUNE_C26_1 */ + { 18995, 0x0000 }, /* R18995 - ADCR_RETUNE_C26_0 */ + { 18996, 0x0000 }, /* R18996 - ADCR_RETUNE_C27_1 */ + { 18997, 0x0000 }, /* R18997 - ADCR_RETUNE_C27_0 */ + { 18998, 0x0000 }, /* R18998 - ADCR_RETUNE_C28_1 */ + { 18999, 0x0000 }, /* R18999 - ADCR_RETUNE_C28_0 */ + { 19000, 0x0000 }, /* R19000 - ADCR_RETUNE_C29_1 */ + { 19001, 0x0000 }, /* R19001 - ADCR_RETUNE_C29_0 */ + { 19002, 0x0000 }, /* R19002 - ADCR_RETUNE_C30_1 */ + { 19003, 0x0000 }, /* R19003 - ADCR_RETUNE_C30_0 */ + { 19004, 0x0000 }, /* R19004 - ADCR_RETUNE_C31_1 */ + { 19005, 0x0000 }, /* R19005 - ADCR_RETUNE_C31_0 */ + { 19006, 0x0000 }, /* R19006 - ADCR_RETUNE_C32_1 */ + { 19007, 0x0000 }, /* R19007 - ADCR_RETUNE_C32_0 */ + + { 19456, 0x007F }, /* R19456 - DACL_RETUNE_C1_1 */ + { 19457, 0xFFFF }, /* R19457 - DACL_RETUNE_C1_0 */ + { 19458, 0x0000 }, /* R19458 - DACL_RETUNE_C2_1 */ + { 19459, 0x0000 }, /* R19459 - DACL_RETUNE_C2_0 */ + { 19460, 0x0000 }, /* R19460 - DACL_RETUNE_C3_1 */ + { 19461, 0x0000 }, /* R19461 - DACL_RETUNE_C3_0 */ + { 19462, 0x0000 }, /* R19462 - DACL_RETUNE_C4_1 */ + { 19463, 0x0000 }, /* R19463 - DACL_RETUNE_C4_0 */ + { 19464, 0x0000 }, /* R19464 - DACL_RETUNE_C5_1 */ + { 19465, 0x0000 }, /* R19465 - DACL_RETUNE_C5_0 */ + { 19466, 0x0000 }, /* R19466 - DACL_RETUNE_C6_1 */ + { 19467, 0x0000 }, /* R19467 - DACL_RETUNE_C6_0 */ + { 19468, 0x0000 }, /* R19468 - DACL_RETUNE_C7_1 */ + { 19469, 0x0000 }, /* R19469 - DACL_RETUNE_C7_0 */ + { 19470, 0x0000 }, /* R19470 - DACL_RETUNE_C8_1 */ + { 19471, 0x0000 }, /* R19471 - DACL_RETUNE_C8_0 */ + { 19472, 0x0000 }, /* R19472 - DACL_RETUNE_C9_1 */ + { 19473, 0x0000 }, /* R19473 - DACL_RETUNE_C9_0 */ + { 19474, 0x0000 }, /* R19474 - DACL_RETUNE_C10_1 */ + { 19475, 0x0000 }, /* R19475 - DACL_RETUNE_C10_0 */ + { 19476, 0x0000 }, /* R19476 - DACL_RETUNE_C11_1 */ + { 19477, 0x0000 }, /* R19477 - DACL_RETUNE_C11_0 */ + { 19478, 0x0000 }, /* R19478 - DACL_RETUNE_C12_1 */ + { 19479, 0x0000 }, /* R19479 - DACL_RETUNE_C12_0 */ + { 19480, 0x0000 }, /* R19480 - DACL_RETUNE_C13_1 */ + { 19481, 0x0000 }, /* R19481 - DACL_RETUNE_C13_0 */ + { 19482, 0x0000 }, /* R19482 - DACL_RETUNE_C14_1 */ + { 19483, 0x0000 }, /* R19483 - DACL_RETUNE_C14_0 */ + { 19484, 0x0000 }, /* R19484 - DACL_RETUNE_C15_1 */ + { 19485, 0x0000 }, /* R19485 - DACL_RETUNE_C15_0 */ + { 19486, 0x0000 }, /* R19486 - DACL_RETUNE_C16_1 */ + { 19487, 0x0000 }, /* R19487 - DACL_RETUNE_C16_0 */ + { 19488, 0x0000 }, /* R19488 - DACL_RETUNE_C17_1 */ + { 19489, 0x0000 }, /* R19489 - DACL_RETUNE_C17_0 */ + { 19490, 0x0000 }, /* R19490 - DACL_RETUNE_C18_1 */ + { 19491, 0x0000 }, /* R19491 - DACL_RETUNE_C18_0 */ + { 19492, 0x0000 }, /* R19492 - DACL_RETUNE_C19_1 */ + { 19493, 0x0000 }, /* R19493 - DACL_RETUNE_C19_0 */ + { 19494, 0x0000 }, /* R19494 - DACL_RETUNE_C20_1 */ + { 19495, 0x0000 }, /* R19495 - DACL_RETUNE_C20_0 */ + { 19496, 0x0000 }, /* R19496 - DACL_RETUNE_C21_1 */ + { 19497, 0x0000 }, /* R19497 - DACL_RETUNE_C21_0 */ + { 19498, 0x0000 }, /* R19498 - DACL_RETUNE_C22_1 */ + { 19499, 0x0000 }, /* R19499 - DACL_RETUNE_C22_0 */ + { 19500, 0x0000 }, /* R19500 - DACL_RETUNE_C23_1 */ + { 19501, 0x0000 }, /* R19501 - DACL_RETUNE_C23_0 */ + { 19502, 0x0000 }, /* R19502 - DACL_RETUNE_C24_1 */ + { 19503, 0x0000 }, /* R19503 - DACL_RETUNE_C24_0 */ + { 19504, 0x0000 }, /* R19504 - DACL_RETUNE_C25_1 */ + { 19505, 0x0000 }, /* R19505 - DACL_RETUNE_C25_0 */ + { 19506, 0x0000 }, /* R19506 - DACL_RETUNE_C26_1 */ + { 19507, 0x0000 }, /* R19507 - DACL_RETUNE_C26_0 */ + { 19508, 0x0000 }, /* R19508 - DACL_RETUNE_C27_1 */ + { 19509, 0x0000 }, /* R19509 - DACL_RETUNE_C27_0 */ + { 19510, 0x0000 }, /* R19510 - DACL_RETUNE_C28_1 */ + { 19511, 0x0000 }, /* R19511 - DACL_RETUNE_C28_0 */ + { 19512, 0x0000 }, /* R19512 - DACL_RETUNE_C29_1 */ + { 19513, 0x0000 }, /* R19513 - DACL_RETUNE_C29_0 */ + { 19514, 0x0000 }, /* R19514 - DACL_RETUNE_C30_1 */ + { 19515, 0x0000 }, /* R19515 - DACL_RETUNE_C30_0 */ + { 19516, 0x0000 }, /* R19516 - DACL_RETUNE_C31_1 */ + { 19517, 0x0000 }, /* R19517 - DACL_RETUNE_C31_0 */ + { 19518, 0x0000 }, /* R19518 - DACL_RETUNE_C32_1 */ + { 19519, 0x0000 }, /* R19519 - DACL_RETUNE_C32_0 */ + + { 19968, 0x0020 }, /* R19968 - RETUNEDAC_PG2_1 */ + { 19969, 0x0000 }, /* R19969 - RETUNEDAC_PG2_0 */ + { 19970, 0x0040 }, /* R19970 - RETUNEDAC_PG_1 */ + { 19971, 0x0000 }, /* R19971 - RETUNEDAC_PG_0 */ + + { 20480, 0x007F }, /* R20480 - DACR_RETUNE_C1_1 */ + { 20481, 0xFFFF }, /* R20481 - DACR_RETUNE_C1_0 */ + { 20482, 0x0000 }, /* R20482 - DACR_RETUNE_C2_1 */ + { 20483, 0x0000 }, /* R20483 - DACR_RETUNE_C2_0 */ + { 20484, 0x0000 }, /* R20484 - DACR_RETUNE_C3_1 */ + { 20485, 0x0000 }, /* R20485 - DACR_RETUNE_C3_0 */ + { 20486, 0x0000 }, /* R20486 - DACR_RETUNE_C4_1 */ + { 20487, 0x0000 }, /* R20487 - DACR_RETUNE_C4_0 */ + { 20488, 0x0000 }, /* R20488 - DACR_RETUNE_C5_1 */ + { 20489, 0x0000 }, /* R20489 - DACR_RETUNE_C5_0 */ + { 20490, 0x0000 }, /* R20490 - DACR_RETUNE_C6_1 */ + { 20491, 0x0000 }, /* R20491 - DACR_RETUNE_C6_0 */ + { 20492, 0x0000 }, /* R20492 - DACR_RETUNE_C7_1 */ + { 20493, 0x0000 }, /* R20493 - DACR_RETUNE_C7_0 */ + { 20494, 0x0000 }, /* R20494 - DACR_RETUNE_C8_1 */ + { 20495, 0x0000 }, /* R20495 - DACR_RETUNE_C8_0 */ + { 20496, 0x0000 }, /* R20496 - DACR_RETUNE_C9_1 */ + { 20497, 0x0000 }, /* R20497 - DACR_RETUNE_C9_0 */ + { 20498, 0x0000 }, /* R20498 - DACR_RETUNE_C10_1 */ + { 20499, 0x0000 }, /* R20499 - DACR_RETUNE_C10_0 */ + { 20500, 0x0000 }, /* R20500 - DACR_RETUNE_C11_1 */ + { 20501, 0x0000 }, /* R20501 - DACR_RETUNE_C11_0 */ + { 20502, 0x0000 }, /* R20502 - DACR_RETUNE_C12_1 */ + { 20503, 0x0000 }, /* R20503 - DACR_RETUNE_C12_0 */ + { 20504, 0x0000 }, /* R20504 - DACR_RETUNE_C13_1 */ + { 20505, 0x0000 }, /* R20505 - DACR_RETUNE_C13_0 */ + { 20506, 0x0000 }, /* R20506 - DACR_RETUNE_C14_1 */ + { 20507, 0x0000 }, /* R20507 - DACR_RETUNE_C14_0 */ + { 20508, 0x0000 }, /* R20508 - DACR_RETUNE_C15_1 */ + { 20509, 0x0000 }, /* R20509 - DACR_RETUNE_C15_0 */ + { 20510, 0x0000 }, /* R20510 - DACR_RETUNE_C16_1 */ + { 20511, 0x0000 }, /* R20511 - DACR_RETUNE_C16_0 */ + { 20512, 0x0000 }, /* R20512 - DACR_RETUNE_C17_1 */ + { 20513, 0x0000 }, /* R20513 - DACR_RETUNE_C17_0 */ + { 20514, 0x0000 }, /* R20514 - DACR_RETUNE_C18_1 */ + { 20515, 0x0000 }, /* R20515 - DACR_RETUNE_C18_0 */ + { 20516, 0x0000 }, /* R20516 - DACR_RETUNE_C19_1 */ + { 20517, 0x0000 }, /* R20517 - DACR_RETUNE_C19_0 */ + { 20518, 0x0000 }, /* R20518 - DACR_RETUNE_C20_1 */ + { 20519, 0x0000 }, /* R20519 - DACR_RETUNE_C20_0 */ + { 20520, 0x0000 }, /* R20520 - DACR_RETUNE_C21_1 */ + { 20521, 0x0000 }, /* R20521 - DACR_RETUNE_C21_0 */ + { 20522, 0x0000 }, /* R20522 - DACR_RETUNE_C22_1 */ + { 20523, 0x0000 }, /* R20523 - DACR_RETUNE_C22_0 */ + { 20524, 0x0000 }, /* R20524 - DACR_RETUNE_C23_1 */ + { 20525, 0x0000 }, /* R20525 - DACR_RETUNE_C23_0 */ + { 20526, 0x0000 }, /* R20526 - DACR_RETUNE_C24_1 */ + { 20527, 0x0000 }, /* R20527 - DACR_RETUNE_C24_0 */ + { 20528, 0x0000 }, /* R20528 - DACR_RETUNE_C25_1 */ + { 20529, 0x0000 }, /* R20529 - DACR_RETUNE_C25_0 */ + { 20530, 0x0000 }, /* R20530 - DACR_RETUNE_C26_1 */ + { 20531, 0x0000 }, /* R20531 - DACR_RETUNE_C26_0 */ + { 20532, 0x0000 }, /* R20532 - DACR_RETUNE_C27_1 */ + { 20533, 0x0000 }, /* R20533 - DACR_RETUNE_C27_0 */ + { 20534, 0x0000 }, /* R20534 - DACR_RETUNE_C28_1 */ + { 20535, 0x0000 }, /* R20535 - DACR_RETUNE_C28_0 */ + { 20536, 0x0000 }, /* R20536 - DACR_RETUNE_C29_1 */ + { 20537, 0x0000 }, /* R20537 - DACR_RETUNE_C29_0 */ + { 20538, 0x0000 }, /* R20538 - DACR_RETUNE_C30_1 */ + { 20539, 0x0000 }, /* R20539 - DACR_RETUNE_C30_0 */ + { 20540, 0x0000 }, /* R20540 - DACR_RETUNE_C31_1 */ + { 20541, 0x0000 }, /* R20541 - DACR_RETUNE_C31_0 */ + { 20542, 0x0000 }, /* R20542 - DACR_RETUNE_C32_1 */ + { 20543, 0x0000 }, /* R20543 - DACR_RETUNE_C32_0 */ + + { 20992, 0x008C }, /* R20992 - VSS_XHD2_1 */ + { 20993, 0x0200 }, /* R20993 - VSS_XHD2_0 */ + { 20994, 0x0035 }, /* R20994 - VSS_XHD3_1 */ + { 20995, 0x0700 }, /* R20995 - VSS_XHD3_0 */ + { 20996, 0x003A }, /* R20996 - VSS_XHN1_1 */ + { 20997, 0x4100 }, /* R20997 - VSS_XHN1_0 */ + { 20998, 0x008B }, /* R20998 - VSS_XHN2_1 */ + { 20999, 0x7D00 }, /* R20999 - VSS_XHN2_0 */ + { 21000, 0x003A }, /* R21000 - VSS_XHN3_1 */ + { 21001, 0x4100 }, /* R21001 - VSS_XHN3_0 */ + { 21002, 0x008C }, /* R21002 - VSS_XLA_1 */ + { 21003, 0xFEE8 }, /* R21003 - VSS_XLA_0 */ + { 21004, 0x0078 }, /* R21004 - VSS_XLB_1 */ + { 21005, 0x0000 }, /* R21005 - VSS_XLB_0 */ + { 21006, 0x003F }, /* R21006 - VSS_XLG_1 */ + { 21007, 0xB260 }, /* R21007 - VSS_XLG_0 */ + { 21008, 0x002D }, /* R21008 - VSS_PG2_1 */ + { 21009, 0x1818 }, /* R21009 - VSS_PG2_0 */ + { 21010, 0x0020 }, /* R21010 - VSS_PG_1 */ + { 21011, 0x0000 }, /* R21011 - VSS_PG_0 */ + { 21012, 0x00F1 }, /* R21012 - VSS_XTD1_1 */ + { 21013, 0x8340 }, /* R21013 - VSS_XTD1_0 */ + { 21014, 0x00FB }, /* R21014 - VSS_XTD2_1 */ + { 21015, 0x8300 }, /* R21015 - VSS_XTD2_0 */ + { 21016, 0x00EE }, /* R21016 - VSS_XTD3_1 */ + { 21017, 0xAEC0 }, /* R21017 - VSS_XTD3_0 */ + { 21018, 0x00FB }, /* R21018 - VSS_XTD4_1 */ + { 21019, 0xAC40 }, /* R21019 - VSS_XTD4_0 */ + { 21020, 0x00F1 }, /* R21020 - VSS_XTD5_1 */ + { 21021, 0x7F80 }, /* R21021 - VSS_XTD5_0 */ + { 21022, 0x00F4 }, /* R21022 - VSS_XTD6_1 */ + { 21023, 0x3B40 }, /* R21023 - VSS_XTD6_0 */ + { 21024, 0x00F5 }, /* R21024 - VSS_XTD7_1 */ + { 21025, 0xFB00 }, /* R21025 - VSS_XTD7_0 */ + { 21026, 0x00EA }, /* R21026 - VSS_XTD8_1 */ + { 21027, 0x10C0 }, /* R21027 - VSS_XTD8_0 */ + { 21028, 0x00FC }, /* R21028 - VSS_XTD9_1 */ + { 21029, 0xC580 }, /* R21029 - VSS_XTD9_0 */ + { 21030, 0x00E2 }, /* R21030 - VSS_XTD10_1 */ + { 21031, 0x75C0 }, /* R21031 - VSS_XTD10_0 */ + { 21032, 0x0004 }, /* R21032 - VSS_XTD11_1 */ + { 21033, 0xB480 }, /* R21033 - VSS_XTD11_0 */ + { 21034, 0x00D4 }, /* R21034 - VSS_XTD12_1 */ + { 21035, 0xF980 }, /* R21035 - VSS_XTD12_0 */ + { 21036, 0x0004 }, /* R21036 - VSS_XTD13_1 */ + { 21037, 0x9140 }, /* R21037 - VSS_XTD13_0 */ + { 21038, 0x00D8 }, /* R21038 - VSS_XTD14_1 */ + { 21039, 0xA480 }, /* R21039 - VSS_XTD14_0 */ + { 21040, 0x0002 }, /* R21040 - VSS_XTD15_1 */ + { 21041, 0x3DC0 }, /* R21041 - VSS_XTD15_0 */ + { 21042, 0x00CF }, /* R21042 - VSS_XTD16_1 */ + { 21043, 0x7A80 }, /* R21043 - VSS_XTD16_0 */ + { 21044, 0x00DC }, /* R21044 - VSS_XTD17_1 */ + { 21045, 0x0600 }, /* R21045 - VSS_XTD17_0 */ + { 21046, 0x00F2 }, /* R21046 - VSS_XTD18_1 */ + { 21047, 0xDAC0 }, /* R21047 - VSS_XTD18_0 */ + { 21048, 0x00BA }, /* R21048 - VSS_XTD19_1 */ + { 21049, 0xF340 }, /* R21049 - VSS_XTD19_0 */ + { 21050, 0x000A }, /* R21050 - VSS_XTD20_1 */ + { 21051, 0x7940 }, /* R21051 - VSS_XTD20_0 */ + { 21052, 0x001C }, /* R21052 - VSS_XTD21_1 */ + { 21053, 0x0680 }, /* R21053 - VSS_XTD21_0 */ + { 21054, 0x00FD }, /* R21054 - VSS_XTD22_1 */ + { 21055, 0x2D00 }, /* R21055 - VSS_XTD22_0 */ + { 21056, 0x001C }, /* R21056 - VSS_XTD23_1 */ + { 21057, 0xE840 }, /* R21057 - VSS_XTD23_0 */ + { 21058, 0x000D }, /* R21058 - VSS_XTD24_1 */ + { 21059, 0xDC40 }, /* R21059 - VSS_XTD24_0 */ + { 21060, 0x00FC }, /* R21060 - VSS_XTD25_1 */ + { 21061, 0x9D00 }, /* R21061 - VSS_XTD25_0 */ + { 21062, 0x0009 }, /* R21062 - VSS_XTD26_1 */ + { 21063, 0x5580 }, /* R21063 - VSS_XTD26_0 */ + { 21064, 0x00FE }, /* R21064 - VSS_XTD27_1 */ + { 21065, 0x7E80 }, /* R21065 - VSS_XTD27_0 */ + { 21066, 0x000E }, /* R21066 - VSS_XTD28_1 */ + { 21067, 0xAB40 }, /* R21067 - VSS_XTD28_0 */ + { 21068, 0x00F9 }, /* R21068 - VSS_XTD29_1 */ + { 21069, 0x9880 }, /* R21069 - VSS_XTD29_0 */ + { 21070, 0x0009 }, /* R21070 - VSS_XTD30_1 */ + { 21071, 0x87C0 }, /* R21071 - VSS_XTD30_0 */ + { 21072, 0x00FD }, /* R21072 - VSS_XTD31_1 */ + { 21073, 0x2C40 }, /* R21073 - VSS_XTD31_0 */ + { 21074, 0x0009 }, /* R21074 - VSS_XTD32_1 */ + { 21075, 0x4800 }, /* R21075 - VSS_XTD32_0 */ + { 21076, 0x0003 }, /* R21076 - VSS_XTS1_1 */ + { 21077, 0x5F40 }, /* R21077 - VSS_XTS1_0 */ + { 21078, 0x0000 }, /* R21078 - VSS_XTS2_1 */ + { 21079, 0x8700 }, /* R21079 - VSS_XTS2_0 */ + { 21080, 0x00FA }, /* R21080 - VSS_XTS3_1 */ + { 21081, 0xE4C0 }, /* R21081 - VSS_XTS3_0 */ + { 21082, 0x0000 }, /* R21082 - VSS_XTS4_1 */ + { 21083, 0x0B40 }, /* R21083 - VSS_XTS4_0 */ + { 21084, 0x0004 }, /* R21084 - VSS_XTS5_1 */ + { 21085, 0xE180 }, /* R21085 - VSS_XTS5_0 */ + { 21086, 0x0001 }, /* R21086 - VSS_XTS6_1 */ + { 21087, 0x1F40 }, /* R21087 - VSS_XTS6_0 */ + { 21088, 0x00F8 }, /* R21088 - VSS_XTS7_1 */ + { 21089, 0xB000 }, /* R21089 - VSS_XTS7_0 */ + { 21090, 0x00FB }, /* R21090 - VSS_XTS8_1 */ + { 21091, 0xCBC0 }, /* R21091 - VSS_XTS8_0 */ + { 21092, 0x0004 }, /* R21092 - VSS_XTS9_1 */ + { 21093, 0xF380 }, /* R21093 - VSS_XTS9_0 */ + { 21094, 0x0007 }, /* R21094 - VSS_XTS10_1 */ + { 21095, 0xDF40 }, /* R21095 - VSS_XTS10_0 */ + { 21096, 0x00FF }, /* R21096 - VSS_XTS11_1 */ + { 21097, 0x0700 }, /* R21097 - VSS_XTS11_0 */ + { 21098, 0x00EF }, /* R21098 - VSS_XTS12_1 */ + { 21099, 0xD700 }, /* R21099 - VSS_XTS12_0 */ + { 21100, 0x00FB }, /* R21100 - VSS_XTS13_1 */ + { 21101, 0xAF40 }, /* R21101 - VSS_XTS13_0 */ + { 21102, 0x0010 }, /* R21102 - VSS_XTS14_1 */ + { 21103, 0x8A80 }, /* R21103 - VSS_XTS14_0 */ + { 21104, 0x0011 }, /* R21104 - VSS_XTS15_1 */ + { 21105, 0x07C0 }, /* R21105 - VSS_XTS15_0 */ + { 21106, 0x00E0 }, /* R21106 - VSS_XTS16_1 */ + { 21107, 0x0800 }, /* R21107 - VSS_XTS16_0 */ + { 21108, 0x00D2 }, /* R21108 - VSS_XTS17_1 */ + { 21109, 0x7600 }, /* R21109 - VSS_XTS17_0 */ + { 21110, 0x0020 }, /* R21110 - VSS_XTS18_1 */ + { 21111, 0xCF40 }, /* R21111 - VSS_XTS18_0 */ + { 21112, 0x0030 }, /* R21112 - VSS_XTS19_1 */ + { 21113, 0x2340 }, /* R21113 - VSS_XTS19_0 */ + { 21114, 0x00FD }, /* R21114 - VSS_XTS20_1 */ + { 21115, 0x69C0 }, /* R21115 - VSS_XTS20_0 */ + { 21116, 0x0028 }, /* R21116 - VSS_XTS21_1 */ + { 21117, 0x3500 }, /* R21117 - VSS_XTS21_0 */ + { 21118, 0x0006 }, /* R21118 - VSS_XTS22_1 */ + { 21119, 0x3300 }, /* R21119 - VSS_XTS22_0 */ + { 21120, 0x00D9 }, /* R21120 - VSS_XTS23_1 */ + { 21121, 0xF6C0 }, /* R21121 - VSS_XTS23_0 */ + { 21122, 0x00F3 }, /* R21122 - VSS_XTS24_1 */ + { 21123, 0x3340 }, /* R21123 - VSS_XTS24_0 */ + { 21124, 0x000F }, /* R21124 - VSS_XTS25_1 */ + { 21125, 0x4200 }, /* R21125 - VSS_XTS25_0 */ + { 21126, 0x0004 }, /* R21126 - VSS_XTS26_1 */ + { 21127, 0x0C80 }, /* R21127 - VSS_XTS26_0 */ + { 21128, 0x00FB }, /* R21128 - VSS_XTS27_1 */ + { 21129, 0x3F80 }, /* R21129 - VSS_XTS27_0 */ + { 21130, 0x00F7 }, /* R21130 - VSS_XTS28_1 */ + { 21131, 0x57C0 }, /* R21131 - VSS_XTS28_0 */ + { 21132, 0x0003 }, /* R21132 - VSS_XTS29_1 */ + { 21133, 0x5400 }, /* R21133 - VSS_XTS29_0 */ + { 21134, 0x0000 }, /* R21134 - VSS_XTS30_1 */ + { 21135, 0xC6C0 }, /* R21135 - VSS_XTS30_0 */ + { 21136, 0x0003 }, /* R21136 - VSS_XTS31_1 */ + { 21137, 0x12C0 }, /* R21137 - VSS_XTS31_0 */ + { 21138, 0x00FD }, /* R21138 - VSS_XTS32_1 */ + { 21139, 0x8580 }, /* R21139 - VSS_XTS32_0 */ }; static const struct wm8962_reg_access { @@ -802,7 +804,7 @@ static const struct wm8962_reg_access { u16 vol; } wm8962_reg_access[WM8962_MAX_REGISTER + 1] = { [0] = { 0x00FF, 0x01FF, 0x0000 }, /* R0 - Left Input volume */ - [1] = { 0xFEFF, 0x01FF, 0xFFFF }, /* R1 - Right Input volume */ + [1] = { 0xFEFF, 0x01FF, 0x0000 }, /* R1 - Right Input volume */ [2] = { 0x00FF, 0x01FF, 0x0000 }, /* R2 - HPOUTL volume */ [3] = { 0x00FF, 0x01FF, 0x0000 }, /* R3 - HPOUTR volume */ [4] = { 0x07FE, 0x07FE, 0xFFFF }, /* R4 - Clocking1 */ @@ -1943,7 +1945,7 @@ static const struct wm8962_reg_access { [21139] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21139 - VSS_XTS32_0 */ }; -static int wm8962_volatile_register(struct snd_soc_codec *codec, unsigned int reg) +static bool wm8962_volatile_register(struct device *dev, unsigned int reg) { if (wm8962_reg_access[reg].vol) return 1; @@ -1951,7 +1953,7 @@ static int wm8962_volatile_register(struct snd_soc_codec *codec, unsigned int re return 0; } -static int wm8962_readable_register(struct snd_soc_codec *codec, unsigned int reg) +static bool wm8962_readable_register(struct device *dev, unsigned int reg) { if (wm8962_reg_access[reg].read) return 1; @@ -1959,15 +1961,15 @@ static int wm8962_readable_register(struct snd_soc_codec *codec, unsigned int re return 0; } -static int wm8962_reset(struct snd_soc_codec *codec) +static int wm8962_reset(struct wm8962_priv *wm8962) { int ret; - ret = snd_soc_write(codec, WM8962_SOFTWARE_RESET, 0x6243); + ret = regmap_write(wm8962->regmap, WM8962_SOFTWARE_RESET, 0x6243); if (ret != 0) return ret; - return snd_soc_write(codec, WM8962_PLL_SOFTWARE_RESET, 0); + return regmap_write(wm8962->regmap, WM8962_PLL_SOFTWARE_RESET, 0); } static const DECLARE_TLV_DB_SCALE(inpga_tlv, -2325, 75, 0); @@ -2345,6 +2347,10 @@ static int sysclk_event(struct snd_soc_dapm_widget *w, int src; int fll; + /* Ignore attempts to run the event during startup */ + if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) + return 0; + src = snd_soc_read(codec, WM8962_CLOCKING2) & WM8962_SYSCLK_SRC_MASK; switch (src) { @@ -2684,6 +2690,8 @@ SND_SOC_DAPM_SUPPLY("TOCLK", WM8962_ADDITIONAL_CONTROL_1, 0, 0, NULL, 0), SND_SOC_DAPM_SUPPLY_S("DSP2", 1, WM8962_DSP2_POWER_MANAGEMENT, WM8962_DSP2_ENA_SHIFT, 0, dsp2_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), +SND_SOC_DAPM_SUPPLY("TEMP_HP", WM8962_ADDITIONAL_CONTROL_4, 2, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("TEMP_SPK", WM8962_ADDITIONAL_CONTROL_4, 1, 0, NULL, 0), SND_SOC_DAPM_MIXER("INPGAL", WM8962_LEFT_INPUT_PGA_CONTROL, 4, 0, inpgal, ARRAY_SIZE(inpgal)), @@ -2839,6 +2847,9 @@ static const struct snd_soc_dapm_route wm8962_intercon[] = { { "HPOUTL", NULL, "HPOUT" }, { "HPOUTR", NULL, "HPOUT" }, + + { "HPOUTL", NULL, "TEMP_HP" }, + { "HPOUTR", NULL, "TEMP_HP" }, }; static const struct snd_soc_dapm_route wm8962_spk_mono_intercon[] = { @@ -2855,6 +2866,7 @@ static const struct snd_soc_dapm_route wm8962_spk_mono_intercon[] = { { "Speaker Output", NULL, "Speaker PGA" }, { "Speaker Output", NULL, "SYSCLK" }, { "Speaker Output", NULL, "TOCLK" }, + { "Speaker Output", NULL, "TEMP_SPK" }, { "SPKOUT", NULL, "Speaker Output" }, }; @@ -2883,10 +2895,12 @@ static const struct snd_soc_dapm_route wm8962_spk_stereo_intercon[] = { { "SPKOUTL Output", NULL, "SPKOUTL PGA" }, { "SPKOUTL Output", NULL, "SYSCLK" }, { "SPKOUTL Output", NULL, "TOCLK" }, + { "SPKOUTL Output", NULL, "TEMP_SPK" }, { "SPKOUTR Output", NULL, "SPKOUTR PGA" }, { "SPKOUTR Output", NULL, "SYSCLK" }, { "SPKOUTR Output", NULL, "TOCLK" }, + { "SPKOUTR Output", NULL, "TEMP_SPK" }, { "SPKOUTL", NULL, "SPKOUTL Output" }, { "SPKOUTR", NULL, "SPKOUTR Output" }, @@ -2931,33 +2945,6 @@ static int wm8962_add_widgets(struct snd_soc_codec *codec) return 0; } -static void wm8962_sync_cache(struct snd_soc_codec *codec) -{ - u16 *reg_cache = codec->reg_cache; - int i; - - if (!codec->cache_sync) - return; - - dev_dbg(codec->dev, "Syncing cache\n"); - - codec->cache_only = 0; - - /* Sync back cached values if they're different from the - * hardware default. - */ - for (i = 1; i < codec->driver->reg_cache_size; i++) { - if (i == WM8962_SOFTWARE_RESET) - continue; - if (reg_cache[i] == wm8962_reg[i]) - continue; - - snd_soc_write(codec, i, reg_cache[i]); - } - - codec->cache_sync = 0; -} - /* -1 for reserved values */ static const int bclk_divs[] = { 1, -1, 2, 3, 4, -1, 6, 8, -1, 12, 16, 24, -1, 32, 32, 32 @@ -3085,7 +3072,8 @@ static int wm8962_set_bias_level(struct snd_soc_codec *codec, return ret; } - wm8962_sync_cache(codec); + regcache_cache_only(wm8962->regmap, false); + regcache_sync(wm8962->regmap); snd_soc_update_bits(codec, WM8962_ANTI_POP, WM8962_STARTUP_BIAS_ENA | @@ -3399,6 +3387,7 @@ static int wm8962_set_fll(struct snd_soc_codec *codec, int fll_id, int source, unsigned long timeout; int ret; int fll1 = snd_soc_read(codec, WM8962_FLL_CONTROL_1) & WM8962_FLL_ENA; + int sysclk = snd_soc_read(codec, WM8962_CLOCKING2) & WM8962_SYSCLK_ENA; /* Any change? */ if (source == wm8962->fll_src && Fref == wm8962->fll_fref && @@ -3459,6 +3448,9 @@ static int wm8962_set_fll(struct snd_soc_codec *codec, int fll_id, int source, try_wait_for_completion(&wm8962->fll_lock); + if (sysclk) + fll1 |= WM8962_FLL_ENA; + snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1, WM8962_FLL_FRAC | WM8962_FLL_REFCLK_SRC_MASK | WM8962_FLL_ENA, fll1); @@ -3662,6 +3654,14 @@ int wm8962_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack) snd_soc_jack_report(wm8962->jack, 0, SND_JACK_MICROPHONE | SND_JACK_BTN_0); + if (jack) { + snd_soc_dapm_force_enable_pin(&codec->dapm, "SYSCLK"); + snd_soc_dapm_force_enable_pin(&codec->dapm, "MICBIAS"); + } else { + snd_soc_dapm_disable_pin(&codec->dapm, "SYSCLK"); + snd_soc_dapm_disable_pin(&codec->dapm, "MICBIAS"); + } + return 0; } EXPORT_SYMBOL_GPL(wm8962_mic_detect); @@ -3946,26 +3946,12 @@ static int wm8962_probe(struct snd_soc_codec *codec) bool dmicclk, dmicdat; wm8962->codec = codec; - INIT_DELAYED_WORK(&wm8962->mic_work, wm8962_mic_work); - init_completion(&wm8962->fll_lock); - - codec->cache_sync = 1; - codec->dapm.idle_bias_off = 1; + codec->control_data = wm8962->regmap; - ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_I2C); + ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP); if (ret != 0) { dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); - goto err; - } - - for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++) - wm8962->supplies[i].supply = wm8962_supply_names[i]; - - ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8962->supplies), - wm8962->supplies); - if (ret != 0) { - dev_err(codec->dev, "Failed to request supplies: %d\n", ret); - goto err; + return ret; } wm8962->disable_nb[0].notifier_call = wm8962_regulator_event_0; @@ -3988,43 +3974,6 @@ static int wm8962_probe(struct snd_soc_codec *codec) } } - ret = regulator_bulk_enable(ARRAY_SIZE(wm8962->supplies), - wm8962->supplies); - if (ret != 0) { - dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); - goto err_get; - } - - ret = snd_soc_read(codec, WM8962_SOFTWARE_RESET); - if (ret < 0) { - dev_err(codec->dev, "Failed to read ID register\n"); - goto err_enable; - } - if (ret != wm8962_reg[WM8962_SOFTWARE_RESET]) { - dev_err(codec->dev, "Device is not a WM8962, ID %x != %x\n", - ret, wm8962_reg[WM8962_SOFTWARE_RESET]); - ret = -EINVAL; - goto err_enable; - } - - ret = snd_soc_read(codec, WM8962_RIGHT_INPUT_VOLUME); - if (ret < 0) { - dev_err(codec->dev, "Failed to read device revision: %d\n", - ret); - goto err_enable; - } - - dev_info(codec->dev, "customer id %x revision %c\n", - (ret & WM8962_CUST_ID_MASK) >> WM8962_CUST_ID_SHIFT, - ((ret & WM8962_CHIP_REV_MASK) >> WM8962_CHIP_REV_SHIFT) - + 'A'); - - ret = wm8962_reset(codec); - if (ret < 0) { - dev_err(codec->dev, "Failed to issue reset\n"); - goto err_enable; - } - /* SYSCLK defaults to on; make sure it is off so we can safely * write to registers if the device is declocked. */ @@ -4039,8 +3988,6 @@ static int wm8962_probe(struct snd_soc_codec *codec) WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA, 0); - regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); - if (pdata) { /* Apply static configuration for GPIOs */ for (i = 0; i < ARRAY_SIZE(pdata->gpio_init); i++) @@ -4091,6 +4038,12 @@ static int wm8962_probe(struct snd_soc_codec *codec) /* Stereo control for EQ */ snd_soc_update_bits(codec, WM8962_EQ1, WM8962_EQ_SHARED_COEFF, 0); + /* Don't debouce interrupts so we don't need SYSCLK */ + snd_soc_update_bits(codec, WM8962_IRQ_DEBOUNCE, + WM8962_FLL_LOCK_DB | WM8962_PLL3_LOCK_DB | + WM8962_PLL2_LOCK_DB | WM8962_TEMP_SHUT_DB, + 0); + wm8962_add_widgets(codec); /* Save boards having to disable DMIC when not in use */ @@ -4150,13 +4103,6 @@ static int wm8962_probe(struct snd_soc_codec *codec) } return 0; - -err_enable: - regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); -err_get: - regulator_bulk_free(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); -err: - return ret; } static int wm8962_remove(struct snd_soc_codec *codec) @@ -4174,7 +4120,6 @@ static int wm8962_remove(struct snd_soc_codec *codec) for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++) regulator_unregister_notifier(wm8962->supplies[i].consumer, &wm8962->disable_nb[i]); - regulator_bulk_free(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); return 0; } @@ -4183,20 +4128,28 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8962 = { .probe = wm8962_probe, .remove = wm8962_remove, .set_bias_level = wm8962_set_bias_level, - .reg_cache_size = WM8962_MAX_REGISTER + 1, - .reg_word_size = sizeof(u16), - .reg_cache_default = wm8962_reg, - .volatile_register = wm8962_volatile_register, - .readable_register = wm8962_readable_register, .set_pll = wm8962_set_fll, }; +static const struct regmap_config wm8962_regmap = { + .reg_bits = 16, + .val_bits = 16, + + .max_register = WM8962_MAX_REGISTER, + .reg_defaults = wm8962_reg, + .num_reg_defaults = ARRAY_SIZE(wm8962_reg), + .volatile_reg = wm8962_volatile_register, + .readable_reg = wm8962_readable_register, + .cache_type = REGCACHE_RBTREE, +}; + #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) static __devinit int wm8962_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { struct wm8962_priv *wm8962; - int ret; + unsigned int reg; + int ret, i; wm8962 = kzalloc(sizeof(struct wm8962_priv), GFP_KERNEL); if (wm8962 == NULL) @@ -4204,19 +4157,103 @@ static __devinit int wm8962_i2c_probe(struct i2c_client *i2c, i2c_set_clientdata(i2c, wm8962); + INIT_DELAYED_WORK(&wm8962->mic_work, wm8962_mic_work); + init_completion(&wm8962->fll_lock); wm8962->irq = i2c->irq; + for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++) + wm8962->supplies[i].supply = wm8962_supply_names[i]; + + ret = regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8962->supplies), + wm8962->supplies); + if (ret != 0) { + dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret); + goto err_alloc; + } + + ret = regulator_bulk_enable(ARRAY_SIZE(wm8962->supplies), + wm8962->supplies); + if (ret != 0) { + dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret); + goto err_get; + } + + wm8962->regmap = regmap_init_i2c(i2c, &wm8962_regmap); + if (IS_ERR(wm8962->regmap)) { + ret = PTR_ERR(wm8962->regmap); + dev_err(&i2c->dev, "Failed to allocate regmap: %d\n", ret); + goto err_enable; + } + + /* + * We haven't marked the chip revision as volatile due to + * sharing a register with the right input volume; explicitly + * bypass the cache to read it. + */ + regcache_cache_bypass(wm8962->regmap, true); + + ret = regmap_read(wm8962->regmap, WM8962_SOFTWARE_RESET, ®); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to read ID register\n"); + goto err_regmap; + } + if (reg != 0x6243) { + dev_err(&i2c->dev, + "Device is not a WM8962, ID %x != 0x6243\n", ret); + ret = -EINVAL; + goto err_regmap; + } + + ret = regmap_read(wm8962->regmap, WM8962_RIGHT_INPUT_VOLUME, ®); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to read device revision: %d\n", + ret); + goto err_regmap; + } + + dev_info(&i2c->dev, "customer id %x revision %c\n", + (reg & WM8962_CUST_ID_MASK) >> WM8962_CUST_ID_SHIFT, + ((reg & WM8962_CHIP_REV_MASK) >> WM8962_CHIP_REV_SHIFT) + + 'A'); + + regcache_cache_bypass(wm8962->regmap, false); + + ret = wm8962_reset(wm8962); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to issue reset\n"); + goto err_regmap; + } + + regcache_cache_only(wm8962->regmap, true); + ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_wm8962, &wm8962_dai, 1); if (ret < 0) - kfree(wm8962); + goto err_regmap; + + /* The drivers should power up as needed */ + regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); + return 0; + +err_regmap: + regmap_exit(wm8962->regmap); +err_enable: + regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); +err_get: + regulator_bulk_free(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); +err_alloc: + kfree(wm8962); return ret; } static __devexit int wm8962_i2c_remove(struct i2c_client *client) { + struct wm8962_priv *wm8962 = dev_get_drvdata(&client->dev); + snd_soc_unregister_codec(&client->dev); + regmap_exit(wm8962->regmap); + regulator_bulk_free(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); kfree(i2c_get_clientdata(client)); return 0; } diff --git a/sound/soc/codecs/wm8971.c b/sound/soc/codecs/wm8971.c index b444b297d0b2..3a06a95dd96f 100644 --- a/sound/soc/codecs/wm8971.c +++ b/sound/soc/codecs/wm8971.c @@ -224,7 +224,7 @@ static const struct snd_soc_dapm_widget wm8971_dapm_widgets[] = { SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8971_PWR2, 8, 0), SND_SOC_DAPM_PGA("Mono Out 1", WM8971_PWR2, 2, 0, NULL, 0), - SND_SOC_DAPM_MICBIAS("Mic Bias", WM8971_PWR1, 1, 0), + SND_SOC_DAPM_SUPPLY("Mic Bias", WM8971_PWR1, 1, 0, NULL, 0), SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8971_PWR1, 2, 0), SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8971_PWR1, 3, 0), diff --git a/sound/soc/codecs/wm8974.c b/sound/soc/codecs/wm8974.c index 9352f1e088d2..7bd35b8fdcd2 100644 --- a/sound/soc/codecs/wm8974.c +++ b/sound/soc/codecs/wm8974.c @@ -226,7 +226,7 @@ SND_SOC_DAPM_MIXER("Input PGA", WM8974_POWER2, 2, 0, wm8974_inpga, SND_SOC_DAPM_MIXER("Boost Mixer", WM8974_POWER2, 4, 0, wm8974_boost_mixer, ARRAY_SIZE(wm8974_boost_mixer)), -SND_SOC_DAPM_MICBIAS("Mic Bias", WM8974_POWER1, 4, 0), +SND_SOC_DAPM_SUPPLY("Mic Bias", WM8974_POWER1, 4, 0, NULL, 0), SND_SOC_DAPM_INPUT("MICN"), SND_SOC_DAPM_INPUT("MICP"), diff --git a/sound/soc/codecs/wm8983.c b/sound/soc/codecs/wm8983.c index 93ee28439be5..58e067b5a6a3 100644 --- a/sound/soc/codecs/wm8983.c +++ b/sound/soc/codecs/wm8983.c @@ -481,7 +481,8 @@ static const struct snd_soc_dapm_widget wm8983_dapm_widgets[] = { SND_SOC_DAPM_PGA("OUT4 Out", WM8983_POWER_MANAGEMENT_3, 8, 0, NULL, 0), - SND_SOC_DAPM_MICBIAS("Mic Bias", WM8983_POWER_MANAGEMENT_1, 4, 0), + SND_SOC_DAPM_SUPPLY("Mic Bias", WM8983_POWER_MANAGEMENT_1, 4, 0, + NULL, 0), SND_SOC_DAPM_INPUT("LIN"), SND_SOC_DAPM_INPUT("LIP"), diff --git a/sound/soc/codecs/wm8985.c b/sound/soc/codecs/wm8985.c index bae510acdec8..36c4ee08e159 100644 --- a/sound/soc/codecs/wm8985.c +++ b/sound/soc/codecs/wm8985.c @@ -411,7 +411,8 @@ static const struct snd_soc_dapm_widget wm8985_dapm_widgets[] = { SND_SOC_DAPM_PGA("Right Speaker Out", WM8985_POWER_MANAGEMENT_3, 6, 0, NULL, 0), - SND_SOC_DAPM_MICBIAS("Mic Bias", WM8985_POWER_MANAGEMENT_1, 4, 0), + SND_SOC_DAPM_SUPPLY("Mic Bias", WM8985_POWER_MANAGEMENT_1, 4, 0, + NULL, 0), SND_SOC_DAPM_INPUT("LIN"), SND_SOC_DAPM_INPUT("LIP"), diff --git a/sound/soc/codecs/wm8988.c b/sound/soc/codecs/wm8988.c index 2e9eba717d1a..514189d1923e 100644 --- a/sound/soc/codecs/wm8988.c +++ b/sound/soc/codecs/wm8988.c @@ -267,7 +267,7 @@ static const struct snd_kcontrol_new wm8988_monomux_controls = SOC_DAPM_ENUM("Route", monomux); static const struct snd_soc_dapm_widget wm8988_dapm_widgets[] = { - SND_SOC_DAPM_MICBIAS("Mic Bias", WM8988_PWR1, 1, 0), + SND_SOC_DAPM_SUPPLY("Mic Bias", WM8988_PWR1, 1, 0, NULL, 0), SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0, &wm8988_diffmux_controls), diff --git a/sound/soc/codecs/wm8990.c b/sound/soc/codecs/wm8990.c index d29a9622964c..d4cbec6372db 100644 --- a/sound/soc/codecs/wm8990.c +++ b/sound/soc/codecs/wm8990.c @@ -776,8 +776,8 @@ SND_SOC_DAPM_PGA("ROPGA", WM8990_POWER_MANAGEMENT_3, WM8990_ROPGA_ENA_BIT, 0, NULL, 0), /* MICBIAS */ -SND_SOC_DAPM_MICBIAS("MICBIAS", WM8990_POWER_MANAGEMENT_1, - WM8990_MICBIAS_ENA_BIT, 0), +SND_SOC_DAPM_SUPPLY("MICBIAS", WM8990_POWER_MANAGEMENT_1, + WM8990_MICBIAS_ENA_BIT, 0, NULL, 0), SND_SOC_DAPM_OUTPUT("LON"), SND_SOC_DAPM_OUTPUT("LOP"), diff --git a/sound/soc/codecs/wm8991.c b/sound/soc/codecs/wm8991.c index c9ab3ba9bced..1d46d59c82a3 100644 --- a/sound/soc/codecs/wm8991.c +++ b/sound/soc/codecs/wm8991.c @@ -770,8 +770,8 @@ static const struct snd_soc_dapm_widget wm8991_dapm_widgets[] = { NULL, 0), /* MICBIAS */ - SND_SOC_DAPM_MICBIAS("MICBIAS", WM8991_POWER_MANAGEMENT_1, - WM8991_MICBIAS_ENA_BIT, 0), + SND_SOC_DAPM_SUPPLY("MICBIAS", WM8991_POWER_MANAGEMENT_1, + WM8991_MICBIAS_ENA_BIT, 0, NULL, 0), SND_SOC_DAPM_OUTPUT("LON"), SND_SOC_DAPM_OUTPUT("LOP"), diff --git a/sound/soc/codecs/wm8995.c b/sound/soc/codecs/wm8995.c index 78eeb21e6696..4d109b1ad124 100644 --- a/sound/soc/codecs/wm8995.c +++ b/sound/soc/codecs/wm8995.c @@ -688,8 +688,10 @@ static const struct snd_soc_dapm_widget wm8995_dapm_widgets[] = { SND_SOC_DAPM_MIXER("IN1R PGA", SND_SOC_NOPM, 0, 0, &in1r_pga, 1), - SND_SOC_DAPM_MICBIAS("MICBIAS1", WM8995_POWER_MANAGEMENT_1, 8, 0), - SND_SOC_DAPM_MICBIAS("MICBIAS2", WM8995_POWER_MANAGEMENT_1, 9, 0), + SND_SOC_DAPM_SUPPLY("MICBIAS1", WM8995_POWER_MANAGEMENT_1, 8, 0, + NULL, 0), + SND_SOC_DAPM_SUPPLY("MICBIAS2", WM8995_POWER_MANAGEMENT_1, 9, 0, + NULL, 0), SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8995_AIF1_CLOCKING_1, 0, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8995_AIF2_CLOCKING_1, 0, 0, NULL, 0), diff --git a/sound/soc/codecs/wm8996.c b/sound/soc/codecs/wm8996.c index 645c980d6b80..fd5bb1ad6912 100644 --- a/sound/soc/codecs/wm8996.c +++ b/sound/soc/codecs/wm8996.c @@ -19,6 +19,7 @@ #include <linux/gcd.h> #include <linux/gpio.h> #include <linux/i2c.h> +#include <linux/regmap.h> #include <linux/regulator/consumer.h> #include <linux/slab.h> #include <linux/workqueue.h> @@ -49,6 +50,8 @@ static const char *wm8996_supply_names[WM8996_NUM_SUPPLIES] = { }; struct wm8996_priv { + struct device *dev; + struct regmap *regmap; struct snd_soc_codec *codec; int ldo1ena; @@ -105,7 +108,7 @@ static int wm8996_regulator_event_##n(struct notifier_block *nb, \ struct wm8996_priv *wm8996 = container_of(nb, struct wm8996_priv, \ disable_nb[n]); \ if (event & REGULATOR_EVENT_DISABLE) { \ - wm8996->codec->cache_sync = 1; \ + regcache_cache_only(wm8996->regmap, true); \ } \ return 0; \ } @@ -114,297 +117,365 @@ WM8996_REGULATOR_EVENT(0) WM8996_REGULATOR_EVENT(1) WM8996_REGULATOR_EVENT(2) -static const u16 wm8996_reg[WM8996_MAX_REGISTER] = { - [WM8996_SOFTWARE_RESET] = 0x8996, - [WM8996_POWER_MANAGEMENT_7] = 0x10, - [WM8996_DAC1_HPOUT1_VOLUME] = 0x88, - [WM8996_DAC2_HPOUT2_VOLUME] = 0x88, - [WM8996_DAC1_LEFT_VOLUME] = 0x2c0, - [WM8996_DAC1_RIGHT_VOLUME] = 0x2c0, - [WM8996_DAC2_LEFT_VOLUME] = 0x2c0, - [WM8996_DAC2_RIGHT_VOLUME] = 0x2c0, - [WM8996_OUTPUT1_LEFT_VOLUME] = 0x80, - [WM8996_OUTPUT1_RIGHT_VOLUME] = 0x80, - [WM8996_OUTPUT2_LEFT_VOLUME] = 0x80, - [WM8996_OUTPUT2_RIGHT_VOLUME] = 0x80, - [WM8996_MICBIAS_1] = 0x39, - [WM8996_MICBIAS_2] = 0x39, - [WM8996_LDO_1] = 0x3, - [WM8996_LDO_2] = 0x13, - [WM8996_ACCESSORY_DETECT_MODE_1] = 0x4, - [WM8996_HEADPHONE_DETECT_1] = 0x20, - [WM8996_MIC_DETECT_1] = 0x7600, - [WM8996_MIC_DETECT_2] = 0xbf, - [WM8996_CHARGE_PUMP_1] = 0x1f25, - [WM8996_CHARGE_PUMP_2] = 0xab19, - [WM8996_DC_SERVO_5] = 0x2a2a, - [WM8996_CONTROL_INTERFACE_1] = 0x8004, - [WM8996_CLOCKING_1] = 0x10, - [WM8996_AIF_RATE] = 0x83, - [WM8996_FLL_CONTROL_4] = 0x5dc0, - [WM8996_FLL_CONTROL_5] = 0xc84, - [WM8996_FLL_EFS_2] = 0x2, - [WM8996_AIF1_TX_LRCLK_1] = 0x80, - [WM8996_AIF1_TX_LRCLK_2] = 0x8, - [WM8996_AIF1_RX_LRCLK_1] = 0x80, - [WM8996_AIF1TX_DATA_CONFIGURATION_1] = 0x1818, - [WM8996_AIF1RX_DATA_CONFIGURATION] = 0x1818, - [WM8996_AIF1TX_TEST] = 0x7, - [WM8996_AIF2_TX_LRCLK_1] = 0x80, - [WM8996_AIF2_TX_LRCLK_2] = 0x8, - [WM8996_AIF2_RX_LRCLK_1] = 0x80, - [WM8996_AIF2TX_DATA_CONFIGURATION_1] = 0x1818, - [WM8996_AIF2RX_DATA_CONFIGURATION] = 0x1818, - [WM8996_AIF2TX_TEST] = 0x1, - [WM8996_DSP1_TX_LEFT_VOLUME] = 0xc0, - [WM8996_DSP1_TX_RIGHT_VOLUME] = 0xc0, - [WM8996_DSP1_RX_LEFT_VOLUME] = 0xc0, - [WM8996_DSP1_RX_RIGHT_VOLUME] = 0xc0, - [WM8996_DSP1_TX_FILTERS] = 0x2000, - [WM8996_DSP1_RX_FILTERS_1] = 0x200, - [WM8996_DSP1_RX_FILTERS_2] = 0x10, - [WM8996_DSP1_DRC_1] = 0x98, - [WM8996_DSP1_DRC_2] = 0x845, - [WM8996_DSP1_RX_EQ_GAINS_1] = 0x6318, - [WM8996_DSP1_RX_EQ_GAINS_2] = 0x6300, - [WM8996_DSP1_RX_EQ_BAND_1_A] = 0xfca, - [WM8996_DSP1_RX_EQ_BAND_1_B] = 0x400, - [WM8996_DSP1_RX_EQ_BAND_1_PG] = 0xd8, - [WM8996_DSP1_RX_EQ_BAND_2_A] = 0x1eb5, - [WM8996_DSP1_RX_EQ_BAND_2_B] = 0xf145, - [WM8996_DSP1_RX_EQ_BAND_2_C] = 0xb75, - [WM8996_DSP1_RX_EQ_BAND_2_PG] = 0x1c5, - [WM8996_DSP1_RX_EQ_BAND_3_A] = 0x1c58, - [WM8996_DSP1_RX_EQ_BAND_3_B] = 0xf373, - [WM8996_DSP1_RX_EQ_BAND_3_C] = 0xa54, - [WM8996_DSP1_RX_EQ_BAND_3_PG] = 0x558, - [WM8996_DSP1_RX_EQ_BAND_4_A] = 0x168e, - [WM8996_DSP1_RX_EQ_BAND_4_B] = 0xf829, - [WM8996_DSP1_RX_EQ_BAND_4_C] = 0x7ad, - [WM8996_DSP1_RX_EQ_BAND_4_PG] = 0x1103, - [WM8996_DSP1_RX_EQ_BAND_5_A] = 0x564, - [WM8996_DSP1_RX_EQ_BAND_5_B] = 0x559, - [WM8996_DSP1_RX_EQ_BAND_5_PG] = 0x4000, - [WM8996_DSP2_TX_LEFT_VOLUME] = 0xc0, - [WM8996_DSP2_TX_RIGHT_VOLUME] = 0xc0, - [WM8996_DSP2_RX_LEFT_VOLUME] = 0xc0, - [WM8996_DSP2_RX_RIGHT_VOLUME] = 0xc0, - [WM8996_DSP2_TX_FILTERS] = 0x2000, - [WM8996_DSP2_RX_FILTERS_1] = 0x200, - [WM8996_DSP2_RX_FILTERS_2] = 0x10, - [WM8996_DSP2_DRC_1] = 0x98, - [WM8996_DSP2_DRC_2] = 0x845, - [WM8996_DSP2_RX_EQ_GAINS_1] = 0x6318, - [WM8996_DSP2_RX_EQ_GAINS_2] = 0x6300, - [WM8996_DSP2_RX_EQ_BAND_1_A] = 0xfca, - [WM8996_DSP2_RX_EQ_BAND_1_B] = 0x400, - [WM8996_DSP2_RX_EQ_BAND_1_PG] = 0xd8, - [WM8996_DSP2_RX_EQ_BAND_2_A] = 0x1eb5, - [WM8996_DSP2_RX_EQ_BAND_2_B] = 0xf145, - [WM8996_DSP2_RX_EQ_BAND_2_C] = 0xb75, - [WM8996_DSP2_RX_EQ_BAND_2_PG] = 0x1c5, - [WM8996_DSP2_RX_EQ_BAND_3_A] = 0x1c58, - [WM8996_DSP2_RX_EQ_BAND_3_B] = 0xf373, - [WM8996_DSP2_RX_EQ_BAND_3_C] = 0xa54, - [WM8996_DSP2_RX_EQ_BAND_3_PG] = 0x558, - [WM8996_DSP2_RX_EQ_BAND_4_A] = 0x168e, - [WM8996_DSP2_RX_EQ_BAND_4_B] = 0xf829, - [WM8996_DSP2_RX_EQ_BAND_4_C] = 0x7ad, - [WM8996_DSP2_RX_EQ_BAND_4_PG] = 0x1103, - [WM8996_DSP2_RX_EQ_BAND_5_A] = 0x564, - [WM8996_DSP2_RX_EQ_BAND_5_B] = 0x559, - [WM8996_DSP2_RX_EQ_BAND_5_PG] = 0x4000, - [WM8996_OVERSAMPLING] = 0xd, - [WM8996_SIDETONE] = 0x1040, - [WM8996_GPIO_1] = 0xa101, - [WM8996_GPIO_2] = 0xa101, - [WM8996_GPIO_3] = 0xa101, - [WM8996_GPIO_4] = 0xa101, - [WM8996_GPIO_5] = 0xa101, - [WM8996_PULL_CONTROL_2] = 0x140, - [WM8996_INTERRUPT_STATUS_1_MASK] = 0x1f, - [WM8996_INTERRUPT_STATUS_2_MASK] = 0x1ecf, - [WM8996_RIGHT_PDM_SPEAKER] = 0x1, - [WM8996_PDM_SPEAKER_MUTE_SEQUENCE] = 0x69, - [WM8996_PDM_SPEAKER_VOLUME] = 0x66, - [WM8996_WRITE_SEQUENCER_0] = 0x1, - [WM8996_WRITE_SEQUENCER_1] = 0x1, - [WM8996_WRITE_SEQUENCER_3] = 0x6, - [WM8996_WRITE_SEQUENCER_4] = 0x40, - [WM8996_WRITE_SEQUENCER_5] = 0x1, - [WM8996_WRITE_SEQUENCER_6] = 0xf, - [WM8996_WRITE_SEQUENCER_7] = 0x6, - [WM8996_WRITE_SEQUENCER_8] = 0x1, - [WM8996_WRITE_SEQUENCER_9] = 0x3, - [WM8996_WRITE_SEQUENCER_10] = 0x104, - [WM8996_WRITE_SEQUENCER_12] = 0x60, - [WM8996_WRITE_SEQUENCER_13] = 0x11, - [WM8996_WRITE_SEQUENCER_14] = 0x401, - [WM8996_WRITE_SEQUENCER_16] = 0x50, - [WM8996_WRITE_SEQUENCER_17] = 0x3, - [WM8996_WRITE_SEQUENCER_18] = 0x100, - [WM8996_WRITE_SEQUENCER_20] = 0x51, - [WM8996_WRITE_SEQUENCER_21] = 0x3, - [WM8996_WRITE_SEQUENCER_22] = 0x104, - [WM8996_WRITE_SEQUENCER_23] = 0xa, - [WM8996_WRITE_SEQUENCER_24] = 0x60, - [WM8996_WRITE_SEQUENCER_25] = 0x3b, - [WM8996_WRITE_SEQUENCER_26] = 0x502, - [WM8996_WRITE_SEQUENCER_27] = 0x100, - [WM8996_WRITE_SEQUENCER_28] = 0x2fff, - [WM8996_WRITE_SEQUENCER_32] = 0x2fff, - [WM8996_WRITE_SEQUENCER_36] = 0x2fff, - [WM8996_WRITE_SEQUENCER_40] = 0x2fff, - [WM8996_WRITE_SEQUENCER_44] = 0x2fff, - [WM8996_WRITE_SEQUENCER_48] = 0x2fff, - [WM8996_WRITE_SEQUENCER_52] = 0x2fff, - [WM8996_WRITE_SEQUENCER_56] = 0x2fff, - [WM8996_WRITE_SEQUENCER_60] = 0x2fff, - [WM8996_WRITE_SEQUENCER_64] = 0x1, - [WM8996_WRITE_SEQUENCER_65] = 0x1, - [WM8996_WRITE_SEQUENCER_67] = 0x6, - [WM8996_WRITE_SEQUENCER_68] = 0x40, - [WM8996_WRITE_SEQUENCER_69] = 0x1, - [WM8996_WRITE_SEQUENCER_70] = 0xf, - [WM8996_WRITE_SEQUENCER_71] = 0x6, - [WM8996_WRITE_SEQUENCER_72] = 0x1, - [WM8996_WRITE_SEQUENCER_73] = 0x3, - [WM8996_WRITE_SEQUENCER_74] = 0x104, - [WM8996_WRITE_SEQUENCER_76] = 0x60, - [WM8996_WRITE_SEQUENCER_77] = 0x11, - [WM8996_WRITE_SEQUENCER_78] = 0x401, - [WM8996_WRITE_SEQUENCER_80] = 0x50, - [WM8996_WRITE_SEQUENCER_81] = 0x3, - [WM8996_WRITE_SEQUENCER_82] = 0x100, - [WM8996_WRITE_SEQUENCER_84] = 0x60, - [WM8996_WRITE_SEQUENCER_85] = 0x3b, - [WM8996_WRITE_SEQUENCER_86] = 0x502, - [WM8996_WRITE_SEQUENCER_87] = 0x100, - [WM8996_WRITE_SEQUENCER_88] = 0x2fff, - [WM8996_WRITE_SEQUENCER_92] = 0x2fff, - [WM8996_WRITE_SEQUENCER_96] = 0x2fff, - [WM8996_WRITE_SEQUENCER_100] = 0x2fff, - [WM8996_WRITE_SEQUENCER_104] = 0x2fff, - [WM8996_WRITE_SEQUENCER_108] = 0x2fff, - [WM8996_WRITE_SEQUENCER_112] = 0x2fff, - [WM8996_WRITE_SEQUENCER_116] = 0x2fff, - [WM8996_WRITE_SEQUENCER_120] = 0x2fff, - [WM8996_WRITE_SEQUENCER_124] = 0x2fff, - [WM8996_WRITE_SEQUENCER_128] = 0x1, - [WM8996_WRITE_SEQUENCER_129] = 0x1, - [WM8996_WRITE_SEQUENCER_131] = 0x6, - [WM8996_WRITE_SEQUENCER_132] = 0x40, - [WM8996_WRITE_SEQUENCER_133] = 0x1, - [WM8996_WRITE_SEQUENCER_134] = 0xf, - [WM8996_WRITE_SEQUENCER_135] = 0x6, - [WM8996_WRITE_SEQUENCER_136] = 0x1, - [WM8996_WRITE_SEQUENCER_137] = 0x3, - [WM8996_WRITE_SEQUENCER_138] = 0x106, - [WM8996_WRITE_SEQUENCER_140] = 0x61, - [WM8996_WRITE_SEQUENCER_141] = 0x11, - [WM8996_WRITE_SEQUENCER_142] = 0x401, - [WM8996_WRITE_SEQUENCER_144] = 0x50, - [WM8996_WRITE_SEQUENCER_145] = 0x3, - [WM8996_WRITE_SEQUENCER_146] = 0x102, - [WM8996_WRITE_SEQUENCER_148] = 0x51, - [WM8996_WRITE_SEQUENCER_149] = 0x3, - [WM8996_WRITE_SEQUENCER_150] = 0x106, - [WM8996_WRITE_SEQUENCER_151] = 0xa, - [WM8996_WRITE_SEQUENCER_152] = 0x61, - [WM8996_WRITE_SEQUENCER_153] = 0x3b, - [WM8996_WRITE_SEQUENCER_154] = 0x502, - [WM8996_WRITE_SEQUENCER_155] = 0x100, - [WM8996_WRITE_SEQUENCER_156] = 0x2fff, - [WM8996_WRITE_SEQUENCER_160] = 0x2fff, - [WM8996_WRITE_SEQUENCER_164] = 0x2fff, - [WM8996_WRITE_SEQUENCER_168] = 0x2fff, - [WM8996_WRITE_SEQUENCER_172] = 0x2fff, - [WM8996_WRITE_SEQUENCER_176] = 0x2fff, - [WM8996_WRITE_SEQUENCER_180] = 0x2fff, - [WM8996_WRITE_SEQUENCER_184] = 0x2fff, - [WM8996_WRITE_SEQUENCER_188] = 0x2fff, - [WM8996_WRITE_SEQUENCER_192] = 0x1, - [WM8996_WRITE_SEQUENCER_193] = 0x1, - [WM8996_WRITE_SEQUENCER_195] = 0x6, - [WM8996_WRITE_SEQUENCER_196] = 0x40, - [WM8996_WRITE_SEQUENCER_197] = 0x1, - [WM8996_WRITE_SEQUENCER_198] = 0xf, - [WM8996_WRITE_SEQUENCER_199] = 0x6, - [WM8996_WRITE_SEQUENCER_200] = 0x1, - [WM8996_WRITE_SEQUENCER_201] = 0x3, - [WM8996_WRITE_SEQUENCER_202] = 0x106, - [WM8996_WRITE_SEQUENCER_204] = 0x61, - [WM8996_WRITE_SEQUENCER_205] = 0x11, - [WM8996_WRITE_SEQUENCER_206] = 0x401, - [WM8996_WRITE_SEQUENCER_208] = 0x50, - [WM8996_WRITE_SEQUENCER_209] = 0x3, - [WM8996_WRITE_SEQUENCER_210] = 0x102, - [WM8996_WRITE_SEQUENCER_212] = 0x61, - [WM8996_WRITE_SEQUENCER_213] = 0x3b, - [WM8996_WRITE_SEQUENCER_214] = 0x502, - [WM8996_WRITE_SEQUENCER_215] = 0x100, - [WM8996_WRITE_SEQUENCER_216] = 0x2fff, - [WM8996_WRITE_SEQUENCER_220] = 0x2fff, - [WM8996_WRITE_SEQUENCER_224] = 0x2fff, - [WM8996_WRITE_SEQUENCER_228] = 0x2fff, - [WM8996_WRITE_SEQUENCER_232] = 0x2fff, - [WM8996_WRITE_SEQUENCER_236] = 0x2fff, - [WM8996_WRITE_SEQUENCER_240] = 0x2fff, - [WM8996_WRITE_SEQUENCER_244] = 0x2fff, - [WM8996_WRITE_SEQUENCER_248] = 0x2fff, - [WM8996_WRITE_SEQUENCER_252] = 0x2fff, - [WM8996_WRITE_SEQUENCER_256] = 0x60, - [WM8996_WRITE_SEQUENCER_258] = 0x601, - [WM8996_WRITE_SEQUENCER_260] = 0x50, - [WM8996_WRITE_SEQUENCER_262] = 0x100, - [WM8996_WRITE_SEQUENCER_264] = 0x1, - [WM8996_WRITE_SEQUENCER_266] = 0x104, - [WM8996_WRITE_SEQUENCER_267] = 0x100, - [WM8996_WRITE_SEQUENCER_268] = 0x2fff, - [WM8996_WRITE_SEQUENCER_272] = 0x2fff, - [WM8996_WRITE_SEQUENCER_276] = 0x2fff, - [WM8996_WRITE_SEQUENCER_280] = 0x2fff, - [WM8996_WRITE_SEQUENCER_284] = 0x2fff, - [WM8996_WRITE_SEQUENCER_288] = 0x2fff, - [WM8996_WRITE_SEQUENCER_292] = 0x2fff, - [WM8996_WRITE_SEQUENCER_296] = 0x2fff, - [WM8996_WRITE_SEQUENCER_300] = 0x2fff, - [WM8996_WRITE_SEQUENCER_304] = 0x2fff, - [WM8996_WRITE_SEQUENCER_308] = 0x2fff, - [WM8996_WRITE_SEQUENCER_312] = 0x2fff, - [WM8996_WRITE_SEQUENCER_316] = 0x2fff, - [WM8996_WRITE_SEQUENCER_320] = 0x61, - [WM8996_WRITE_SEQUENCER_322] = 0x601, - [WM8996_WRITE_SEQUENCER_324] = 0x50, - [WM8996_WRITE_SEQUENCER_326] = 0x102, - [WM8996_WRITE_SEQUENCER_328] = 0x1, - [WM8996_WRITE_SEQUENCER_330] = 0x106, - [WM8996_WRITE_SEQUENCER_331] = 0x100, - [WM8996_WRITE_SEQUENCER_332] = 0x2fff, - [WM8996_WRITE_SEQUENCER_336] = 0x2fff, - [WM8996_WRITE_SEQUENCER_340] = 0x2fff, - [WM8996_WRITE_SEQUENCER_344] = 0x2fff, - [WM8996_WRITE_SEQUENCER_348] = 0x2fff, - [WM8996_WRITE_SEQUENCER_352] = 0x2fff, - [WM8996_WRITE_SEQUENCER_356] = 0x2fff, - [WM8996_WRITE_SEQUENCER_360] = 0x2fff, - [WM8996_WRITE_SEQUENCER_364] = 0x2fff, - [WM8996_WRITE_SEQUENCER_368] = 0x2fff, - [WM8996_WRITE_SEQUENCER_372] = 0x2fff, - [WM8996_WRITE_SEQUENCER_376] = 0x2fff, - [WM8996_WRITE_SEQUENCER_380] = 0x2fff, - [WM8996_WRITE_SEQUENCER_384] = 0x60, - [WM8996_WRITE_SEQUENCER_386] = 0x601, - [WM8996_WRITE_SEQUENCER_388] = 0x61, - [WM8996_WRITE_SEQUENCER_390] = 0x601, - [WM8996_WRITE_SEQUENCER_392] = 0x50, - [WM8996_WRITE_SEQUENCER_394] = 0x300, - [WM8996_WRITE_SEQUENCER_396] = 0x1, - [WM8996_WRITE_SEQUENCER_398] = 0x304, - [WM8996_WRITE_SEQUENCER_400] = 0x40, - [WM8996_WRITE_SEQUENCER_402] = 0xf, - [WM8996_WRITE_SEQUENCER_404] = 0x1, - [WM8996_WRITE_SEQUENCER_407] = 0x100, +static struct reg_default wm8996_reg[] = { + { WM8996_SOFTWARE_RESET, 0x8996 }, + { WM8996_POWER_MANAGEMENT_1, 0x0 }, + { WM8996_POWER_MANAGEMENT_2, 0x0 }, + { WM8996_POWER_MANAGEMENT_3, 0x0 }, + { WM8996_POWER_MANAGEMENT_4, 0x0 }, + { WM8996_POWER_MANAGEMENT_5, 0x0 }, + { WM8996_POWER_MANAGEMENT_6, 0x0 }, + { WM8996_POWER_MANAGEMENT_7, 0x10 }, + { WM8996_POWER_MANAGEMENT_8, 0x0 }, + { WM8996_LEFT_LINE_INPUT_VOLUME, 0x0 }, + { WM8996_RIGHT_LINE_INPUT_VOLUME, 0x0 }, + { WM8996_LINE_INPUT_CONTROL, 0x0 }, + { WM8996_DAC1_HPOUT1_VOLUME, 0x88 }, + { WM8996_DAC2_HPOUT2_VOLUME, 0x88 }, + { WM8996_DAC1_LEFT_VOLUME, 0x2c0 }, + { WM8996_DAC1_RIGHT_VOLUME, 0x2c0 }, + { WM8996_DAC2_LEFT_VOLUME, 0x2c0 }, + { WM8996_DAC2_RIGHT_VOLUME, 0x2c0 }, + { WM8996_OUTPUT1_LEFT_VOLUME, 0x80 }, + { WM8996_OUTPUT1_RIGHT_VOLUME, 0x80 }, + { WM8996_OUTPUT2_LEFT_VOLUME, 0x80 }, + { WM8996_OUTPUT2_RIGHT_VOLUME, 0x80 }, + { WM8996_MICBIAS_1, 0x39 }, + { WM8996_MICBIAS_2, 0x39 }, + { WM8996_LDO_1, 0x3 }, + { WM8996_LDO_2, 0x13 }, + { WM8996_ACCESSORY_DETECT_MODE_1, 0x4 }, + { WM8996_ACCESSORY_DETECT_MODE_2, 0x0 }, + { WM8996_HEADPHONE_DETECT_1, 0x20 }, + { WM8996_HEADPHONE_DETECT_2, 0x0 }, + { WM8996_MIC_DETECT_1, 0x7600 }, + { WM8996_MIC_DETECT_2, 0xbf }, + { WM8996_CHARGE_PUMP_1, 0x1f25 }, + { WM8996_CHARGE_PUMP_2, 0xab19 }, + { WM8996_DC_SERVO_1, 0x0 }, + { WM8996_DC_SERVO_2, 0x0 }, + { WM8996_DC_SERVO_3, 0x0 }, + { WM8996_DC_SERVO_5, 0x2a2a }, + { WM8996_DC_SERVO_6, 0x0 }, + { WM8996_DC_SERVO_7, 0x0 }, + { WM8996_ANALOGUE_HP_1, 0x0 }, + { WM8996_ANALOGUE_HP_2, 0x0 }, + { WM8996_CONTROL_INTERFACE_1, 0x8004 }, + { WM8996_WRITE_SEQUENCER_CTRL_1, 0x0 }, + { WM8996_WRITE_SEQUENCER_CTRL_2, 0x0 }, + { WM8996_AIF_CLOCKING_1, 0x0 }, + { WM8996_AIF_CLOCKING_2, 0x0 }, + { WM8996_CLOCKING_1, 0x10 }, + { WM8996_CLOCKING_2, 0x0 }, + { WM8996_AIF_RATE, 0x83 }, + { WM8996_FLL_CONTROL_1, 0x0 }, + { WM8996_FLL_CONTROL_2, 0x0 }, + { WM8996_FLL_CONTROL_3, 0x0 }, + { WM8996_FLL_CONTROL_4, 0x5dc0 }, + { WM8996_FLL_CONTROL_5, 0xc84 }, + { WM8996_FLL_EFS_1, 0x0 }, + { WM8996_FLL_EFS_2, 0x2 }, + { WM8996_AIF1_CONTROL, 0x0 }, + { WM8996_AIF1_BCLK, 0x0 }, + { WM8996_AIF1_TX_LRCLK_1, 0x80 }, + { WM8996_AIF1_TX_LRCLK_2, 0x8 }, + { WM8996_AIF1_RX_LRCLK_1, 0x80 }, + { WM8996_AIF1_RX_LRCLK_2, 0x0 }, + { WM8996_AIF1TX_DATA_CONFIGURATION_1, 0x1818 }, + { WM8996_AIF1TX_DATA_CONFIGURATION_2, 0 }, + { WM8996_AIF1RX_DATA_CONFIGURATION, 0x1818 }, + { WM8996_AIF1TX_CHANNEL_0_CONFIGURATION, 0x0 }, + { WM8996_AIF1TX_CHANNEL_1_CONFIGURATION, 0x0 }, + { WM8996_AIF1TX_CHANNEL_2_CONFIGURATION, 0x0 }, + { WM8996_AIF1TX_CHANNEL_3_CONFIGURATION, 0x0 }, + { WM8996_AIF1TX_CHANNEL_4_CONFIGURATION, 0x0 }, + { WM8996_AIF1TX_CHANNEL_5_CONFIGURATION, 0x0 }, + { WM8996_AIF1RX_CHANNEL_0_CONFIGURATION, 0x0 }, + { WM8996_AIF1RX_CHANNEL_1_CONFIGURATION, 0x0 }, + { WM8996_AIF1RX_CHANNEL_2_CONFIGURATION, 0x0 }, + { WM8996_AIF1RX_CHANNEL_3_CONFIGURATION, 0x0 }, + { WM8996_AIF1RX_CHANNEL_4_CONFIGURATION, 0x0 }, + { WM8996_AIF1RX_CHANNEL_5_CONFIGURATION, 0x0 }, + { WM8996_AIF1RX_MONO_CONFIGURATION, 0x0 }, + { WM8996_AIF1TX_TEST, 0x7 }, + { WM8996_AIF2_CONTROL, 0x0 }, + { WM8996_AIF2_BCLK, 0x0 }, + { WM8996_AIF2_TX_LRCLK_1, 0x80 }, + { WM8996_AIF2_TX_LRCLK_2, 0x8 }, + { WM8996_AIF2_RX_LRCLK_1, 0x80 }, + { WM8996_AIF2_RX_LRCLK_2, 0x0 }, + { WM8996_AIF2TX_DATA_CONFIGURATION_1, 0x1818 }, + { WM8996_AIF2RX_DATA_CONFIGURATION, 0x1818 }, + { WM8996_AIF2RX_DATA_CONFIGURATION, 0x0 }, + { WM8996_AIF2TX_CHANNEL_0_CONFIGURATION, 0x0 }, + { WM8996_AIF2TX_CHANNEL_1_CONFIGURATION, 0x0 }, + { WM8996_AIF2RX_CHANNEL_0_CONFIGURATION, 0x0 }, + { WM8996_AIF2RX_CHANNEL_1_CONFIGURATION, 0x0 }, + { WM8996_AIF2RX_MONO_CONFIGURATION, 0x0 }, + { WM8996_AIF2TX_TEST, 0x1 }, + { WM8996_DSP1_TX_LEFT_VOLUME, 0xc0 }, + { WM8996_DSP1_TX_RIGHT_VOLUME, 0xc0 }, + { WM8996_DSP1_RX_LEFT_VOLUME, 0xc0 }, + { WM8996_DSP1_RX_RIGHT_VOLUME, 0xc0 }, + { WM8996_DSP1_TX_FILTERS, 0x2000 }, + { WM8996_DSP1_RX_FILTERS_1, 0x200 }, + { WM8996_DSP1_RX_FILTERS_2, 0x10 }, + { WM8996_DSP1_DRC_1, 0x98 }, + { WM8996_DSP1_DRC_2, 0x845 }, + { WM8996_DSP1_RX_EQ_GAINS_1, 0x6318 }, + { WM8996_DSP1_RX_EQ_GAINS_2, 0x6300 }, + { WM8996_DSP1_RX_EQ_BAND_1_A, 0xfca }, + { WM8996_DSP1_RX_EQ_BAND_1_B, 0x400 }, + { WM8996_DSP1_RX_EQ_BAND_1_PG, 0xd8 }, + { WM8996_DSP1_RX_EQ_BAND_2_A, 0x1eb5 }, + { WM8996_DSP1_RX_EQ_BAND_2_B, 0xf145 }, + { WM8996_DSP1_RX_EQ_BAND_2_C, 0xb75 }, + { WM8996_DSP1_RX_EQ_BAND_2_PG, 0x1c5 }, + { WM8996_DSP1_RX_EQ_BAND_3_A, 0x1c58 }, + { WM8996_DSP1_RX_EQ_BAND_3_B, 0xf373 }, + { WM8996_DSP1_RX_EQ_BAND_3_C, 0xa54 }, + { WM8996_DSP1_RX_EQ_BAND_3_PG, 0x558 }, + { WM8996_DSP1_RX_EQ_BAND_4_A, 0x168e }, + { WM8996_DSP1_RX_EQ_BAND_4_B, 0xf829 }, + { WM8996_DSP1_RX_EQ_BAND_4_C, 0x7ad }, + { WM8996_DSP1_RX_EQ_BAND_4_PG, 0x1103 }, + { WM8996_DSP1_RX_EQ_BAND_5_A, 0x564 }, + { WM8996_DSP1_RX_EQ_BAND_5_B, 0x559 }, + { WM8996_DSP1_RX_EQ_BAND_5_PG, 0x4000 }, + { WM8996_DSP2_TX_LEFT_VOLUME, 0xc0 }, + { WM8996_DSP2_TX_RIGHT_VOLUME, 0xc0 }, + { WM8996_DSP2_RX_LEFT_VOLUME, 0xc0 }, + { WM8996_DSP2_RX_RIGHT_VOLUME, 0xc0 }, + { WM8996_DSP2_TX_FILTERS, 0x2000 }, + { WM8996_DSP2_RX_FILTERS_1, 0x200 }, + { WM8996_DSP2_RX_FILTERS_2, 0x10 }, + { WM8996_DSP2_DRC_1, 0x98 }, + { WM8996_DSP2_DRC_2, 0x845 }, + { WM8996_DSP2_RX_EQ_GAINS_1, 0x6318 }, + { WM8996_DSP2_RX_EQ_GAINS_2, 0x6300 }, + { WM8996_DSP2_RX_EQ_BAND_1_A, 0xfca }, + { WM8996_DSP2_RX_EQ_BAND_1_B, 0x400 }, + { WM8996_DSP2_RX_EQ_BAND_1_PG, 0xd8 }, + { WM8996_DSP2_RX_EQ_BAND_2_A, 0x1eb5 }, + { WM8996_DSP2_RX_EQ_BAND_2_B, 0xf145 }, + { WM8996_DSP2_RX_EQ_BAND_2_C, 0xb75 }, + { WM8996_DSP2_RX_EQ_BAND_2_PG, 0x1c5 }, + { WM8996_DSP2_RX_EQ_BAND_3_A, 0x1c58 }, + { WM8996_DSP2_RX_EQ_BAND_3_B, 0xf373 }, + { WM8996_DSP2_RX_EQ_BAND_3_C, 0xa54 }, + { WM8996_DSP2_RX_EQ_BAND_3_PG, 0x558 }, + { WM8996_DSP2_RX_EQ_BAND_4_A, 0x168e }, + { WM8996_DSP2_RX_EQ_BAND_4_B, 0xf829 }, + { WM8996_DSP2_RX_EQ_BAND_4_C, 0x7ad }, + { WM8996_DSP2_RX_EQ_BAND_4_PG, 0x1103 }, + { WM8996_DSP2_RX_EQ_BAND_5_A, 0x564 }, + { WM8996_DSP2_RX_EQ_BAND_5_B, 0x559 }, + { WM8996_DSP2_RX_EQ_BAND_5_PG, 0x4000 }, + { WM8996_DAC1_MIXER_VOLUMES, 0x0 }, + { WM8996_DAC1_LEFT_MIXER_ROUTING, 0x0 }, + { WM8996_DAC1_RIGHT_MIXER_ROUTING, 0x0 }, + { WM8996_DAC2_MIXER_VOLUMES, 0x0 }, + { WM8996_DAC2_LEFT_MIXER_ROUTING, 0x0 }, + { WM8996_DAC2_RIGHT_MIXER_ROUTING, 0x0 }, + { WM8996_DSP1_TX_LEFT_MIXER_ROUTING, 0x0 }, + { WM8996_DSP1_TX_RIGHT_MIXER_ROUTING, 0x0 }, + { WM8996_DSP2_TX_LEFT_MIXER_ROUTING, 0x0 }, + { WM8996_DSP2_TX_RIGHT_MIXER_ROUTING, 0x0 }, + { WM8996_DSP_TX_MIXER_SELECT, 0x0 }, + { WM8996_DAC_SOFTMUTE, 0x0 }, + { WM8996_OVERSAMPLING, 0xd }, + { WM8996_SIDETONE, 0x1040 }, + { WM8996_GPIO_1, 0xa101 }, + { WM8996_GPIO_2, 0xa101 }, + { WM8996_GPIO_3, 0xa101 }, + { WM8996_GPIO_4, 0xa101 }, + { WM8996_GPIO_5, 0xa101 }, + { WM8996_PULL_CONTROL_1, 0x0 }, + { WM8996_PULL_CONTROL_2, 0x140 }, + { WM8996_INTERRUPT_STATUS_1_MASK, 0x1f }, + { WM8996_INTERRUPT_STATUS_2_MASK, 0x1ecf }, + { WM8996_LEFT_PDM_SPEAKER, 0x0 }, + { WM8996_RIGHT_PDM_SPEAKER, 0x1 }, + { WM8996_PDM_SPEAKER_MUTE_SEQUENCE, 0x69 }, + { WM8996_PDM_SPEAKER_VOLUME, 0x66 }, + { WM8996_WRITE_SEQUENCER_0, 0x1 }, + { WM8996_WRITE_SEQUENCER_1, 0x1 }, + { WM8996_WRITE_SEQUENCER_3, 0x6 }, + { WM8996_WRITE_SEQUENCER_4, 0x40 }, + { WM8996_WRITE_SEQUENCER_5, 0x1 }, + { WM8996_WRITE_SEQUENCER_6, 0xf }, + { WM8996_WRITE_SEQUENCER_7, 0x6 }, + { WM8996_WRITE_SEQUENCER_8, 0x1 }, + { WM8996_WRITE_SEQUENCER_9, 0x3 }, + { WM8996_WRITE_SEQUENCER_10, 0x104 }, + { WM8996_WRITE_SEQUENCER_12, 0x60 }, + { WM8996_WRITE_SEQUENCER_13, 0x11 }, + { WM8996_WRITE_SEQUENCER_14, 0x401 }, + { WM8996_WRITE_SEQUENCER_16, 0x50 }, + { WM8996_WRITE_SEQUENCER_17, 0x3 }, + { WM8996_WRITE_SEQUENCER_18, 0x100 }, + { WM8996_WRITE_SEQUENCER_20, 0x51 }, + { WM8996_WRITE_SEQUENCER_21, 0x3 }, + { WM8996_WRITE_SEQUENCER_22, 0x104 }, + { WM8996_WRITE_SEQUENCER_23, 0xa }, + { WM8996_WRITE_SEQUENCER_24, 0x60 }, + { WM8996_WRITE_SEQUENCER_25, 0x3b }, + { WM8996_WRITE_SEQUENCER_26, 0x502 }, + { WM8996_WRITE_SEQUENCER_27, 0x100 }, + { WM8996_WRITE_SEQUENCER_28, 0x2fff }, + { WM8996_WRITE_SEQUENCER_32, 0x2fff }, + { WM8996_WRITE_SEQUENCER_36, 0x2fff }, + { WM8996_WRITE_SEQUENCER_40, 0x2fff }, + { WM8996_WRITE_SEQUENCER_44, 0x2fff }, + { WM8996_WRITE_SEQUENCER_48, 0x2fff }, + { WM8996_WRITE_SEQUENCER_52, 0x2fff }, + { WM8996_WRITE_SEQUENCER_56, 0x2fff }, + { WM8996_WRITE_SEQUENCER_60, 0x2fff }, + { WM8996_WRITE_SEQUENCER_64, 0x1 }, + { WM8996_WRITE_SEQUENCER_65, 0x1 }, + { WM8996_WRITE_SEQUENCER_67, 0x6 }, + { WM8996_WRITE_SEQUENCER_68, 0x40 }, + { WM8996_WRITE_SEQUENCER_69, 0x1 }, + { WM8996_WRITE_SEQUENCER_70, 0xf }, + { WM8996_WRITE_SEQUENCER_71, 0x6 }, + { WM8996_WRITE_SEQUENCER_72, 0x1 }, + { WM8996_WRITE_SEQUENCER_73, 0x3 }, + { WM8996_WRITE_SEQUENCER_74, 0x104 }, + { WM8996_WRITE_SEQUENCER_76, 0x60 }, + { WM8996_WRITE_SEQUENCER_77, 0x11 }, + { WM8996_WRITE_SEQUENCER_78, 0x401 }, + { WM8996_WRITE_SEQUENCER_80, 0x50 }, + { WM8996_WRITE_SEQUENCER_81, 0x3 }, + { WM8996_WRITE_SEQUENCER_82, 0x100 }, + { WM8996_WRITE_SEQUENCER_84, 0x60 }, + { WM8996_WRITE_SEQUENCER_85, 0x3b }, + { WM8996_WRITE_SEQUENCER_86, 0x502 }, + { WM8996_WRITE_SEQUENCER_87, 0x100 }, + { WM8996_WRITE_SEQUENCER_88, 0x2fff }, + { WM8996_WRITE_SEQUENCER_92, 0x2fff }, + { WM8996_WRITE_SEQUENCER_96, 0x2fff }, + { WM8996_WRITE_SEQUENCER_100, 0x2fff }, + { WM8996_WRITE_SEQUENCER_104, 0x2fff }, + { WM8996_WRITE_SEQUENCER_108, 0x2fff }, + { WM8996_WRITE_SEQUENCER_112, 0x2fff }, + { WM8996_WRITE_SEQUENCER_116, 0x2fff }, + { WM8996_WRITE_SEQUENCER_120, 0x2fff }, + { WM8996_WRITE_SEQUENCER_124, 0x2fff }, + { WM8996_WRITE_SEQUENCER_128, 0x1 }, + { WM8996_WRITE_SEQUENCER_129, 0x1 }, + { WM8996_WRITE_SEQUENCER_131, 0x6 }, + { WM8996_WRITE_SEQUENCER_132, 0x40 }, + { WM8996_WRITE_SEQUENCER_133, 0x1 }, + { WM8996_WRITE_SEQUENCER_134, 0xf }, + { WM8996_WRITE_SEQUENCER_135, 0x6 }, + { WM8996_WRITE_SEQUENCER_136, 0x1 }, + { WM8996_WRITE_SEQUENCER_137, 0x3 }, + { WM8996_WRITE_SEQUENCER_138, 0x106 }, + { WM8996_WRITE_SEQUENCER_140, 0x61 }, + { WM8996_WRITE_SEQUENCER_141, 0x11 }, + { WM8996_WRITE_SEQUENCER_142, 0x401 }, + { WM8996_WRITE_SEQUENCER_144, 0x50 }, + { WM8996_WRITE_SEQUENCER_145, 0x3 }, + { WM8996_WRITE_SEQUENCER_146, 0x102 }, + { WM8996_WRITE_SEQUENCER_148, 0x51 }, + { WM8996_WRITE_SEQUENCER_149, 0x3 }, + { WM8996_WRITE_SEQUENCER_150, 0x106 }, + { WM8996_WRITE_SEQUENCER_151, 0xa }, + { WM8996_WRITE_SEQUENCER_152, 0x61 }, + { WM8996_WRITE_SEQUENCER_153, 0x3b }, + { WM8996_WRITE_SEQUENCER_154, 0x502 }, + { WM8996_WRITE_SEQUENCER_155, 0x100 }, + { WM8996_WRITE_SEQUENCER_156, 0x2fff }, + { WM8996_WRITE_SEQUENCER_160, 0x2fff }, + { WM8996_WRITE_SEQUENCER_164, 0x2fff }, + { WM8996_WRITE_SEQUENCER_168, 0x2fff }, + { WM8996_WRITE_SEQUENCER_172, 0x2fff }, + { WM8996_WRITE_SEQUENCER_176, 0x2fff }, + { WM8996_WRITE_SEQUENCER_180, 0x2fff }, + { WM8996_WRITE_SEQUENCER_184, 0x2fff }, + { WM8996_WRITE_SEQUENCER_188, 0x2fff }, + { WM8996_WRITE_SEQUENCER_192, 0x1 }, + { WM8996_WRITE_SEQUENCER_193, 0x1 }, + { WM8996_WRITE_SEQUENCER_195, 0x6 }, + { WM8996_WRITE_SEQUENCER_196, 0x40 }, + { WM8996_WRITE_SEQUENCER_197, 0x1 }, + { WM8996_WRITE_SEQUENCER_198, 0xf }, + { WM8996_WRITE_SEQUENCER_199, 0x6 }, + { WM8996_WRITE_SEQUENCER_200, 0x1 }, + { WM8996_WRITE_SEQUENCER_201, 0x3 }, + { WM8996_WRITE_SEQUENCER_202, 0x106 }, + { WM8996_WRITE_SEQUENCER_204, 0x61 }, + { WM8996_WRITE_SEQUENCER_205, 0x11 }, + { WM8996_WRITE_SEQUENCER_206, 0x401 }, + { WM8996_WRITE_SEQUENCER_208, 0x50 }, + { WM8996_WRITE_SEQUENCER_209, 0x3 }, + { WM8996_WRITE_SEQUENCER_210, 0x102 }, + { WM8996_WRITE_SEQUENCER_212, 0x61 }, + { WM8996_WRITE_SEQUENCER_213, 0x3b }, + { WM8996_WRITE_SEQUENCER_214, 0x502 }, + { WM8996_WRITE_SEQUENCER_215, 0x100 }, + { WM8996_WRITE_SEQUENCER_216, 0x2fff }, + { WM8996_WRITE_SEQUENCER_220, 0x2fff }, + { WM8996_WRITE_SEQUENCER_224, 0x2fff }, + { WM8996_WRITE_SEQUENCER_228, 0x2fff }, + { WM8996_WRITE_SEQUENCER_232, 0x2fff }, + { WM8996_WRITE_SEQUENCER_236, 0x2fff }, + { WM8996_WRITE_SEQUENCER_240, 0x2fff }, + { WM8996_WRITE_SEQUENCER_244, 0x2fff }, + { WM8996_WRITE_SEQUENCER_248, 0x2fff }, + { WM8996_WRITE_SEQUENCER_252, 0x2fff }, + { WM8996_WRITE_SEQUENCER_256, 0x60 }, + { WM8996_WRITE_SEQUENCER_258, 0x601 }, + { WM8996_WRITE_SEQUENCER_260, 0x50 }, + { WM8996_WRITE_SEQUENCER_262, 0x100 }, + { WM8996_WRITE_SEQUENCER_264, 0x1 }, + { WM8996_WRITE_SEQUENCER_266, 0x104 }, + { WM8996_WRITE_SEQUENCER_267, 0x100 }, + { WM8996_WRITE_SEQUENCER_268, 0x2fff }, + { WM8996_WRITE_SEQUENCER_272, 0x2fff }, + { WM8996_WRITE_SEQUENCER_276, 0x2fff }, + { WM8996_WRITE_SEQUENCER_280, 0x2fff }, + { WM8996_WRITE_SEQUENCER_284, 0x2fff }, + { WM8996_WRITE_SEQUENCER_288, 0x2fff }, + { WM8996_WRITE_SEQUENCER_292, 0x2fff }, + { WM8996_WRITE_SEQUENCER_296, 0x2fff }, + { WM8996_WRITE_SEQUENCER_300, 0x2fff }, + { WM8996_WRITE_SEQUENCER_304, 0x2fff }, + { WM8996_WRITE_SEQUENCER_308, 0x2fff }, + { WM8996_WRITE_SEQUENCER_312, 0x2fff }, + { WM8996_WRITE_SEQUENCER_316, 0x2fff }, + { WM8996_WRITE_SEQUENCER_320, 0x61 }, + { WM8996_WRITE_SEQUENCER_322, 0x601 }, + { WM8996_WRITE_SEQUENCER_324, 0x50 }, + { WM8996_WRITE_SEQUENCER_326, 0x102 }, + { WM8996_WRITE_SEQUENCER_328, 0x1 }, + { WM8996_WRITE_SEQUENCER_330, 0x106 }, + { WM8996_WRITE_SEQUENCER_331, 0x100 }, + { WM8996_WRITE_SEQUENCER_332, 0x2fff }, + { WM8996_WRITE_SEQUENCER_336, 0x2fff }, + { WM8996_WRITE_SEQUENCER_340, 0x2fff }, + { WM8996_WRITE_SEQUENCER_344, 0x2fff }, + { WM8996_WRITE_SEQUENCER_348, 0x2fff }, + { WM8996_WRITE_SEQUENCER_352, 0x2fff }, + { WM8996_WRITE_SEQUENCER_356, 0x2fff }, + { WM8996_WRITE_SEQUENCER_360, 0x2fff }, + { WM8996_WRITE_SEQUENCER_364, 0x2fff }, + { WM8996_WRITE_SEQUENCER_368, 0x2fff }, + { WM8996_WRITE_SEQUENCER_372, 0x2fff }, + { WM8996_WRITE_SEQUENCER_376, 0x2fff }, + { WM8996_WRITE_SEQUENCER_380, 0x2fff }, + { WM8996_WRITE_SEQUENCER_384, 0x60 }, + { WM8996_WRITE_SEQUENCER_386, 0x601 }, + { WM8996_WRITE_SEQUENCER_388, 0x61 }, + { WM8996_WRITE_SEQUENCER_390, 0x601 }, + { WM8996_WRITE_SEQUENCER_392, 0x50 }, + { WM8996_WRITE_SEQUENCER_394, 0x300 }, + { WM8996_WRITE_SEQUENCER_396, 0x1 }, + { WM8996_WRITE_SEQUENCER_398, 0x304 }, + { WM8996_WRITE_SEQUENCER_400, 0x40 }, + { WM8996_WRITE_SEQUENCER_402, 0xf }, + { WM8996_WRITE_SEQUENCER_404, 0x1 }, + { WM8996_WRITE_SEQUENCER_407, 0x100 }, }; static const DECLARE_TLV_DB_SCALE(inpga_tlv, 0, 100, 0); @@ -1413,8 +1484,7 @@ static const struct snd_soc_dapm_route wm8996_dapm_routes[] = { { "SPKDAT", NULL, "SPKR PGA" }, }; -static int wm8996_readable_register(struct snd_soc_codec *codec, - unsigned int reg) +static bool wm8996_readable_register(struct device *dev, unsigned int reg) { /* Due to the sparseness of the register map the compiler * output from an explicit switch statement ends up being much @@ -1621,8 +1691,7 @@ static int wm8996_readable_register(struct snd_soc_codec *codec, } } -static int wm8996_volatile_register(struct snd_soc_codec *codec, - unsigned int reg) +static bool wm8996_volatile_register(struct device *dev, unsigned int reg) { switch (reg) { case WM8996_SOFTWARE_RESET: @@ -1646,9 +1715,15 @@ static int wm8996_volatile_register(struct snd_soc_codec *codec, } } -static int wm8996_reset(struct snd_soc_codec *codec) +static int wm8996_reset(struct wm8996_priv *wm8996) { - return snd_soc_write(codec, WM8996_SOFTWARE_RESET, 0x8915); + if (wm8996->pdata.ldo_ena > 0) { + gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); + return 0; + } else { + return regmap_write(wm8996->regmap, WM8996_SOFTWARE_RESET, + 0x8915); + } } static const int bclk_divs[] = { @@ -1723,13 +1798,13 @@ static int wm8996_set_bias_level(struct snd_soc_codec *codec, msleep(5); } - codec->cache_only = false; - snd_soc_cache_sync(codec); + regcache_cache_only(codec->control_data, false); + regcache_sync(codec->control_data); } break; case SND_SOC_BIAS_OFF: - codec->cache_only = true; + regcache_cache_only(codec->control_data, true); if (wm8996->pdata.ldo_ena >= 0) gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), @@ -2251,48 +2326,45 @@ static inline struct wm8996_priv *gpio_to_wm8996(struct gpio_chip *chip) static void wm8996_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); - struct snd_soc_codec *codec = wm8996->codec; - snd_soc_update_bits(codec, WM8996_GPIO_1 + offset, - WM8996_GP1_LVL, !!value << WM8996_GP1_LVL_SHIFT); + regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset, + WM8996_GP1_LVL, !!value << WM8996_GP1_LVL_SHIFT); } static int wm8996_gpio_direction_out(struct gpio_chip *chip, unsigned offset, int value) { struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); - struct snd_soc_codec *codec = wm8996->codec; int val; val = (1 << WM8996_GP1_FN_SHIFT) | (!!value << WM8996_GP1_LVL_SHIFT); - return snd_soc_update_bits(codec, WM8996_GPIO_1 + offset, - WM8996_GP1_FN_MASK | WM8996_GP1_DIR | - WM8996_GP1_LVL, val); + return regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset, + WM8996_GP1_FN_MASK | WM8996_GP1_DIR | + WM8996_GP1_LVL, val); } static int wm8996_gpio_get(struct gpio_chip *chip, unsigned offset) { struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); - struct snd_soc_codec *codec = wm8996->codec; + unsigned int reg; int ret; - ret = snd_soc_read(codec, WM8996_GPIO_1 + offset); + ret = regmap_read(wm8996->regmap, WM8996_GPIO_1 + offset, ®); if (ret < 0) return ret; - return (ret & WM8996_GP1_LVL) != 0; + return (reg & WM8996_GP1_LVL) != 0; } static int wm8996_gpio_direction_in(struct gpio_chip *chip, unsigned offset) { struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); - struct snd_soc_codec *codec = wm8996->codec; - return snd_soc_update_bits(codec, WM8996_GPIO_1 + offset, - WM8996_GP1_FN_MASK | WM8996_GP1_DIR, - (1 << WM8996_GP1_FN_SHIFT) | - (1 << WM8996_GP1_DIR_SHIFT)); + return regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset, + WM8996_GP1_FN_MASK | WM8996_GP1_DIR, + (1 << WM8996_GP1_FN_SHIFT) | + (1 << WM8996_GP1_DIR_SHIFT)); } static struct gpio_chip wm8996_template_chip = { @@ -2305,14 +2377,13 @@ static struct gpio_chip wm8996_template_chip = { .can_sleep = 1, }; -static void wm8996_init_gpio(struct snd_soc_codec *codec) +static void wm8996_init_gpio(struct wm8996_priv *wm8996) { - struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); int ret; wm8996->gpio_chip = wm8996_template_chip; wm8996->gpio_chip.ngpio = 5; - wm8996->gpio_chip.dev = codec->dev; + wm8996->gpio_chip.dev = wm8996->dev; if (wm8996->pdata.gpio_base) wm8996->gpio_chip.base = wm8996->pdata.gpio_base; @@ -2321,24 +2392,23 @@ static void wm8996_init_gpio(struct snd_soc_codec *codec) ret = gpiochip_add(&wm8996->gpio_chip); if (ret != 0) - dev_err(codec->dev, "Failed to add GPIOs: %d\n", ret); + dev_err(wm8996->dev, "Failed to add GPIOs: %d\n", ret); } -static void wm8996_free_gpio(struct snd_soc_codec *codec) +static void wm8996_free_gpio(struct wm8996_priv *wm8996) { - struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); int ret; ret = gpiochip_remove(&wm8996->gpio_chip); if (ret != 0) - dev_err(codec->dev, "Failed to remove GPIOs: %d\n", ret); + dev_err(wm8996->dev, "Failed to remove GPIOs: %d\n", ret); } #else -static void wm8996_init_gpio(struct snd_soc_codec *codec) +static void wm8996_init_gpio(struct wm8996_priv *wm8996) { } -static void wm8996_free_gpio(struct snd_soc_codec *codec) +static void wm8996_free_gpio(struct wm8996_priv *wm8996) { } #endif @@ -2692,6 +2762,18 @@ static void wm8996_retune_mobile_pdata(struct snd_soc_codec *codec) "Failed to add ReTune Mobile controls: %d\n", ret); } +static const struct regmap_config wm8996_regmap = { + .reg_bits = 16, + .val_bits = 16, + + .max_register = WM8996_MAX_REGISTER, + .reg_defaults = wm8996_reg, + .num_reg_defaults = ARRAY_SIZE(wm8996_reg), + .volatile_reg = wm8996_volatile_register, + .readable_reg = wm8996_readable_register, + .cache_type = REGCACHE_RBTREE, +}; + static int wm8996_probe(struct snd_soc_codec *codec) { int ret; @@ -2707,19 +2789,11 @@ static int wm8996_probe(struct snd_soc_codec *codec) dapm->idle_bias_off = true; - ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_I2C); - if (ret != 0) { - dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); - goto err; - } - - for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) - wm8996->supplies[i].supply = wm8996_supply_names[i]; + codec->control_data = wm8996->regmap; - ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8996->supplies), - wm8996->supplies); + ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP); if (ret != 0) { - dev_err(codec->dev, "Failed to request supplies: %d\n", ret); + dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); goto err; } @@ -2727,13 +2801,6 @@ static int wm8996_probe(struct snd_soc_codec *codec) wm8996->disable_nb[1].notifier_call = wm8996_regulator_event_1; wm8996->disable_nb[2].notifier_call = wm8996_regulator_event_2; - wm8996->cpvdd = regulator_get(&i2c->dev, "CPVDD"); - if (IS_ERR(wm8996->cpvdd)) { - ret = PTR_ERR(wm8996->cpvdd); - dev_err(&i2c->dev, "Failed to get CPVDD: %d\n", ret); - goto err_get; - } - /* This should really be moved into the regulator core */ for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) { ret = regulator_register_notifier(wm8996->supplies[i].consumer, @@ -2745,50 +2812,7 @@ static int wm8996_probe(struct snd_soc_codec *codec) } } - ret = regulator_bulk_enable(ARRAY_SIZE(wm8996->supplies), - wm8996->supplies); - if (ret != 0) { - dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); - goto err_cpvdd; - } - - if (wm8996->pdata.ldo_ena >= 0) { - gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 1); - msleep(5); - } - - ret = snd_soc_read(codec, WM8996_SOFTWARE_RESET); - if (ret < 0) { - dev_err(codec->dev, "Failed to read ID register: %d\n", ret); - goto err_enable; - } - if (ret != 0x8915) { - dev_err(codec->dev, "Device is not a WM8996, ID %x\n", ret); - ret = -EINVAL; - goto err_enable; - } - - ret = snd_soc_read(codec, WM8996_CHIP_REVISION); - if (ret < 0) { - dev_err(codec->dev, "Failed to read device revision: %d\n", - ret); - goto err_enable; - } - - dev_info(codec->dev, "revision %c\n", - (ret & WM8996_CHIP_REV_MASK) + 'A'); - - if (wm8996->pdata.ldo_ena >= 0) { - gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); - } else { - ret = wm8996_reset(codec); - if (ret < 0) { - dev_err(codec->dev, "Failed to issue reset\n"); - goto err_enable; - } - } - - codec->cache_only = true; + regcache_cache_only(codec->control_data, true); /* Apply platform data settings */ snd_soc_update_bits(codec, WM8996_LINE_INPUT_CONTROL, @@ -2946,10 +2970,6 @@ static int wm8996_probe(struct snd_soc_codec *codec) WM8996_AIF2TX_LRCLK_MODE, WM8996_AIF2TX_LRCLK_MODE); - regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); - - wm8996_init_gpio(codec); - if (i2c->irq) { if (wm8996->pdata.irq_flags) irq_flags = wm8996->pdata.irq_flags; @@ -2987,15 +3007,6 @@ static int wm8996_probe(struct snd_soc_codec *codec) return 0; -err_enable: - if (wm8996->pdata.ldo_ena >= 0) - gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); - - regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); -err_cpvdd: - regulator_put(wm8996->cpvdd); -err_get: - regulator_bulk_free(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); err: return ret; } @@ -3012,8 +3023,6 @@ static int wm8996_remove(struct snd_soc_codec *codec) if (i2c->irq) free_irq(i2c->irq, codec); - wm8996_free_gpio(codec); - for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) regulator_unregister_notifier(wm8996->supplies[i].consumer, &wm8996->disable_nb[i]); @@ -3028,12 +3037,6 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8996 = { .remove = wm8996_remove, .set_bias_level = wm8996_set_bias_level, .seq_notifier = wm8996_seq_notifier, - .reg_cache_size = WM8996_MAX_REGISTER + 1, - .reg_word_size = sizeof(u16), - .reg_cache_default = wm8996_reg, - .volatile_register = wm8996_volatile_register, - .readable_register = wm8996_readable_register, - .compress_type = SND_SOC_RBTREE_COMPRESSION, .controls = wm8996_snd_controls, .num_controls = ARRAY_SIZE(wm8996_snd_controls), .dapm_widgets = wm8996_dapm_widgets, @@ -3098,13 +3101,15 @@ static __devinit int wm8996_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { struct wm8996_priv *wm8996; - int ret; + int ret, i; + unsigned int reg; wm8996 = kzalloc(sizeof(struct wm8996_priv), GFP_KERNEL); if (wm8996 == NULL) return -ENOMEM; i2c_set_clientdata(i2c, wm8996); + wm8996->dev = &i2c->dev; if (dev_get_platdata(&i2c->dev)) memcpy(&wm8996->pdata, dev_get_platdata(&i2c->dev), @@ -3120,14 +3125,93 @@ static __devinit int wm8996_i2c_probe(struct i2c_client *i2c, } } + for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) + wm8996->supplies[i].supply = wm8996_supply_names[i]; + + ret = regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8996->supplies), + wm8996->supplies); + if (ret != 0) { + dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret); + goto err_gpio; + } + + wm8996->cpvdd = regulator_get(&i2c->dev, "CPVDD"); + if (IS_ERR(wm8996->cpvdd)) { + ret = PTR_ERR(wm8996->cpvdd); + dev_err(&i2c->dev, "Failed to get CPVDD: %d\n", ret); + goto err_get; + } + + ret = regulator_bulk_enable(ARRAY_SIZE(wm8996->supplies), + wm8996->supplies); + if (ret != 0) { + dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret); + goto err_cpvdd; + } + + if (wm8996->pdata.ldo_ena > 0) { + gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 1); + msleep(5); + } + + wm8996->regmap = regmap_init_i2c(i2c, &wm8996_regmap); + if (IS_ERR(wm8996->regmap)) { + ret = PTR_ERR(wm8996->regmap); + dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret); + goto err_enable; + } + + ret = regmap_read(wm8996->regmap, WM8996_SOFTWARE_RESET, ®); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to read ID register: %d\n", ret); + goto err_regmap; + } + if (reg != 0x8915) { + dev_err(&i2c->dev, "Device is not a WM8996, ID %x\n", ret); + ret = -EINVAL; + goto err_regmap; + } + + ret = regmap_read(wm8996->regmap, WM8996_CHIP_REVISION, ®); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to read device revision: %d\n", + ret); + goto err_regmap; + } + + dev_info(&i2c->dev, "revision %c\n", + (reg & WM8996_CHIP_REV_MASK) + 'A'); + + regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); + + ret = wm8996_reset(wm8996); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to issue reset\n"); + goto err_regmap; + } + + wm8996_init_gpio(wm8996); + ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_wm8996, wm8996_dai, ARRAY_SIZE(wm8996_dai)); if (ret < 0) - goto err_gpio; + goto err_gpiolib; return ret; +err_gpiolib: + wm8996_free_gpio(wm8996); +err_regmap: + regmap_exit(wm8996->regmap); +err_enable: + if (wm8996->pdata.ldo_ena > 0) + gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); + regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); +err_cpvdd: + regulator_put(wm8996->cpvdd); +err_get: + regulator_bulk_free(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); err_gpio: if (wm8996->pdata.ldo_ena > 0) gpio_free(wm8996->pdata.ldo_ena); @@ -3142,9 +3226,15 @@ static __devexit int wm8996_i2c_remove(struct i2c_client *client) struct wm8996_priv *wm8996 = i2c_get_clientdata(client); snd_soc_unregister_codec(&client->dev); - if (wm8996->pdata.ldo_ena > 0) + wm8996_free_gpio(wm8996); + regulator_put(wm8996->cpvdd); + regulator_bulk_free(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); + regmap_exit(wm8996->regmap); + if (wm8996->pdata.ldo_ena > 0) { + gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); gpio_free(wm8996->pdata.ldo_ena); - kfree(i2c_get_clientdata(client)); + } + kfree(wm8996); return 0; } diff --git a/sound/soc/codecs/wm9081.c b/sound/soc/codecs/wm9081.c index 4a398c3bfe84..f7c0738a9da6 100644 --- a/sound/soc/codecs/wm9081.c +++ b/sound/soc/codecs/wm9081.c @@ -19,6 +19,7 @@ #include <linux/pm.h> #include <linux/i2c.h> #include <linux/platform_device.h> +#include <linux/regmap.h> #include <linux/slab.h> #include <sound/core.h> #include <sound/pcm.h> @@ -30,69 +31,61 @@ #include <sound/wm9081.h> #include "wm9081.h" -static u16 wm9081_reg_defaults[] = { - 0x0000, /* R0 - Software Reset */ - 0x0000, /* R1 */ - 0x00B9, /* R2 - Analogue Lineout */ - 0x00B9, /* R3 - Analogue Speaker PGA */ - 0x0001, /* R4 - VMID Control */ - 0x0068, /* R5 - Bias Control 1 */ - 0x0000, /* R6 */ - 0x0000, /* R7 - Analogue Mixer */ - 0x0000, /* R8 - Anti Pop Control */ - 0x01DB, /* R9 - Analogue Speaker 1 */ - 0x0018, /* R10 - Analogue Speaker 2 */ - 0x0180, /* R11 - Power Management */ - 0x0000, /* R12 - Clock Control 1 */ - 0x0038, /* R13 - Clock Control 2 */ - 0x4000, /* R14 - Clock Control 3 */ - 0x0000, /* R15 */ - 0x0000, /* R16 - FLL Control 1 */ - 0x0200, /* R17 - FLL Control 2 */ - 0x0000, /* R18 - FLL Control 3 */ - 0x0204, /* R19 - FLL Control 4 */ - 0x0000, /* R20 - FLL Control 5 */ - 0x0000, /* R21 */ - 0x0000, /* R22 - Audio Interface 1 */ - 0x0002, /* R23 - Audio Interface 2 */ - 0x0008, /* R24 - Audio Interface 3 */ - 0x0022, /* R25 - Audio Interface 4 */ - 0x0000, /* R26 - Interrupt Status */ - 0x0006, /* R27 - Interrupt Status Mask */ - 0x0000, /* R28 - Interrupt Polarity */ - 0x0000, /* R29 - Interrupt Control */ - 0x00C0, /* R30 - DAC Digital 1 */ - 0x0008, /* R31 - DAC Digital 2 */ - 0x09AF, /* R32 - DRC 1 */ - 0x4201, /* R33 - DRC 2 */ - 0x0000, /* R34 - DRC 3 */ - 0x0000, /* R35 - DRC 4 */ - 0x0000, /* R36 */ - 0x0000, /* R37 */ - 0x0000, /* R38 - Write Sequencer 1 */ - 0x0000, /* R39 - Write Sequencer 2 */ - 0x0002, /* R40 - MW Slave 1 */ - 0x0000, /* R41 */ - 0x0000, /* R42 - EQ 1 */ - 0x0000, /* R43 - EQ 2 */ - 0x0FCA, /* R44 - EQ 3 */ - 0x0400, /* R45 - EQ 4 */ - 0x00B8, /* R46 - EQ 5 */ - 0x1EB5, /* R47 - EQ 6 */ - 0xF145, /* R48 - EQ 7 */ - 0x0B75, /* R49 - EQ 8 */ - 0x01C5, /* R50 - EQ 9 */ - 0x169E, /* R51 - EQ 10 */ - 0xF829, /* R52 - EQ 11 */ - 0x07AD, /* R53 - EQ 12 */ - 0x1103, /* R54 - EQ 13 */ - 0x1C58, /* R55 - EQ 14 */ - 0xF373, /* R56 - EQ 15 */ - 0x0A54, /* R57 - EQ 16 */ - 0x0558, /* R58 - EQ 17 */ - 0x0564, /* R59 - EQ 18 */ - 0x0559, /* R60 - EQ 19 */ - 0x4000, /* R61 - EQ 20 */ +static struct reg_default wm9081_reg[] = { + { 0, 0x9081 }, /* R0 - Software Reset */ + { 2, 0x00B9 }, /* R2 - Analogue Lineout */ + { 3, 0x00B9 }, /* R3 - Analogue Speaker PGA */ + { 4, 0x0001 }, /* R4 - VMID Control */ + { 5, 0x0068 }, /* R5 - Bias Control 1 */ + { 7, 0x0000 }, /* R7 - Analogue Mixer */ + { 8, 0x0000 }, /* R8 - Anti Pop Control */ + { 9, 0x01DB }, /* R9 - Analogue Speaker 1 */ + { 10, 0x0018 }, /* R10 - Analogue Speaker 2 */ + { 11, 0x0180 }, /* R11 - Power Management */ + { 12, 0x0000 }, /* R12 - Clock Control 1 */ + { 13, 0x0038 }, /* R13 - Clock Control 2 */ + { 14, 0x4000 }, /* R14 - Clock Control 3 */ + { 16, 0x0000 }, /* R16 - FLL Control 1 */ + { 17, 0x0200 }, /* R17 - FLL Control 2 */ + { 18, 0x0000 }, /* R18 - FLL Control 3 */ + { 19, 0x0204 }, /* R19 - FLL Control 4 */ + { 20, 0x0000 }, /* R20 - FLL Control 5 */ + { 22, 0x0000 }, /* R22 - Audio Interface 1 */ + { 23, 0x0002 }, /* R23 - Audio Interface 2 */ + { 24, 0x0008 }, /* R24 - Audio Interface 3 */ + { 25, 0x0022 }, /* R25 - Audio Interface 4 */ + { 27, 0x0006 }, /* R27 - Interrupt Status Mask */ + { 28, 0x0000 }, /* R28 - Interrupt Polarity */ + { 29, 0x0000 }, /* R29 - Interrupt Control */ + { 30, 0x00C0 }, /* R30 - DAC Digital 1 */ + { 31, 0x0008 }, /* R31 - DAC Digital 2 */ + { 32, 0x09AF }, /* R32 - DRC 1 */ + { 33, 0x4201 }, /* R33 - DRC 2 */ + { 34, 0x0000 }, /* R34 - DRC 3 */ + { 35, 0x0000 }, /* R35 - DRC 4 */ + { 38, 0x0000 }, /* R38 - Write Sequencer 1 */ + { 39, 0x0000 }, /* R39 - Write Sequencer 2 */ + { 40, 0x0002 }, /* R40 - MW Slave 1 */ + { 42, 0x0000 }, /* R42 - EQ 1 */ + { 43, 0x0000 }, /* R43 - EQ 2 */ + { 44, 0x0FCA }, /* R44 - EQ 3 */ + { 45, 0x0400 }, /* R45 - EQ 4 */ + { 46, 0x00B8 }, /* R46 - EQ 5 */ + { 47, 0x1EB5 }, /* R47 - EQ 6 */ + { 48, 0xF145 }, /* R48 - EQ 7 */ + { 49, 0x0B75 }, /* R49 - EQ 8 */ + { 50, 0x01C5 }, /* R50 - EQ 9 */ + { 51, 0x169E }, /* R51 - EQ 10 */ + { 52, 0xF829 }, /* R52 - EQ 11 */ + { 53, 0x07AD }, /* R53 - EQ 12 */ + { 54, 0x1103 }, /* R54 - EQ 13 */ + { 55, 0x1C58 }, /* R55 - EQ 14 */ + { 56, 0xF373 }, /* R56 - EQ 15 */ + { 57, 0x0A54 }, /* R57 - EQ 16 */ + { 58, 0x0558 }, /* R58 - EQ 17 */ + { 59, 0x0564 }, /* R59 - EQ 18 */ + { 60, 0x0559 }, /* R60 - EQ 19 */ + { 61, 0x4000 }, /* R61 - EQ 20 */ }; static struct { @@ -156,7 +149,7 @@ static struct { }; struct wm9081_priv { - enum snd_soc_control_type control_type; + struct regmap *regmap; int sysclk_source; int mclk_rate; int sysclk_rate; @@ -169,20 +162,84 @@ struct wm9081_priv { struct wm9081_pdata pdata; }; -static int wm9081_volatile_register(struct snd_soc_codec *codec, unsigned int reg) +static bool wm9081_volatile_register(struct device *dev, unsigned int reg) { switch (reg) { case WM9081_SOFTWARE_RESET: case WM9081_INTERRUPT_STATUS: - return 1; + return true; default: - return 0; + return false; + } +} + +static bool wm9081_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case WM9081_SOFTWARE_RESET: + case WM9081_ANALOGUE_LINEOUT: + case WM9081_ANALOGUE_SPEAKER_PGA: + case WM9081_VMID_CONTROL: + case WM9081_BIAS_CONTROL_1: + case WM9081_ANALOGUE_MIXER: + case WM9081_ANTI_POP_CONTROL: + case WM9081_ANALOGUE_SPEAKER_1: + case WM9081_ANALOGUE_SPEAKER_2: + case WM9081_POWER_MANAGEMENT: + case WM9081_CLOCK_CONTROL_1: + case WM9081_CLOCK_CONTROL_2: + case WM9081_CLOCK_CONTROL_3: + case WM9081_FLL_CONTROL_1: + case WM9081_FLL_CONTROL_2: + case WM9081_FLL_CONTROL_3: + case WM9081_FLL_CONTROL_4: + case WM9081_FLL_CONTROL_5: + case WM9081_AUDIO_INTERFACE_1: + case WM9081_AUDIO_INTERFACE_2: + case WM9081_AUDIO_INTERFACE_3: + case WM9081_AUDIO_INTERFACE_4: + case WM9081_INTERRUPT_STATUS: + case WM9081_INTERRUPT_STATUS_MASK: + case WM9081_INTERRUPT_POLARITY: + case WM9081_INTERRUPT_CONTROL: + case WM9081_DAC_DIGITAL_1: + case WM9081_DAC_DIGITAL_2: + case WM9081_DRC_1: + case WM9081_DRC_2: + case WM9081_DRC_3: + case WM9081_DRC_4: + case WM9081_WRITE_SEQUENCER_1: + case WM9081_WRITE_SEQUENCER_2: + case WM9081_MW_SLAVE_1: + case WM9081_EQ_1: + case WM9081_EQ_2: + case WM9081_EQ_3: + case WM9081_EQ_4: + case WM9081_EQ_5: + case WM9081_EQ_6: + case WM9081_EQ_7: + case WM9081_EQ_8: + case WM9081_EQ_9: + case WM9081_EQ_10: + case WM9081_EQ_11: + case WM9081_EQ_12: + case WM9081_EQ_13: + case WM9081_EQ_14: + case WM9081_EQ_15: + case WM9081_EQ_16: + case WM9081_EQ_17: + case WM9081_EQ_18: + case WM9081_EQ_19: + case WM9081_EQ_20: + return true; + default: + return false; } } -static int wm9081_reset(struct snd_soc_codec *codec) +static int wm9081_reset(struct regmap *map) { - return snd_soc_write(codec, WM9081_SOFTWARE_RESET, 0); + return regmap_write(map, WM9081_SOFTWARE_RESET, 0x9081); } static const DECLARE_TLV_DB_SCALE(drc_in_tlv, -4500, 75, 0); @@ -737,6 +794,7 @@ SND_SOC_DAPM_SUPPLY("CLK_SYS", WM9081_CLOCK_CONTROL_3, 0, 0, clk_sys_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), SND_SOC_DAPM_SUPPLY("CLK_DSP", WM9081_CLOCK_CONTROL_3, 1, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("TOCLK", WM9081_CLOCK_CONTROL_3, 2, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("TSENSE", WM9081_POWER_MANAGEMENT, 7, 0, NULL, 0), }; @@ -759,6 +817,7 @@ static const struct snd_soc_dapm_route wm9081_audio_paths[] = { { "Speaker PGA", NULL, "CLK_SYS" }, { "Speaker", NULL, "Speaker PGA" }, + { "Speaker", NULL, "TSENSE" }, { "SPKN", NULL, "Speaker" }, { "SPKP", NULL, "Speaker" }, @@ -767,84 +826,74 @@ static const struct snd_soc_dapm_route wm9081_audio_paths[] = { static int wm9081_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { - u16 reg; - switch (level) { case SND_SOC_BIAS_ON: break; case SND_SOC_BIAS_PREPARE: /* VMID=2*40k */ - reg = snd_soc_read(codec, WM9081_VMID_CONTROL); - reg &= ~WM9081_VMID_SEL_MASK; - reg |= 0x2; - snd_soc_write(codec, WM9081_VMID_CONTROL, reg); + snd_soc_update_bits(codec, WM9081_VMID_CONTROL, + WM9081_VMID_SEL_MASK, 0x2); /* Normal bias current */ - reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1); - reg &= ~WM9081_STBY_BIAS_ENA; - snd_soc_write(codec, WM9081_BIAS_CONTROL_1, reg); + snd_soc_update_bits(codec, WM9081_BIAS_CONTROL_1, + WM9081_STBY_BIAS_ENA, 0); break; case SND_SOC_BIAS_STANDBY: /* Initial cold start */ if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { /* Disable LINEOUT discharge */ - reg = snd_soc_read(codec, WM9081_ANTI_POP_CONTROL); - reg &= ~WM9081_LINEOUT_DISCH; - snd_soc_write(codec, WM9081_ANTI_POP_CONTROL, reg); + snd_soc_update_bits(codec, WM9081_ANTI_POP_CONTROL, + WM9081_LINEOUT_DISCH, 0); /* Select startup bias source */ - reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1); - reg |= WM9081_BIAS_SRC | WM9081_BIAS_ENA; - snd_soc_write(codec, WM9081_BIAS_CONTROL_1, reg); + snd_soc_update_bits(codec, WM9081_BIAS_CONTROL_1, + WM9081_BIAS_SRC | WM9081_BIAS_ENA, + WM9081_BIAS_SRC | WM9081_BIAS_ENA); /* VMID 2*4k; Soft VMID ramp enable */ - reg = snd_soc_read(codec, WM9081_VMID_CONTROL); - reg |= WM9081_VMID_RAMP | 0x6; - snd_soc_write(codec, WM9081_VMID_CONTROL, reg); + snd_soc_update_bits(codec, WM9081_VMID_CONTROL, + WM9081_VMID_RAMP | + WM9081_VMID_SEL_MASK, + WM9081_VMID_RAMP | 0x6); mdelay(100); /* Normal bias enable & soft start off */ - reg &= ~WM9081_VMID_RAMP; - snd_soc_write(codec, WM9081_VMID_CONTROL, reg); + snd_soc_update_bits(codec, WM9081_VMID_CONTROL, + WM9081_VMID_RAMP, 0); /* Standard bias source */ - reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1); - reg &= ~WM9081_BIAS_SRC; - snd_soc_write(codec, WM9081_BIAS_CONTROL_1, reg); + snd_soc_update_bits(codec, WM9081_BIAS_CONTROL_1, + WM9081_BIAS_SRC, 0); } /* VMID 2*240k */ - reg = snd_soc_read(codec, WM9081_VMID_CONTROL); - reg &= ~WM9081_VMID_SEL_MASK; - reg |= 0x04; - snd_soc_write(codec, WM9081_VMID_CONTROL, reg); + snd_soc_update_bits(codec, WM9081_VMID_CONTROL, + WM9081_VMID_SEL_MASK, 0x04); /* Standby bias current on */ - reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1); - reg |= WM9081_STBY_BIAS_ENA; - snd_soc_write(codec, WM9081_BIAS_CONTROL_1, reg); + snd_soc_update_bits(codec, WM9081_BIAS_CONTROL_1, + WM9081_STBY_BIAS_ENA, + WM9081_STBY_BIAS_ENA); break; case SND_SOC_BIAS_OFF: /* Startup bias source and disable bias */ - reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1); - reg |= WM9081_BIAS_SRC; - reg &= ~WM9081_BIAS_ENA; - snd_soc_write(codec, WM9081_BIAS_CONTROL_1, reg); + snd_soc_update_bits(codec, WM9081_BIAS_CONTROL_1, + WM9081_BIAS_SRC | WM9081_BIAS_ENA, + WM9081_BIAS_SRC); /* Disable VMID with soft ramping */ - reg = snd_soc_read(codec, WM9081_VMID_CONTROL); - reg &= ~WM9081_VMID_SEL_MASK; - reg |= WM9081_VMID_RAMP; - snd_soc_write(codec, WM9081_VMID_CONTROL, reg); + snd_soc_update_bits(codec, WM9081_VMID_CONTROL, + WM9081_VMID_RAMP | WM9081_VMID_SEL_MASK, + WM9081_VMID_RAMP); /* Actively discharge LINEOUT */ - reg = snd_soc_read(codec, WM9081_ANTI_POP_CONTROL); - reg |= WM9081_LINEOUT_DISCH; - snd_soc_write(codec, WM9081_ANTI_POP_CONTROL, reg); + snd_soc_update_bits(codec, WM9081_ANTI_POP_CONTROL, + WM9081_LINEOUT_DISCH, + WM9081_LINEOUT_DISCH); break; } @@ -1213,25 +1262,14 @@ static int wm9081_probe(struct snd_soc_codec *codec) int ret; u16 reg; - ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm9081->control_type); + codec->control_data = wm9081->regmap; + + ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP); if (ret != 0) { dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); return ret; } - reg = snd_soc_read(codec, WM9081_SOFTWARE_RESET); - if (reg != 0x9081) { - dev_err(codec->dev, "Device is not a WM9081: ID=0x%x\n", reg); - ret = -EINVAL; - return ret; - } - - ret = wm9081_reset(codec); - if (ret < 0) { - dev_err(codec->dev, "Failed to issue reset\n"); - return ret; - } - reg = 0; if (wm9081->pdata.irq_high) reg |= WM9081_IRQ_POL; @@ -1243,11 +1281,10 @@ static int wm9081_probe(struct snd_soc_codec *codec) wm9081_set_bias_level(codec, SND_SOC_BIAS_STANDBY); /* Enable zero cross by default */ - reg = snd_soc_read(codec, WM9081_ANALOGUE_LINEOUT); - snd_soc_write(codec, WM9081_ANALOGUE_LINEOUT, reg | WM9081_LINEOUTZC); - reg = snd_soc_read(codec, WM9081_ANALOGUE_SPEAKER_PGA); - snd_soc_write(codec, WM9081_ANALOGUE_SPEAKER_PGA, - reg | WM9081_SPKPGAZC); + snd_soc_update_bits(codec, WM9081_ANALOGUE_LINEOUT, + WM9081_LINEOUTZC, WM9081_LINEOUTZC); + snd_soc_update_bits(codec, WM9081_ANALOGUE_SPEAKER_PGA, + WM9081_SPKPGAZC, WM9081_SPKPGAZC); if (!wm9081->pdata.num_retune_configs) { dev_dbg(codec->dev, @@ -1275,15 +1312,9 @@ static int wm9081_suspend(struct snd_soc_codec *codec, pm_message_t state) static int wm9081_resume(struct snd_soc_codec *codec) { - u16 *reg_cache = codec->reg_cache; - int i; - - for (i = 0; i < codec->driver->reg_cache_size; i++) { - if (i == WM9081_SOFTWARE_RESET) - continue; + struct wm9081_priv *wm9081 = snd_soc_codec_get_drvdata(codec); - snd_soc_write(codec, i, reg_cache[i]); - } + regcache_sync(wm9081->regmap); wm9081_set_bias_level(codec, SND_SOC_BIAS_STANDBY); @@ -1303,11 +1334,6 @@ static struct snd_soc_codec_driver soc_codec_dev_wm9081 = { .set_sysclk = wm9081_set_sysclk, .set_bias_level = wm9081_set_bias_level, - .reg_cache_size = ARRAY_SIZE(wm9081_reg_defaults), - .reg_word_size = sizeof(u16), - .reg_cache_default = wm9081_reg_defaults, - .volatile_register = wm9081_volatile_register, - .controls = wm9081_snd_controls, .num_controls = ARRAY_SIZE(wm9081_snd_controls), .dapm_widgets = wm9081_dapm_widgets, @@ -1316,11 +1342,24 @@ static struct snd_soc_codec_driver soc_codec_dev_wm9081 = { .num_dapm_routes = ARRAY_SIZE(wm9081_audio_paths), }; +static const struct regmap_config wm9081_regmap = { + .reg_bits = 8, + .val_bits = 16, + + .max_register = WM9081_MAX_REGISTER, + .reg_defaults = wm9081_reg, + .num_reg_defaults = ARRAY_SIZE(wm9081_reg), + .volatile_reg = wm9081_volatile_register, + .readable_reg = wm9081_readable_register, + .cache_type = REGCACHE_RBTREE, +}; + #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) static __devinit int wm9081_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { struct wm9081_priv *wm9081; + unsigned int reg; int ret; wm9081 = kzalloc(sizeof(struct wm9081_priv), GFP_KERNEL); @@ -1328,7 +1367,30 @@ static __devinit int wm9081_i2c_probe(struct i2c_client *i2c, return -ENOMEM; i2c_set_clientdata(i2c, wm9081); - wm9081->control_type = SND_SOC_I2C; + + wm9081->regmap = regmap_init_i2c(i2c, &wm9081_regmap); + if (IS_ERR(wm9081->regmap)) { + ret = PTR_ERR(wm9081->regmap); + dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret); + goto err; + } + + ret = regmap_read(wm9081->regmap, WM9081_SOFTWARE_RESET, ®); + if (ret != 0) { + dev_err(&i2c->dev, "Failed to read chip ID: %d\n", ret); + goto err_regmap; + } + if (reg != 0x9081) { + dev_err(&i2c->dev, "Device is not a WM9081: ID=0x%x\n", reg); + ret = -EINVAL; + goto err_regmap; + } + + ret = wm9081_reset(wm9081->regmap); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to issue reset\n"); + goto err_regmap; + } if (dev_get_platdata(&i2c->dev)) memcpy(&wm9081->pdata, dev_get_platdata(&i2c->dev), @@ -1337,13 +1399,24 @@ static __devinit int wm9081_i2c_probe(struct i2c_client *i2c, ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_wm9081, &wm9081_dai, 1); if (ret < 0) - kfree(wm9081); + goto err_regmap; + + return 0; + +err_regmap: + regmap_exit(wm9081->regmap); +err: + kfree(wm9081); + return ret; } static __devexit int wm9081_i2c_remove(struct i2c_client *client) { + struct wm9081_priv *wm9081 = i2c_get_clientdata(client); + snd_soc_unregister_codec(&client->dev); + regmap_exit(wm9081->regmap); kfree(i2c_get_clientdata(client)); return 0; } diff --git a/sound/soc/codecs/wm_hubs.c b/sound/soc/codecs/wm_hubs.c index 84f33d4ea2cd..f98170e3eb89 100644 --- a/sound/soc/codecs/wm_hubs.c +++ b/sound/soc/codecs/wm_hubs.c @@ -654,6 +654,7 @@ SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0, SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0, right_speaker_boost, ARRAY_SIZE(right_speaker_boost)), +SND_SOC_DAPM_SUPPLY("TSHUT", WM8993_POWER_MANAGEMENT_2, 14, 0, NULL, 0), SND_SOC_DAPM_PGA("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0, NULL, 0), SND_SOC_DAPM_PGA("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0, @@ -789,10 +790,12 @@ static const struct snd_soc_dapm_route analogue_routes[] = { { "SPKL Driver", NULL, "VMID" }, { "SPKL Driver", NULL, "SPKL Boost" }, { "SPKL Driver", NULL, "CLK_SYS" }, + { "SPKL Driver", NULL, "TSHUT" }, { "SPKR Driver", NULL, "VMID" }, { "SPKR Driver", NULL, "SPKR Boost" }, { "SPKR Driver", NULL, "CLK_SYS" }, + { "SPKR Driver", NULL, "TSHUT" }, { "SPKOUTLP", NULL, "SPKL Driver" }, { "SPKOUTLN", NULL, "SPKL Driver" }, diff --git a/sound/soc/samsung/Kconfig b/sound/soc/samsung/Kconfig index 53aaa69eda03..71f38de18222 100644 --- a/sound/soc/samsung/Kconfig +++ b/sound/soc/samsung/Kconfig @@ -198,3 +198,10 @@ config SND_SOC_SPEYSIDE_WM8962 depends on SND_SOC_SAMSUNG && MACH_WLF_CRAGG_6410 select SND_SAMSUNG_I2S select SND_SOC_WM8962 + +config SND_SOC_LOWLAND + tristate "Audio support for Wolfson Lowland" + depends on SND_SOC_SAMSUNG && MACH_WLF_CRAGG_6410 + select SND_SAMSUNG_I2S + select SND_SOC_WM5100 + select SND_SOC_WM9081 diff --git a/sound/soc/samsung/Makefile b/sound/soc/samsung/Makefile index 8509d3c4366e..7802c25db775 100644 --- a/sound/soc/samsung/Makefile +++ b/sound/soc/samsung/Makefile @@ -40,6 +40,7 @@ snd-soc-smdk-wm8580pcm-objs := smdk_wm8580pcm.o snd-soc-smdk-wm8994pcm-objs := smdk_wm8994pcm.o snd-soc-speyside-objs := speyside.o snd-soc-speyside-wm8962-objs := speyside_wm8962.o +snd-soc-lowland-objs := lowland.o obj-$(CONFIG_SND_SOC_SAMSUNG_JIVE_WM8750) += snd-soc-jive-wm8750.o obj-$(CONFIG_SND_SOC_SAMSUNG_NEO1973_WM8753) += snd-soc-neo1973-wm8753.o @@ -61,3 +62,4 @@ obj-$(CONFIG_SND_SOC_SMDK_WM8580_PCM) += snd-soc-smdk-wm8580pcm.o obj-$(CONFIG_SND_SOC_SMDK_WM8994_PCM) += snd-soc-smdk-wm8994pcm.o obj-$(CONFIG_SND_SOC_SPEYSIDE) += snd-soc-speyside.o obj-$(CONFIG_SND_SOC_SPEYSIDE_WM8962) += snd-soc-speyside-wm8962.o +obj-$(CONFIG_SND_SOC_LOWLAND) += snd-soc-lowland.o diff --git a/sound/soc/samsung/lowland.c b/sound/soc/samsung/lowland.c new file mode 100644 index 000000000000..eff1b4b65df4 --- /dev/null +++ b/sound/soc/samsung/lowland.c @@ -0,0 +1,246 @@ +/* + * Lowland audio support + * + * Copyright 2011 Wolfson Microelectronics + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/jack.h> +#include <linux/gpio.h> +#include <linux/module.h> + +#include "../codecs/wm5100.h" +#include "../codecs/wm9081.h" + +#define MCLK1_RATE (44100 * 512) +#define CLKOUT_RATE (44100 * 256) + +static int lowland_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + struct snd_soc_dai *codec_dai = rtd->codec_dai; + int ret; + + ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S + | SND_SOC_DAIFMT_NB_NF + | SND_SOC_DAIFMT_CBM_CFM); + if (ret < 0) + return ret; + + ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S + | SND_SOC_DAIFMT_NB_NF + | SND_SOC_DAIFMT_CBM_CFM); + if (ret < 0) + return ret; + + return 0; +} + +static struct snd_soc_ops lowland_ops = { + .hw_params = lowland_hw_params, +}; + +static struct snd_soc_jack lowland_headset; + +/* Headset jack detection DAPM pins */ +static struct snd_soc_jack_pin lowland_headset_pins[] = { + { + .pin = "Headphone", + .mask = SND_JACK_HEADPHONE | SND_JACK_LINEOUT, + }, + { + .pin = "Headset Mic", + .mask = SND_JACK_MICROPHONE, + }, +}; + +static int lowland_wm5100_init(struct snd_soc_pcm_runtime *rtd) +{ + struct snd_soc_codec *codec = rtd->codec; + int ret; + + ret = snd_soc_codec_set_sysclk(codec, WM5100_CLK_SYSCLK, + WM5100_CLKSRC_MCLK1, MCLK1_RATE, + SND_SOC_CLOCK_IN); + if (ret < 0) { + pr_err("Failed to set SYSCLK clock source: %d\n", ret); + return ret; + } + + /* Clock OPCLK, used by the other audio components. */ + ret = snd_soc_codec_set_sysclk(codec, WM5100_CLK_OPCLK, 0, + CLKOUT_RATE, 0); + if (ret < 0) { + pr_err("Failed to set OPCLK rate: %d\n", ret); + return ret; + } + + ret = snd_soc_jack_new(codec, "Headset", + SND_JACK_LINEOUT | SND_JACK_HEADSET | + SND_JACK_BTN_0, + &lowland_headset); + if (ret) + return ret; + + ret = snd_soc_jack_add_pins(&lowland_headset, + ARRAY_SIZE(lowland_headset_pins), + lowland_headset_pins); + if (ret) + return ret; + + wm5100_detect(codec, &lowland_headset); + + return 0; +} + +static struct snd_soc_dai_link lowland_dai[] = { + { + .name = "CPU", + .stream_name = "CPU", + .cpu_dai_name = "samsung-i2s.0", + .codec_dai_name = "wm5100-aif1", + .platform_name = "samsung-audio", + .codec_name = "wm5100.1-001a", + .ops = &lowland_ops, + .init = lowland_wm5100_init, + }, + { + .name = "Baseband", + .stream_name = "Baseband", + .cpu_dai_name = "wm5100-aif2", + .codec_dai_name = "wm1250-ev1", + .codec_name = "wm1250-ev1.1-0027", + .ops = &lowland_ops, + .ignore_suspend = 1, + }, +}; + +static int lowland_wm9081_init(struct snd_soc_dapm_context *dapm) +{ + snd_soc_dapm_nc_pin(dapm, "LINEOUT"); + + /* At any time the WM9081 is active it will have this clock */ + return snd_soc_codec_set_sysclk(dapm->codec, WM9081_SYSCLK_MCLK, 0, + CLKOUT_RATE, 0); +} + +static struct snd_soc_aux_dev lowland_aux_dev[] = { + { + .name = "wm9081", + .codec_name = "wm9081.1-006c", + .init = lowland_wm9081_init, + }, +}; + +static struct snd_soc_codec_conf lowland_codec_conf[] = { + { + .dev_name = "wm9081.1-006c", + .name_prefix = "Sub", + }, +}; + +static const struct snd_kcontrol_new controls[] = { + SOC_DAPM_PIN_SWITCH("Main Speaker"), + SOC_DAPM_PIN_SWITCH("Main DMIC"), + SOC_DAPM_PIN_SWITCH("Main AMIC"), + SOC_DAPM_PIN_SWITCH("WM1250 Input"), + SOC_DAPM_PIN_SWITCH("WM1250 Output"), + SOC_DAPM_PIN_SWITCH("Headphone"), +}; + +static struct snd_soc_dapm_widget widgets[] = { + SND_SOC_DAPM_HP("Headphone", NULL), + SND_SOC_DAPM_MIC("Headset Mic", NULL), + + SND_SOC_DAPM_SPK("Main Speaker", NULL), + + SND_SOC_DAPM_MIC("Main AMIC", NULL), + SND_SOC_DAPM_MIC("Main DMIC", NULL), +}; + +static struct snd_soc_dapm_route audio_paths[] = { + { "Sub IN1", NULL, "HPOUT2L" }, + { "Sub IN2", NULL, "HPOUT2R" }, + + { "Main Speaker", NULL, "Sub SPKN" }, + { "Main Speaker", NULL, "Sub SPKP" }, + { "Main Speaker", NULL, "SPKDAT1" }, +}; + +static struct snd_soc_card lowland = { + .name = "Lowland", + .dai_link = lowland_dai, + .num_links = ARRAY_SIZE(lowland_dai), + .aux_dev = lowland_aux_dev, + .num_aux_devs = ARRAY_SIZE(lowland_aux_dev), + .codec_conf = lowland_codec_conf, + .num_configs = ARRAY_SIZE(lowland_codec_conf), + + .controls = controls, + .num_controls = ARRAY_SIZE(controls), + .dapm_widgets = widgets, + .num_dapm_widgets = ARRAY_SIZE(widgets), + .dapm_routes = audio_paths, + .num_dapm_routes = ARRAY_SIZE(audio_paths), +}; + +static __devinit int lowland_probe(struct platform_device *pdev) +{ + struct snd_soc_card *card = &lowland; + int ret; + + card->dev = &pdev->dev; + + ret = snd_soc_register_card(card); + if (ret) { + dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", + ret); + return ret; + } + + return 0; +} + +static int __devexit lowland_remove(struct platform_device *pdev) +{ + struct snd_soc_card *card = platform_get_drvdata(pdev); + + snd_soc_unregister_card(card); + + return 0; +} + +static struct platform_driver lowland_driver = { + .driver = { + .name = "lowland", + .owner = THIS_MODULE, + .pm = &snd_soc_pm_ops, + }, + .probe = lowland_probe, + .remove = __devexit_p(lowland_remove), +}; + +static int __init lowland_audio_init(void) +{ + return platform_driver_register(&lowland_driver); +} +module_init(lowland_audio_init); + +static void __exit lowland_audio_exit(void) +{ + platform_driver_unregister(&lowland_driver); +} +module_exit(lowland_audio_exit); + +MODULE_DESCRIPTION("Lowland audio support"); +MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:lowland"); diff --git a/sound/soc/sh/fsi.c b/sound/soc/sh/fsi.c index 3d7016e128f9..99ed61024166 100644 --- a/sound/soc/sh/fsi.c +++ b/sound/soc/sh/fsi.c @@ -32,7 +32,9 @@ #define REG_DIDT 0x0020 #define REG_DODT 0x0024 #define REG_MUTE_ST 0x0028 +#define REG_OUT_DMAC 0x002C #define REG_OUT_SEL 0x0030 +#define REG_IN_DMAC 0x0038 /* master register */ #define MST_CLK_RST 0x0210 @@ -235,13 +237,13 @@ static void __fsi_reg_mask_set(u32 __iomem *reg, u32 mask, u32 data) } #define fsi_reg_write(p, r, d)\ - __fsi_reg_write((u32)(p->base + REG_##r), d) + __fsi_reg_write((p->base + REG_##r), d) #define fsi_reg_read(p, r)\ - __fsi_reg_read((u32)(p->base + REG_##r)) + __fsi_reg_read((p->base + REG_##r)) #define fsi_reg_mask_set(p, r, m, d)\ - __fsi_reg_mask_set((u32)(p->base + REG_##r), m, d) + __fsi_reg_mask_set((p->base + REG_##r), m, d) #define fsi_master_read(p, r) _fsi_master_read(p, MST_##r) #define fsi_core_read(p, r) _fsi_master_read(p, p->core->r) @@ -886,6 +888,8 @@ static int fsi_hw_startup(struct fsi_priv *fsi, int is_play, struct device *dev) { + struct fsi_master *master = fsi_get_master(fsi); + int fsi_ver = master->core->ver; u32 flags = fsi_get_info_flags(fsi); u32 data = 0; @@ -920,6 +924,17 @@ static int fsi_hw_startup(struct fsi_priv *fsi, fsi_reg_mask_set(fsi, OUT_SEL, DMMD, DMMD); } + /* + * FIXME + * + * FSI driver assumed that data package is in-back. + * FSI2 chip can select it. + */ + if (fsi_ver >= 2) { + fsi_reg_write(fsi, OUT_DMAC, (1 << 4)); + fsi_reg_write(fsi, IN_DMAC, (1 << 4)); + } + /* irq clear */ fsi_irq_disable(fsi, is_play); fsi_irq_clear_status(fsi); diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index ee15337353fa..49aa71e0d7e6 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -319,7 +319,8 @@ static int soc_pcm_close(struct snd_pcm_substream *substream) cpu_dai->runtime = NULL; if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - if (unlikely(codec->ignore_pmdown_time)) { + if (codec->ignore_pmdown_time || + rtd->dai_link->ignore_pmdown_time) { /* powered down playback stream now */ snd_soc_dapm_stream_event(rtd, codec_dai->driver->playback.stream_name, |