diff options
58 files changed, 6370 insertions, 2252 deletions
diff --git a/Documentation/devicetree/bindings/gpio/gpio_oxnas.txt b/Documentation/devicetree/bindings/gpio/gpio_oxnas.txt new file mode 100644 index 000000000000..928ed4f43907 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio_oxnas.txt @@ -0,0 +1,47 @@ +* Oxford Semiconductor OXNAS SoC GPIO Controller + +Please refer to gpio.txt for generic information regarding GPIO bindings. + +Required properties: + - compatible: "oxsemi,ox810se-gpio" + - reg: Base address and length for the device. + - interrupts: The port interrupt shared by all pins. + - gpio-controller: Marks the port as GPIO controller. + - #gpio-cells: Two. The first cell is the pin number and + the second cell is used to specify the gpio polarity as defined in + defined in <dt-bindings/gpio/gpio.h>: + 0 = GPIO_ACTIVE_HIGH + 1 = GPIO_ACTIVE_LOW + - interrupt-controller: Marks the device node as an interrupt controller. + - #interrupt-cells: Two. The first cell is the GPIO number and second cell + is used to specify the trigger type as defined in + <dt-bindings/interrupt-controller/irq.h>: + IRQ_TYPE_EDGE_RISING + IRQ_TYPE_EDGE_FALLING + IRQ_TYPE_EDGE_BOTH + - gpio-ranges: Interaction with the PINCTRL subsystem, it also specifies the + gpio base and count, should be in the format of numeric-gpio-range as + specified in the gpio.txt file. + +Example: + +gpio0: gpio@0 { + compatible = "oxsemi,ox810se-gpio"; + reg = <0x000000 0x100000>; + interrupts = <21>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&pinctrl 0 0 32>; +}; + +keys { + ... + + button-esc { + label = "ESC"; + linux,code = <1>; + gpios = <&gpio0 12 0>; + }; +}; diff --git a/Documentation/devicetree/bindings/pinctrl/oxnas,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/oxnas,pinctrl.txt new file mode 100644 index 000000000000..d6074321f730 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/oxnas,pinctrl.txt @@ -0,0 +1,57 @@ +* Oxford Semiconductor OXNAS SoC Family Pin Controller + +Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and +../interrupt-controller/interrupts.txt for generic information regarding +pin controller, GPIO, and interrupt bindings. + +OXNAS 'pin configuration node' is a node of a group of pins which can be +used for a specific device or function. This node represents configurations of +pins, optional function, and optional mux related configuration. + +Required properties for pin controller node: + - compatible: "oxsemi,ox810se-pinctrl" + - oxsemi,sys-ctrl: a phandle to the system controller syscon node + +Required properties for pin configuration sub-nodes: + - pins: List of pins to which the configuration applies. + +Optional properties for pin configuration sub-nodes: +---------------------------------------------------- + - function: Mux function for the specified pins. + - bias-pull-up: Enable weak pull-up. + +Example: + +pinctrl: pinctrl { + compatible = "oxsemi,ox810se-pinctrl"; + + /* Regmap for sys registers */ + oxsemi,sys-ctrl = <&sys>; + + pinctrl_uart2: pinctrl_uart2 { + uart2a { + pins = "gpio31"; + function = "fct3"; + }; + uart2b { + pins = "gpio32"; + function = "fct3"; + }; + }; +}; + +uart2: serial@900000 { + compatible = "ns16550a"; + reg = <0x900000 0x100000>; + clocks = <&sysclk>; + interrupts = <29>; + reg-shift = <0>; + fifo-size = <16>; + reg-io-width = <1>; + current-speed = <115200>; + no-loopback-test; + status = "disabled"; + resets = <&reset 22>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; +}; diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-max77620.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-max77620.txt new file mode 100644 index 000000000000..ad4fce3552bb --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-max77620.txt @@ -0,0 +1,127 @@ +Pincontrol driver for MAX77620 Power management IC from Maxim Semiconductor. + +Device has 8 GPIO pins which can be configured as GPIO as well as the +special IO functions. + +Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt> +for details of the common pinctrl bindings used by client devices, +including the meaning of the phrase "pin configuration node". + +Optional Pinmux properties: +-------------------------- +Following properties are required if default setting of pins are required +at boot. +- pinctrl-names: A pinctrl state named per <pinctrl-binding.txt>. +- pinctrl[0...n]: Properties to contain the phandle for pinctrl states per + <pinctrl-binding.txt>. + +The pin configurations are defined as child of the pinctrl states node. Each +sub-node have following properties: + +Required properties: +------------------ +- pins: List of pins. Valid values of pins properties are: + gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7. + +Optional properties: +------------------- +Following are optional properties defined as pinmux DT binding document +<pinctrl-bindings.txt>. Absence of properties will leave the configuration +on default. + function, + drive-push-pull, + drive-open-drain, + bias-pull-up, + bias-pull-down. + +Valid values for function properties are: + gpio, lpm-control-in, fps-out, 32k-out, sd0-dvs-in, sd1-dvs-in, + reference-out + +Theres is also customised properties for the GPIO1, GPIO2 and GPIO3. These +customised properties are required to configure FPS configuration parameters +of these GPIOs. Please refer <devicetree/bindings/mfd/max77620.txt> for more +detail of Flexible Power Sequence (FPS). + +- maxim,active-fps-source: FPS source for the GPIOs to get + enabled/disabled when system is in + active state. Valid values are: + - MAX77620_FPS_SRC_0, + FPS source is FPS0. + - MAX77620_FPS_SRC_1, + FPS source is FPS1 + - MAX77620_FPS_SRC_2 and + FPS source is FPS2 + - MAX77620_FPS_SRC_NONE. + GPIO is not controlled + by FPS events and it gets + enabled/disabled by register + access. + Absence of this property will leave + the FPS configuration register for that + GPIO to default configuration. + +- maxim,active-fps-power-up-slot: Sequencing event slot number on which + the GPIO get enabled when + master FPS input event set to HIGH. + Valid values are 0 to 7. + This is applicable if FPS source is + selected as FPS0, FPS1 or FPS2. + +- maxim,active-fps-power-down-slot: Sequencing event slot number on which + the GPIO get disabled when master + FPS input event set to LOW. + Valid values are 0 to 7. + This is applicable if FPS source is + selected as FPS0, FPS1 or FPS2. + +- maxim,suspend-fps-source: This is same as property + "maxim,active-fps-source" but value + get configured when system enters in + to suspend state. + +- maxim,suspend-fps-power-up-slot: This is same as property + "maxim,active-fps-power-up-slot" but + this value get configured into FPS + configuration register when system + enters into suspend. + This is applicable if suspend state + FPS source is selected as FPS0, FPS1 or + +- maxim,suspend-fps-power-down-slot: This is same as property + "maxim,active-fps-power-down-slot" but + this value get configured into FPS + configuration register when system + enters into suspend. + This is applicable if suspend state + FPS source is selected as FPS0, FPS1 or + FPS2. + +Example: +-------- +#include <dt-bindings/mfd/max77620.h> +... +max77620@3c { + + pinctrl-names = "default"; + pinctrl-0 = <&spmic_default>; + + spmic_default: pinmux@0 { + pin_gpio0 { + pins = "gpio0"; + function = "gpio"; + }; + + pin_gpio1 { + pins = "gpio1"; + function = "fps-out"; + maxim,active-fps-source = <MAX77620_FPS_SRC_0>; + }; + + pin_gpio2 { + pins = "gpio2"; + function = "fps-out"; + maxim,active-fps-source = <MAX77620_FPS_SRC_1>; + }; + }; +}; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt index d74e631e10da..b484ba1af78c 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt @@ -9,6 +9,7 @@ of PMIC's from Qualcomm. Definition: Should contain one of: "qcom,pm8018-mpp", "qcom,pm8038-mpp", + "qcom,pm8058-mpp", "qcom,pm8821-mpp", "qcom,pm8841-mpp", "qcom,pm8916-mpp", diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt index 4976389e432d..0d3b9ce0a0b9 100644 --- a/Documentation/pinctrl.txt +++ b/Documentation/pinctrl.txt @@ -286,13 +286,13 @@ see the section named "pin control requests from drivers" and "drivers needing both pin control and GPIOs" below for details. But in some situations a cross-subsystem mapping between pins and GPIOs is needed. -Since the pin controller subsystem have its pinspace local to the pin -controller we need a mapping so that the pin control subsystem can figure out -which pin controller handles control of a certain GPIO pin. Since a single -pin controller may be muxing several GPIO ranges (typically SoCs that have -one set of pins, but internally several GPIO silicon blocks, each modelled as -a struct gpio_chip) any number of GPIO ranges can be added to a pin controller -instance like this: +Since the pin controller subsystem has its pinspace local to the pin controller +we need a mapping so that the pin control subsystem can figure out which pin +controller handles control of a certain GPIO pin. Since a single pin controller +may be muxing several GPIO ranges (typically SoCs that have one set of pins, +but internally several GPIO silicon blocks, each modelled as a struct +gpio_chip) any number of GPIO ranges can be added to a pin controller instance +like this: struct gpio_chip chip_a; struct gpio_chip chip_b; @@ -493,12 +493,12 @@ Definitions: - The combination of a FUNCTION and a PIN GROUP determine a certain function for a certain set of pins. The knowledge of the functions and pin groups and their machine-specific particulars are kept inside the pinmux driver, - from the outside only the enumerators are known, and the driver core can: + from the outside only the enumerators are known, and the driver core can + request: - - Request the name of a function with a certain selector (>= 0) + - The name of a function with a certain selector (>= 0) - A list of groups associated with a certain function - - Request that a certain group in that list to be activated for a certain - function + - That a certain group in that list to be activated for a certain function As already described above, pin groups are in turn self-descriptive, so the core will retrieve the actual pin range in a certain group from the @@ -831,7 +831,7 @@ separate memory range only intended for GPIO driving, and the register range dealing with pin config and pin multiplexing get placed into a different memory range and a separate section of the data sheet. -A flag "strict" in struct pinctrl_desc is available to check and deny +A flag "strict" in struct pinmux_ops is available to check and deny simultaneous access to the same pin from GPIO and pin multiplexing consumers on hardware of this type. The pinctrl driver should set this flag accordingly. diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index fb8200b8e8ec..b3fe1d339632 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -35,7 +35,7 @@ config PINCTRL_ADI2 machine and arch are selected to build. config PINCTRL_AS3722 - bool "Pinctrl and GPIO driver for ams AS3722 PMIC" + tristate "Pinctrl and GPIO driver for ams AS3722 PMIC" depends on MFD_AS3722 && GPIOLIB select PINMUX select GENERIC_PINCONF @@ -129,6 +129,17 @@ config PINCTRL_MESON select OF_GPIO select REGMAP_MMIO +config PINCTRL_OXNAS + bool + depends on OF + select PINMUX + select PINCONF + select GENERIC_PINCONF + select GPIOLIB + select OF_GPIO + select GPIOLIB_IRQCHIP + select MFD_SYSCON + config PINCTRL_ROCKCHIP bool select PINMUX @@ -196,8 +207,19 @@ config PINCTRL_COH901 COH 901 335 and COH 901 571/3. They contain 3, 5 or 7 ports of 8 GPIO pins each. +config PINCTRL_MAX77620 + tristate "MAX77620/MAX20024 Pincontrol support" + depends on MFD_MAX77620 + select PINMUX + select GENERIC_PINCONF + help + Say Yes here to enable Pin control support for Maxim PMIC MAX77620. + This PMIC has 8 GPIO pins that work as GPIO as well as special + function in alternate mode. This driver also configure push-pull, + open drain, FPS slots etc. + config PINCTRL_PALMAS - bool "Pinctrl driver for the PALMAS Series MFD devices" + tristate "Pinctrl driver for the PALMAS Series MFD devices" depends on OF && MFD_PALMAS select PINMUX select GENERIC_PINCONF diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index e4bc1151e04f..0c7f8ce4426a 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -16,7 +16,9 @@ obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o obj-$(CONFIG_PINCTRL_AMD) += pinctrl-amd.o obj-$(CONFIG_PINCTRL_DIGICOLOR) += pinctrl-digicolor.o obj-$(CONFIG_PINCTRL_FALCON) += pinctrl-falcon.o +obj-$(CONFIG_PINCTRL_MAX77620) += pinctrl-max77620.o obj-$(CONFIG_PINCTRL_MESON) += meson/ +obj-$(CONFIG_PINCTRL_OXNAS) += pinctrl-oxnas.o obj-$(CONFIG_PINCTRL_PALMAS) += pinctrl-palmas.o obj-$(CONFIG_PINCTRL_PIC32) += pinctrl-pic32.o obj-$(CONFIG_PINCTRL_PISTACHIO) += pinctrl-pistachio.o @@ -35,7 +37,7 @@ obj-$(CONFIG_PINCTRL_TB10X) += pinctrl-tb10x.o obj-$(CONFIG_PINCTRL_ST) += pinctrl-st.o obj-$(CONFIG_PINCTRL_ZYNQ) += pinctrl-zynq.o -obj-$(CONFIG_ARCH_BCM) += bcm/ +obj-y += bcm/ obj-$(CONFIG_PINCTRL_BERLIN) += berlin/ obj-y += freescale/ obj-$(CONFIG_X86) += intel/ diff --git a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c b/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c index a8b37a9a8230..35783db1c10b 100644 --- a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c +++ b/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c @@ -458,13 +458,15 @@ static int nsp_gpio_get_strength(struct nsp_gpio *chip, unsigned gpio, return 0; } -int nsp_pin_config_group_get(struct pinctrl_dev *pctldev, unsigned selector, +static int nsp_pin_config_group_get(struct pinctrl_dev *pctldev, + unsigned selector, unsigned long *config) { return 0; } -int nsp_pin_config_group_set(struct pinctrl_dev *pctldev, unsigned selector, +static int nsp_pin_config_group_set(struct pinctrl_dev *pctldev, + unsigned selector, unsigned long *configs, unsigned num_configs) { return 0; diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c index 98d2a1bb44cb..fb38e208f32d 100644 --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c @@ -225,13 +225,14 @@ static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, } static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, - unsigned number, const char *name) + const struct pinctrl_pin_desc *pin) { struct pin_desc *pindesc; - pindesc = pin_desc_get(pctldev, number); + pindesc = pin_desc_get(pctldev, pin->number); if (pindesc != NULL) { - dev_err(pctldev->dev, "pin %d already registered\n", number); + dev_err(pctldev->dev, "pin %d already registered\n", + pin->number); return -EINVAL; } @@ -245,10 +246,10 @@ static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, pindesc->pctldev = pctldev; /* Copy basic pin info */ - if (name) { - pindesc->name = name; + if (pin->name) { + pindesc->name = pin->name; } else { - pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number); + pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", pin->number); if (pindesc->name == NULL) { kfree(pindesc); return -ENOMEM; @@ -256,9 +257,11 @@ static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, pindesc->dynamic_name = true; } - radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc); + pindesc->drv_data = pin->drv_data; + + radix_tree_insert(&pctldev->pin_desc_tree, pin->number, pindesc); pr_debug("registered pin %d (%s) on %s\n", - number, pindesc->name, pctldev->desc->name); + pin->number, pindesc->name, pctldev->desc->name); return 0; } @@ -270,8 +273,7 @@ static int pinctrl_register_pins(struct pinctrl_dev *pctldev, int ret = 0; for (i = 0; i < num_descs; i++) { - ret = pinctrl_register_one_pin(pctldev, - pins[i].number, pins[i].name); + ret = pinctrl_register_one_pin(pctldev, &pins[i]); if (ret) return ret; } @@ -1367,8 +1369,7 @@ static int pinctrl_pins_show(struct seq_file *s, void *what) if (desc == NULL) continue; - seq_printf(s, "pin %d (%s) ", pin, - desc->name ? desc->name : "unnamed"); + seq_printf(s, "pin %d (%s) ", pin, desc->name); /* Driver-specific info per pin */ if (ops->pin_dbg_show) diff --git a/drivers/pinctrl/core.h b/drivers/pinctrl/core.h index ca08723b9ee1..747c423c11f3 100644 --- a/drivers/pinctrl/core.h +++ b/drivers/pinctrl/core.h @@ -134,6 +134,7 @@ struct pinctrl_setting { * @name: a name for the pin, e.g. the name of the pin/pad/finger on a * datasheet or such * @dynamic_name: if the name of this pin was dynamically allocated + * @drv_data: driver-defined per-pin data. pinctrl core does not touch this * @mux_usecount: If zero, the pin is not claimed, and @owner should be NULL. * If non-zero, this pin is claimed by @owner. This field is an integer * rather than a boolean, since pinctrl_get() might process multiple @@ -148,6 +149,7 @@ struct pin_desc { struct pinctrl_dev *pctldev; const char *name; bool dynamic_name; + void *drv_data; /* These fields only added when supporting pinmux drivers */ #ifdef CONFIG_PINMUX unsigned mux_usecount; diff --git a/drivers/pinctrl/devicetree.c b/drivers/pinctrl/devicetree.c index fe04e748dfe4..54dad89fc9bf 100644 --- a/drivers/pinctrl/devicetree.c +++ b/drivers/pinctrl/devicetree.c @@ -195,8 +195,13 @@ int pinctrl_dt_to_map(struct pinctrl *p) propname = kasprintf(GFP_KERNEL, "pinctrl-%d", state); prop = of_find_property(np, propname, &size); kfree(propname); - if (!prop) + if (!prop) { + if (state == 0) { + of_node_put(np); + return -ENODEV; + } break; + } list = prop->value; size /= sizeof(*list); diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c index 47ccfcc8a647..0dddbb30dc9f 100644 --- a/drivers/pinctrl/freescale/pinctrl-imx.c +++ b/drivers/pinctrl/freescale/pinctrl-imx.c @@ -46,7 +46,7 @@ struct imx_pinctrl { const struct imx_pinctrl_soc_info *info; }; -static const inline struct imx_pin_group *imx_pinctrl_find_group_by_name( +static inline const struct imx_pin_group *imx_pinctrl_find_group_by_name( const struct imx_pinctrl_soc_info *info, const char *name) { @@ -513,13 +513,6 @@ static const struct pinconf_ops imx_pinconf_ops = { .pin_config_group_dbg_show = imx_pinconf_group_dbg_show, }; -static struct pinctrl_desc imx_pinctrl_desc = { - .pctlops = &imx_pctrl_ops, - .pmxops = &imx_pmx_ops, - .confops = &imx_pinconf_ops, - .owner = THIS_MODULE, -}; - /* * Each pin represented in fsl,pins consists of 5 u32 PIN_FUNC_ID and * 1 u32 CONFIG, so 24 types in total for each pin. @@ -722,6 +715,7 @@ int imx_pinctrl_probe(struct platform_device *pdev, { struct regmap_config config = { .name = "gpr" }; struct device_node *dev_np = pdev->dev.of_node; + struct pinctrl_desc *imx_pinctrl_desc; struct device_node *np; struct imx_pinctrl *ipctl; struct resource *res; @@ -776,9 +770,18 @@ int imx_pinctrl_probe(struct platform_device *pdev, } } - imx_pinctrl_desc.name = dev_name(&pdev->dev); - imx_pinctrl_desc.pins = info->pins; - imx_pinctrl_desc.npins = info->npins; + imx_pinctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*imx_pinctrl_desc), + GFP_KERNEL); + if (!imx_pinctrl_desc) + return -ENOMEM; + + imx_pinctrl_desc->name = dev_name(&pdev->dev); + imx_pinctrl_desc->pins = info->pins; + imx_pinctrl_desc->npins = info->npins; + imx_pinctrl_desc->pctlops = &imx_pctrl_ops, + imx_pinctrl_desc->pmxops = &imx_pmx_ops, + imx_pinctrl_desc->confops = &imx_pinconf_ops, + imx_pinctrl_desc->owner = THIS_MODULE, ret = imx_pinctrl_probe_dt(pdev, info); if (ret) { @@ -789,7 +792,8 @@ int imx_pinctrl_probe(struct platform_device *pdev, ipctl->info = info; ipctl->dev = info->dev; platform_set_drvdata(pdev, ipctl); - ipctl->pctl = devm_pinctrl_register(&pdev->dev, &imx_pinctrl_desc, ipctl); + ipctl->pctl = devm_pinctrl_register(&pdev->dev, + imx_pinctrl_desc, ipctl); if (IS_ERR(ipctl->pctl)) { dev_err(&pdev->dev, "could not register IMX pinctrl driver\n"); return PTR_ERR(ipctl->pctl); diff --git a/drivers/pinctrl/freescale/pinctrl-imx1-core.c b/drivers/pinctrl/freescale/pinctrl-imx1-core.c index b4400cb19b61..38d39388d7a4 100644 --- a/drivers/pinctrl/freescale/pinctrl-imx1-core.c +++ b/drivers/pinctrl/freescale/pinctrl-imx1-core.c @@ -157,7 +157,7 @@ static int imx1_read_bit(struct imx1_pinctrl *ipctl, unsigned int pin_id, return !!(readl(reg) & BIT(offset)); } -static const inline struct imx1_pin_group *imx1_pinctrl_find_group_by_name( +static inline const struct imx1_pin_group *imx1_pinctrl_find_group_by_name( const struct imx1_pinctrl_soc_info *info, const char *name) { diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index 677a811b3a6f..b2df03e9e431 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c @@ -15,7 +15,6 @@ */ #include <linux/kernel.h> -#include <linux/module.h> #include <linux/init.h> #include <linux/types.h> #include <linux/bitops.h> @@ -1822,17 +1821,6 @@ static int byt_pinctrl_probe(struct platform_device *pdev) return 0; } -static int byt_pinctrl_remove(struct platform_device *pdev) -{ - struct byt_gpio *vg = platform_get_drvdata(pdev); - - pm_runtime_disable(&pdev->dev); - gpiochip_remove(&vg->chip); - pinctrl_unregister(vg->pctl_dev); - - return 0; -} - #ifdef CONFIG_PM_SLEEP static int byt_gpio_suspend(struct device *dev) { @@ -1930,10 +1918,11 @@ static const struct dev_pm_ops byt_gpio_pm_ops = { static struct platform_driver byt_gpio_driver = { .probe = byt_pinctrl_probe, - .remove = byt_pinctrl_remove, .driver = { - .name = "byt_gpio", - .pm = &byt_gpio_pm_ops, + .name = "byt_gpio", + .pm = &byt_gpio_pm_ops, + .suppress_bind_attrs = true, + .acpi_match_table = ACPI_PTR(byt_gpio_acpi_match), }, }; @@ -1943,9 +1932,3 @@ static int __init byt_gpio_init(void) return platform_driver_register(&byt_gpio_driver); } subsys_initcall(byt_gpio_init); - -static void __exit byt_gpio_exit(void) -{ - platform_driver_unregister(&byt_gpio_driver); -} -module_exit(byt_gpio_exit); diff --git a/drivers/pinctrl/intel/pinctrl-broxton.c b/drivers/pinctrl/intel/pinctrl-broxton.c index 5979d38c46b2..59cb7a6fc5be 100644 --- a/drivers/pinctrl/intel/pinctrl-broxton.c +++ b/drivers/pinctrl/intel/pinctrl-broxton.c @@ -1,7 +1,7 @@ /* * Intel Broxton SoC pinctrl/GPIO driver * - * Copyright (C) 2015, Intel Corporation + * Copyright (C) 2015, 2016 Intel Corporation * Author: Mika Westerberg <mika.westerberg@linux.intel.com> * * This program is free software; you can redistribute it and/or modify @@ -1003,29 +1003,46 @@ static const struct acpi_device_id bxt_pinctrl_acpi_match[] = { }; MODULE_DEVICE_TABLE(acpi, bxt_pinctrl_acpi_match); +static const struct platform_device_id bxt_pinctrl_platform_ids[] = { + { "apl-pinctrl", (kernel_ulong_t)&apl_pinctrl_soc_data }, + { "broxton-pinctrl", (kernel_ulong_t)&bxt_pinctrl_soc_data }, + { }, +}; + static int bxt_pinctrl_probe(struct platform_device *pdev) { const struct intel_pinctrl_soc_data *soc_data = NULL; const struct intel_pinctrl_soc_data **soc_table; - const struct acpi_device_id *id; struct acpi_device *adev; int i; adev = ACPI_COMPANION(&pdev->dev); - if (!adev) - return -ENODEV; + if (adev) { + const struct acpi_device_id *id; - id = acpi_match_device(bxt_pinctrl_acpi_match, &pdev->dev); - if (!id) - return -ENODEV; + id = acpi_match_device(bxt_pinctrl_acpi_match, &pdev->dev); + if (!id) + return -ENODEV; - soc_table = (const struct intel_pinctrl_soc_data **)id->driver_data; + soc_table = (const struct intel_pinctrl_soc_data **) + id->driver_data; - for (i = 0; soc_table[i]; i++) { - if (!strcmp(adev->pnp.unique_id, soc_table[i]->uid)) { - soc_data = soc_table[i]; - break; + for (i = 0; soc_table[i]; i++) { + if (!strcmp(adev->pnp.unique_id, soc_table[i]->uid)) { + soc_data = soc_table[i]; + break; + } } + } else { + const struct platform_device_id *pid; + + pid = platform_get_device_id(pdev); + if (!pid) + return -ENODEV; + + soc_table = (const struct intel_pinctrl_soc_data **) + pid->driver_data; + soc_data = soc_table[pdev->id]; } if (!soc_data) @@ -1047,6 +1064,7 @@ static struct platform_driver bxt_pinctrl_driver = { .acpi_match_table = bxt_pinctrl_acpi_match, .pm = &bxt_pinctrl_pm_ops, }, + .id_table = bxt_pinctrl_platform_ids, }; static int __init bxt_pinctrl_init(void) @@ -1064,3 +1082,4 @@ module_exit(bxt_pinctrl_exit); MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>"); MODULE_DESCRIPTION("Intel Broxton SoC pinctrl/GPIO driver"); MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:broxton-pinctrl"); diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index ac4f564f1c3e..5749a4eee746 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c @@ -160,7 +160,6 @@ struct chv_pin_context { * @pctldev: Pointer to the pin controller device * @chip: GPIO chip in this pin controller * @regs: MMIO registers - * @lock: Lock to serialize register accesses * @intr_lines: Stores mapping between 16 HW interrupt wires and GPIO * offset (in GPIO number space) * @community: Community this pinctrl instance represents @@ -174,7 +173,6 @@ struct chv_pinctrl { struct pinctrl_dev *pctldev; struct gpio_chip chip; void __iomem *regs; - raw_spinlock_t lock; unsigned intr_lines[16]; const struct chv_community *community; u32 saved_intmask; @@ -657,6 +655,17 @@ static const struct chv_community *chv_communities[] = { &southeast_community, }; +/* + * Lock to serialize register accesses + * + * Due to a silicon issue, a shared lock must be used to prevent + * concurrent accesses across the 4 GPIO controllers. + * + * See Intel Atom Z8000 Processor Series Specification Update (Rev. 005), + * errata #CHT34, for further information. + */ +static DEFINE_RAW_SPINLOCK(chv_lock); + static void __iomem *chv_padreg(struct chv_pinctrl *pctrl, unsigned offset, unsigned reg) { @@ -718,13 +727,13 @@ static void chv_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, u32 ctrl0, ctrl1; bool locked; - raw_spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&chv_lock, flags); ctrl0 = readl(chv_padreg(pctrl, offset, CHV_PADCTRL0)); ctrl1 = readl(chv_padreg(pctrl, offset, CHV_PADCTRL1)); locked = chv_pad_locked(pctrl, offset); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); if (ctrl0 & CHV_PADCTRL0_GPIOEN) { seq_puts(s, "GPIO "); @@ -787,14 +796,14 @@ static int chv_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned function, grp = &pctrl->community->groups[group]; - raw_spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&chv_lock, flags); /* Check first that the pad is not locked */ for (i = 0; i < grp->npins; i++) { if (chv_pad_locked(pctrl, grp->pins[i])) { dev_warn(pctrl->dev, "unable to set mode for locked pin %u\n", grp->pins[i]); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); return -EBUSY; } } @@ -837,7 +846,7 @@ static int chv_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned function, pin, altfunc->mode, altfunc->invert_oe ? "" : "not "); } - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); return 0; } @@ -851,13 +860,13 @@ static int chv_gpio_request_enable(struct pinctrl_dev *pctldev, void __iomem *reg; u32 value; - raw_spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&chv_lock, flags); if (chv_pad_locked(pctrl, offset)) { value = readl(chv_padreg(pctrl, offset, CHV_PADCTRL0)); if (!(value & CHV_PADCTRL0_GPIOEN)) { /* Locked so cannot enable */ - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); return -EBUSY; } } else { @@ -897,7 +906,7 @@ static int chv_gpio_request_enable(struct pinctrl_dev *pctldev, chv_writel(value, reg); } - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); return 0; } @@ -911,13 +920,13 @@ static void chv_gpio_disable_free(struct pinctrl_dev *pctldev, void __iomem *reg; u32 value; - raw_spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&chv_lock, flags); reg = chv_padreg(pctrl, offset, CHV_PADCTRL0); value = readl(reg) & ~CHV_PADCTRL0_GPIOEN; chv_writel(value, reg); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); } static int chv_gpio_set_direction(struct pinctrl_dev *pctldev, @@ -929,7 +938,7 @@ static int chv_gpio_set_direction(struct pinctrl_dev *pctldev, unsigned long flags; u32 ctrl0; - raw_spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&chv_lock, flags); ctrl0 = readl(reg) & ~CHV_PADCTRL0_GPIOCFG_MASK; if (input) @@ -938,7 +947,7 @@ static int chv_gpio_set_direction(struct pinctrl_dev *pctldev, ctrl0 |= CHV_PADCTRL0_GPIOCFG_GPO << CHV_PADCTRL0_GPIOCFG_SHIFT; chv_writel(ctrl0, reg); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); return 0; } @@ -963,10 +972,10 @@ static int chv_config_get(struct pinctrl_dev *pctldev, unsigned pin, u16 arg = 0; u32 term; - raw_spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&chv_lock, flags); ctrl0 = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0)); ctrl1 = readl(chv_padreg(pctrl, pin, CHV_PADCTRL1)); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); term = (ctrl0 & CHV_PADCTRL0_TERM_MASK) >> CHV_PADCTRL0_TERM_SHIFT; @@ -1040,7 +1049,7 @@ static int chv_config_set_pull(struct chv_pinctrl *pctrl, unsigned pin, unsigned long flags; u32 ctrl0, pull; - raw_spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&chv_lock, flags); ctrl0 = readl(reg); switch (param) { @@ -1063,7 +1072,7 @@ static int chv_config_set_pull(struct chv_pinctrl *pctrl, unsigned pin, pull = CHV_PADCTRL0_TERM_20K << CHV_PADCTRL0_TERM_SHIFT; break; default: - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); return -EINVAL; } @@ -1081,7 +1090,7 @@ static int chv_config_set_pull(struct chv_pinctrl *pctrl, unsigned pin, pull = CHV_PADCTRL0_TERM_20K << CHV_PADCTRL0_TERM_SHIFT; break; default: - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); return -EINVAL; } @@ -1089,12 +1098,33 @@ static int chv_config_set_pull(struct chv_pinctrl *pctrl, unsigned pin, break; default: - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); return -EINVAL; } chv_writel(ctrl0, reg); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); + + return 0; +} + +static int chv_config_set_oden(struct chv_pinctrl *pctrl, unsigned int pin, + bool enable) +{ + void __iomem *reg = chv_padreg(pctrl, pin, CHV_PADCTRL1); + unsigned long flags; + u32 ctrl1; + + raw_spin_lock_irqsave(&chv_lock, flags); + ctrl1 = readl(reg); + + if (enable) + ctrl1 |= CHV_PADCTRL1_ODEN; + else + ctrl1 &= ~CHV_PADCTRL1_ODEN; + + chv_writel(ctrl1, reg); + raw_spin_unlock_irqrestore(&chv_lock, flags); return 0; } @@ -1123,6 +1153,18 @@ static int chv_config_set(struct pinctrl_dev *pctldev, unsigned pin, return ret; break; + case PIN_CONFIG_DRIVE_PUSH_PULL: + ret = chv_config_set_oden(pctrl, pin, false); + if (ret) + return ret; + break; + + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + ret = chv_config_set_oden(pctrl, pin, true); + if (ret) + return ret; + break; + default: return -ENOTSUPP; } @@ -1134,10 +1176,52 @@ static int chv_config_set(struct pinctrl_dev *pctldev, unsigned pin, return 0; } +static int chv_config_group_get(struct pinctrl_dev *pctldev, + unsigned int group, + unsigned long *config) +{ + const unsigned int *pins; + unsigned int npins; + int ret; + + ret = chv_get_group_pins(pctldev, group, &pins, &npins); + if (ret) + return ret; + + ret = chv_config_get(pctldev, pins[0], config); + if (ret) + return ret; + + return 0; +} + +static int chv_config_group_set(struct pinctrl_dev *pctldev, + unsigned int group, unsigned long *configs, + unsigned int num_configs) +{ + const unsigned int *pins; + unsigned int npins; + int i, ret; + + ret = chv_get_group_pins(pctldev, group, &pins, &npins); + if (ret) + return ret; + + for (i = 0; i < npins; i++) { + ret = chv_config_set(pctldev, pins[i], configs, num_configs); + if (ret) + return ret; + } + + return 0; +} + static const struct pinconf_ops chv_pinconf_ops = { .is_generic = true, .pin_config_set = chv_config_set, .pin_config_get = chv_config_get, + .pin_config_group_get = chv_config_group_get, + .pin_config_group_set = chv_config_group_set, }; static struct pinctrl_desc chv_pinctrl_desc = { @@ -1160,9 +1244,9 @@ static int chv_gpio_get(struct gpio_chip *chip, unsigned offset) unsigned long flags; u32 ctrl0, cfg; - raw_spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&chv_lock, flags); ctrl0 = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0)); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); cfg = ctrl0 & CHV_PADCTRL0_GPIOCFG_MASK; cfg >>= CHV_PADCTRL0_GPIOCFG_SHIFT; @@ -1180,7 +1264,7 @@ static void chv_gpio_set(struct gpio_chip *chip, unsigned offset, int value) void __iomem *reg; u32 ctrl0; - raw_spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&chv_lock, flags); reg = chv_padreg(pctrl, pin, CHV_PADCTRL0); ctrl0 = readl(reg); @@ -1192,7 +1276,7 @@ static void chv_gpio_set(struct gpio_chip *chip, unsigned offset, int value) chv_writel(ctrl0, reg); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); } static int chv_gpio_get_direction(struct gpio_chip *chip, unsigned offset) @@ -1202,9 +1286,9 @@ static int chv_gpio_get_direction(struct gpio_chip *chip, unsigned offset) u32 ctrl0, direction; unsigned long flags; - raw_spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&chv_lock, flags); ctrl0 = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0)); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); direction = ctrl0 & CHV_PADCTRL0_GPIOCFG_MASK; direction >>= CHV_PADCTRL0_GPIOCFG_SHIFT; @@ -1242,14 +1326,14 @@ static void chv_gpio_irq_ack(struct irq_data *d) int pin = chv_gpio_offset_to_pin(pctrl, irqd_to_hwirq(d)); u32 intr_line; - raw_spin_lock(&pctrl->lock); + raw_spin_lock(&chv_lock); intr_line = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0)); intr_line &= CHV_PADCTRL0_INTSEL_MASK; intr_line >>= CHV_PADCTRL0_INTSEL_SHIFT; chv_writel(BIT(intr_line), pctrl->regs + CHV_INTSTAT); - raw_spin_unlock(&pctrl->lock); + raw_spin_unlock(&chv_lock); } static void chv_gpio_irq_mask_unmask(struct irq_data *d, bool mask) @@ -1260,7 +1344,7 @@ static void chv_gpio_irq_mask_unmask(struct irq_data *d, bool mask) u32 value, intr_line; unsigned long flags; - raw_spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&chv_lock, flags); intr_line = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0)); intr_line &= CHV_PADCTRL0_INTSEL_MASK; @@ -1273,7 +1357,7 @@ static void chv_gpio_irq_mask_unmask(struct irq_data *d, bool mask) value |= BIT(intr_line); chv_writel(value, pctrl->regs + CHV_INTMASK); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); } static void chv_gpio_irq_mask(struct irq_data *d) @@ -1307,7 +1391,7 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d) unsigned long flags; u32 intsel, value; - raw_spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&chv_lock, flags); intsel = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0)); intsel &= CHV_PADCTRL0_INTSEL_MASK; intsel >>= CHV_PADCTRL0_INTSEL_SHIFT; @@ -1322,7 +1406,7 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d) irq_set_handler_locked(d, handler); pctrl->intr_lines[intsel] = offset; } - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); } chv_gpio_irq_unmask(d); @@ -1338,7 +1422,7 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned type) unsigned long flags; u32 value; - raw_spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&chv_lock, flags); /* * Pins which can be used as shared interrupt are configured in @@ -1387,7 +1471,7 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned type) else if (type & IRQ_TYPE_LEVEL_MASK) irq_set_handler_locked(d, handle_level_irq); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&chv_lock, flags); return 0; } @@ -1499,7 +1583,6 @@ static int chv_pinctrl_probe(struct platform_device *pdev) if (i == ARRAY_SIZE(chv_communities)) return -ENODEV; - raw_spin_lock_init(&pctrl->lock); pctrl->dev = &pdev->dev; #ifdef CONFIG_PM_SLEEP diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index 3584e50fa2c6..fe19b1e7b278 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -89,7 +89,7 @@ struct intel_pinctrl_context { */ struct intel_pinctrl { struct device *dev; - spinlock_t lock; + raw_spinlock_t lock; struct pinctrl_desc pctldesc; struct pinctrl_dev *pctldev; struct gpio_chip chip; @@ -318,7 +318,7 @@ static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned function, unsigned long flags; int i; - spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&pctrl->lock, flags); /* * All pins in the groups needs to be accessible and writable @@ -326,7 +326,7 @@ static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned function, */ for (i = 0; i < grp->npins; i++) { if (!intel_pad_usable(pctrl, grp->pins[i])) { - spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&pctrl->lock, flags); return -EBUSY; } } @@ -345,7 +345,7 @@ static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned function, writel(value, padcfg0); } - spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&pctrl->lock, flags); return 0; } @@ -359,10 +359,10 @@ static int intel_gpio_request_enable(struct pinctrl_dev *pctldev, unsigned long flags; u32 value; - spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&pctrl->lock, flags); if (!intel_pad_usable(pctrl, pin)) { - spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&pctrl->lock, flags); return -EBUSY; } @@ -377,7 +377,7 @@ static int intel_gpio_request_enable(struct pinctrl_dev *pctldev, value |= PADCFG0_GPIOTXDIS; writel(value, padcfg0); - spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&pctrl->lock, flags); return 0; } @@ -391,7 +391,7 @@ static int intel_gpio_set_direction(struct pinctrl_dev *pctldev, unsigned long flags; u32 value; - spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&pctrl->lock, flags); padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0); @@ -402,7 +402,7 @@ static int intel_gpio_set_direction(struct pinctrl_dev *pctldev, value &= ~PADCFG0_GPIOTXDIS; writel(value, padcfg0); - spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&pctrl->lock, flags); return 0; } @@ -490,7 +490,7 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin, int ret = 0; u32 value; - spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&pctrl->lock, flags); padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1); value = readl(padcfg1); @@ -544,7 +544,7 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin, if (!ret) writel(value, padcfg1); - spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&pctrl->lock, flags); return ret; } @@ -611,14 +611,14 @@ static void intel_gpio_set(struct gpio_chip *chip, unsigned offset, int value) unsigned long flags; u32 padcfg0; - spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&pctrl->lock, flags); padcfg0 = readl(reg); if (value) padcfg0 |= PADCFG0_GPIOTXSTATE; else padcfg0 &= ~PADCFG0_GPIOTXSTATE; writel(padcfg0, reg); - spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&pctrl->lock, flags); } } @@ -651,7 +651,7 @@ static void intel_gpio_irq_ack(struct irq_data *d) const struct intel_community *community; unsigned pin = irqd_to_hwirq(d); - spin_lock(&pctrl->lock); + raw_spin_lock(&pctrl->lock); community = intel_get_community(pctrl, pin); if (community) { @@ -662,7 +662,7 @@ static void intel_gpio_irq_ack(struct irq_data *d) writel(BIT(gpp_offset), community->regs + GPI_IS + gpp * 4); } - spin_unlock(&pctrl->lock); + raw_spin_unlock(&pctrl->lock); } static void intel_gpio_irq_enable(struct irq_data *d) @@ -673,7 +673,7 @@ static void intel_gpio_irq_enable(struct irq_data *d) unsigned pin = irqd_to_hwirq(d); unsigned long flags; - spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&pctrl->lock, flags); community = intel_get_community(pctrl, pin); if (community) { @@ -691,7 +691,7 @@ static void intel_gpio_irq_enable(struct irq_data *d) writel(value, community->regs + community->ie_offset + gpp * 4); } - spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&pctrl->lock, flags); } static void intel_gpio_irq_mask_unmask(struct irq_data *d, bool mask) @@ -702,7 +702,7 @@ static void intel_gpio_irq_mask_unmask(struct irq_data *d, bool mask) unsigned pin = irqd_to_hwirq(d); unsigned long flags; - spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&pctrl->lock, flags); community = intel_get_community(pctrl, pin); if (community) { @@ -721,7 +721,7 @@ static void intel_gpio_irq_mask_unmask(struct irq_data *d, bool mask) writel(value, reg); } - spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&pctrl->lock, flags); } static void intel_gpio_irq_mask(struct irq_data *d) @@ -757,7 +757,7 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned type) return -EPERM; } - spin_lock_irqsave(&pctrl->lock, flags); + raw_spin_lock_irqsave(&pctrl->lock, flags); value = readl(reg); @@ -784,7 +784,7 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned type) else if (type & IRQ_TYPE_LEVEL_MASK) irq_set_handler_locked(d, handle_level_irq); - spin_unlock_irqrestore(&pctrl->lock, flags); + raw_spin_unlock_irqrestore(&pctrl->lock, flags); return 0; } @@ -919,7 +919,8 @@ static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq) * to the irq directly) because on some platforms several GPIO * controllers share the same interrupt line. */ - ret = devm_request_irq(pctrl->dev, irq, intel_gpio_irq, IRQF_SHARED, + ret = devm_request_irq(pctrl->dev, irq, intel_gpio_irq, + IRQF_SHARED | IRQF_NO_THREAD, dev_name(pctrl->dev), pctrl); if (ret) { dev_err(pctrl->dev, "failed to request interrupt\n"); @@ -995,7 +996,7 @@ int intel_pinctrl_probe(struct platform_device *pdev, pctrl->dev = &pdev->dev; pctrl->soc = soc_data; - spin_lock_init(&pctrl->lock); + raw_spin_lock_init(&pctrl->lock); /* * Make a copy of the communities which we can use to hold pointers diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c index 207b13b618cf..5db59a64f147 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c @@ -1183,8 +1183,8 @@ static int mtk_eint_resume(struct device *device) } const struct dev_pm_ops mtk_eint_pm_ops = { - .suspend = mtk_eint_suspend, - .resume = mtk_eint_resume, + .suspend_noirq = mtk_eint_suspend, + .resume_noirq = mtk_eint_resume, }; static void mtk_eint_ack(struct irq_data *d) diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c index eeabafbbf598..cb4d6ad30530 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c @@ -147,6 +147,52 @@ static const struct pinctrl_pin_desc meson_gxbb_periphs_pins[] = { MESON_PIN(GPIO_TEST_N, EE_OFF), }; +static const unsigned int emmc_nand_d07_pins[] = { + PIN(BOOT_0, EE_OFF), PIN(BOOT_1, EE_OFF), PIN(BOOT_2, EE_OFF), + PIN(BOOT_3, EE_OFF), PIN(BOOT_4, EE_OFF), PIN(BOOT_5, EE_OFF), + PIN(BOOT_6, EE_OFF), PIN(BOOT_7, EE_OFF), +}; +static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) }; +static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) }; +static const unsigned int emmc_ds_pins[] = { PIN(BOOT_15, EE_OFF) }; + +static const unsigned int sdcard_d0_pins[] = { PIN(CARD_1, EE_OFF) }; +static const unsigned int sdcard_d1_pins[] = { PIN(CARD_0, EE_OFF) }; +static const unsigned int sdcard_d2_pins[] = { PIN(CARD_5, EE_OFF) }; +static const unsigned int sdcard_d3_pins[] = { PIN(CARD_4, EE_OFF) }; +static const unsigned int sdcard_cmd_pins[] = { PIN(CARD_3, EE_OFF) }; +static const unsigned int sdcard_clk_pins[] = { PIN(CARD_2, EE_OFF) }; + +static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_12, EE_OFF) }; +static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_13, EE_OFF) }; +static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_14, EE_OFF) }; +static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_15, EE_OFF) }; + +static const unsigned int uart_tx_b_pins[] = { PIN(GPIODV_24, EE_OFF) }; +static const unsigned int uart_rx_b_pins[] = { PIN(GPIODV_25, EE_OFF) }; +static const unsigned int uart_cts_b_pins[] = { PIN(GPIODV_26, EE_OFF) }; +static const unsigned int uart_rts_b_pins[] = { PIN(GPIODV_27, EE_OFF) }; + +static const unsigned int uart_tx_c_pins[] = { PIN(GPIOY_13, EE_OFF) }; +static const unsigned int uart_rx_c_pins[] = { PIN(GPIOY_14, EE_OFF) }; +static const unsigned int uart_cts_c_pins[] = { PIN(GPIOX_11, EE_OFF) }; +static const unsigned int uart_rts_c_pins[] = { PIN(GPIOX_12, EE_OFF) }; + +static const unsigned int eth_mdio_pins[] = { PIN(GPIOZ_0, EE_OFF) }; +static const unsigned int eth_mdc_pins[] = { PIN(GPIOZ_1, EE_OFF) }; +static const unsigned int eth_clk_rx_clk_pins[] = { PIN(GPIOZ_2, EE_OFF) }; +static const unsigned int eth_rx_dv_pins[] = { PIN(GPIOZ_3, EE_OFF) }; +static const unsigned int eth_rxd0_pins[] = { PIN(GPIOZ_4, EE_OFF) }; +static const unsigned int eth_rxd1_pins[] = { PIN(GPIOZ_5, EE_OFF) }; +static const unsigned int eth_rxd2_pins[] = { PIN(GPIOZ_6, EE_OFF) }; +static const unsigned int eth_rxd3_pins[] = { PIN(GPIOZ_7, EE_OFF) }; +static const unsigned int eth_rgmii_tx_clk_pins[] = { PIN(GPIOZ_8, EE_OFF) }; +static const unsigned int eth_tx_en_pins[] = { PIN(GPIOZ_9, EE_OFF) }; +static const unsigned int eth_txd0_pins[] = { PIN(GPIOZ_10, EE_OFF) }; +static const unsigned int eth_txd1_pins[] = { PIN(GPIOZ_11, EE_OFF) }; +static const unsigned int eth_txd2_pins[] = { PIN(GPIOZ_12, EE_OFF) }; +static const unsigned int eth_txd3_pins[] = { PIN(GPIOZ_13, EE_OFF) }; + static const struct pinctrl_pin_desc meson_gxbb_aobus_pins[] = { MESON_PIN(GPIOAO_0, 0), MESON_PIN(GPIOAO_1, 0), @@ -168,6 +214,16 @@ static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, 0) }; static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, 0) }; static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, 0) }; static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, 0) }; +static const unsigned int uart_tx_ao_b_pins[] = { PIN(GPIOAO_0, 0) }; +static const unsigned int uart_rx_ao_b_pins[] = { PIN(GPIOAO_1, 0), + PIN(GPIOAO_5, 0) }; +static const unsigned int uart_cts_ao_b_pins[] = { PIN(GPIOAO_2, 0) }; +static const unsigned int uart_rts_ao_b_pins[] = { PIN(GPIOAO_3, 0) }; + +static const unsigned int i2c_sck_ao_pins[] = {PIN(GPIOAO_4, 0) }; +static const unsigned int i2c_sda_ao_pins[] = {PIN(GPIOAO_5, 0) }; +static const unsigned int i2c_slave_sck_ao_pins[] = {PIN(GPIOAO_4, 0) }; +static const unsigned int i2c_slave_sda_ao_pins[] = {PIN(GPIOAO_5, 0) }; static struct meson_pmx_group meson_gxbb_periphs_groups[] = { GPIO_GROUP(GPIOZ_0, EE_OFF), @@ -297,6 +353,54 @@ static struct meson_pmx_group meson_gxbb_periphs_groups[] = { GPIO_GROUP(GPIOCLK_3, EE_OFF), GPIO_GROUP(GPIO_TEST_N, EE_OFF), + + /* Bank X */ + GROUP(uart_tx_a, 4, 13), + GROUP(uart_rx_a, 4, 12), + GROUP(uart_cts_a, 4, 11), + GROUP(uart_rts_a, 4, 10), + + /* Bank Y */ + GROUP(uart_cts_c, 1, 19), + GROUP(uart_rts_c, 1, 18), + GROUP(uart_tx_c, 1, 17), + GROUP(uart_rx_c, 1, 16), + + /* Bank Z */ + GROUP(eth_mdio, 6, 1), + GROUP(eth_mdc, 6, 0), + GROUP(eth_clk_rx_clk, 6, 13), + GROUP(eth_rx_dv, 6, 12), + GROUP(eth_rxd0, 6, 11), + GROUP(eth_rxd1, 6, 10), + GROUP(eth_rxd2, 6, 9), + GROUP(eth_rxd3, 6, 8), + GROUP(eth_rgmii_tx_clk, 6, 7), + GROUP(eth_tx_en, 6, 6), + GROUP(eth_txd0, 6, 5), + GROUP(eth_txd1, 6, 4), + GROUP(eth_txd2, 6, 3), + GROUP(eth_txd3, 6, 2), + + /* Bank DV */ + GROUP(uart_tx_b, 2, 29), + GROUP(uart_rx_b, 2, 28), + GROUP(uart_cts_b, 2, 27), + GROUP(uart_rts_b, 2, 26), + + /* Bank BOOT */ + GROUP(emmc_nand_d07, 4, 30), + GROUP(emmc_clk, 4, 18), + GROUP(emmc_cmd, 4, 19), + GROUP(emmc_ds, 4, 31), + + /* Bank CARD */ + GROUP(sdcard_d1, 2, 14), + GROUP(sdcard_d0, 2, 15), + GROUP(sdcard_d3, 2, 12), + GROUP(sdcard_d2, 2, 13), + GROUP(sdcard_cmd, 2, 10), + GROUP(sdcard_clk, 2, 11), }; static struct meson_pmx_group meson_gxbb_aobus_groups[] = { @@ -316,10 +420,18 @@ static struct meson_pmx_group meson_gxbb_aobus_groups[] = { GPIO_GROUP(GPIOAO_13, 0), /* bank AO */ + GROUP(uart_tx_ao_b, 0, 26), + GROUP(uart_rx_ao_b, 0, 25), GROUP(uart_tx_ao_a, 0, 12), GROUP(uart_rx_ao_a, 0, 11), GROUP(uart_cts_ao_a, 0, 10), GROUP(uart_rts_ao_a, 0, 9), + GROUP(uart_cts_ao_b, 0, 8), + GROUP(uart_rts_ao_b, 0, 7), + GROUP(i2c_sck_ao, 0, 6), + GROUP(i2c_sda_ao, 0, 5), + GROUP(i2c_slave_sck_ao, 0, 2), + GROUP(i2c_slave_sda_ao, 0, 1), }; static const char * const gpio_periphs_groups[] = { @@ -359,6 +471,34 @@ static const char * const gpio_periphs_groups[] = { "GPIO_TEST_N", }; +static const char * const emmc_groups[] = { + "emmc_nand_d07", "emmc_clk", "emmc_cmd", "emmc_ds", +}; + +static const char * const sdcard_groups[] = { + "sdcard_d0", "sdcard_d1", "sdcard_d2", "sdcard_d3", + "sdcard_cmd", "sdcard_clk", +}; + +static const char * const uart_a_groups[] = { + "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a", +}; + +static const char * const uart_b_groups[] = { + "uart_tx_b", "uart_rx_b", "uart_cts_b", "uart_rts_b", +}; + +static const char * const uart_c_groups[] = { + "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c", +}; + +static const char * const eth_groups[] = { + "eth_mdio", "eth_mdc", "eth_clk_rx_clk", "eth_rx_dv", + "eth_rxd0", "eth_rxd1", "eth_rxd2", "eth_rxd3", + "eth_rgmii_tx_clk", "eth_tx_en", + "eth_txd0", "eth_txd1", "eth_txd2", "eth_txd3", +}; + static const char * const gpio_aobus_groups[] = { "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", @@ -366,16 +506,37 @@ static const char * const gpio_aobus_groups[] = { }; static const char * const uart_ao_groups[] = { - "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a" + "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a", +}; + +static const char * const uart_ao_b_groups[] = { + "uart_tx_ao_b", "uart_rx_ao_b", "uart_cts_ao_b", "uart_rts_ao_b", +}; + +static const char * const i2c_ao_groups[] = { + "i2c_sdk_ao", "i2c_sda_ao", +}; + +static const char * const i2c_slave_ao_groups[] = { + "i2c_slave_sdk_ao", "i2c_slave_sda_ao", }; static struct meson_pmx_func meson_gxbb_periphs_functions[] = { FUNCTION(gpio_periphs), + FUNCTION(emmc), + FUNCTION(sdcard), + FUNCTION(uart_a), + FUNCTION(uart_b), + FUNCTION(uart_c), + FUNCTION(eth), }; static struct meson_pmx_func meson_gxbb_aobus_functions[] = { FUNCTION(gpio_aobus), FUNCTION(uart_ao), + FUNCTION(uart_ao_b), + FUNCTION(i2c_ao), + FUNCTION(i2c_slave_ao), }; static struct meson_bank meson_gxbb_periphs_banks[] = { diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index ccbfc325c778..83f3892d5409 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1033,102 +1033,6 @@ static inline void nmk_gpio_dbg_show_one(struct seq_file *s, #define nmk_gpio_dbg_show NULL #endif -void nmk_gpio_clocks_enable(void) -{ - int i; - - for (i = 0; i < NUM_BANKS; i++) { - struct nmk_gpio_chip *chip = nmk_gpio_chips[i]; - - if (!chip) - continue; - - clk_enable(chip->clk); - } -} - -void nmk_gpio_clocks_disable(void) -{ - int i; - - for (i = 0; i < NUM_BANKS; i++) { - struct nmk_gpio_chip *chip = nmk_gpio_chips[i]; - - if (!chip) - continue; - - clk_disable(chip->clk); - } -} - -/* - * Called from the suspend/resume path to only keep the real wakeup interrupts - * (those that have had set_irq_wake() called on them) as wakeup interrupts, - * and not the rest of the interrupts which we needed to have as wakeups for - * cpuidle. - * - * PM ops are not used since this needs to be done at the end, after all the - * other drivers are done with their suspend callbacks. - */ -void nmk_gpio_wakeups_suspend(void) -{ - int i; - - for (i = 0; i < NUM_BANKS; i++) { - struct nmk_gpio_chip *chip = nmk_gpio_chips[i]; - - if (!chip) - break; - - clk_enable(chip->clk); - - writel(chip->rwimsc & chip->real_wake, - chip->addr + NMK_GPIO_RWIMSC); - writel(chip->fwimsc & chip->real_wake, - chip->addr + NMK_GPIO_FWIMSC); - - clk_disable(chip->clk); - } -} - -void nmk_gpio_wakeups_resume(void) -{ - int i; - - for (i = 0; i < NUM_BANKS; i++) { - struct nmk_gpio_chip *chip = nmk_gpio_chips[i]; - - if (!chip) - break; - - clk_enable(chip->clk); - - writel(chip->rwimsc, chip->addr + NMK_GPIO_RWIMSC); - writel(chip->fwimsc, chip->addr + NMK_GPIO_FWIMSC); - - clk_disable(chip->clk); - } -} - -/* - * Read the pull up/pull down status. - * A bit set in 'pull_up' means that pull up - * is selected if pull is enabled in PDIS register. - * Note: only pull up/down set via this driver can - * be detected due to HW limitations. - */ -void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up) -{ - if (gpio_bank < NUM_BANKS) { - struct nmk_gpio_chip *chip = nmk_gpio_chips[gpio_bank]; - - if (!chip) - return; - - *pull_up = chip->pull_up; - } -} - /* * We will allocate memory for the state container using devm* allocators * binding to the first device reaching this point, it doesn't matter if diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-generic.c index a87439ee4cdd..5020ae534479 100644 --- a/drivers/pinctrl/pinconf-generic.c +++ b/drivers/pinctrl/pinconf-generic.c @@ -53,7 +53,7 @@ static void pinconf_generic_dump_one(struct pinctrl_dev *pctldev, struct seq_file *s, const char *gname, unsigned pin, const struct pin_config_item *items, - int nitems) + int nitems, int *print_sep) { int i; @@ -75,8 +75,10 @@ static void pinconf_generic_dump_one(struct pinctrl_dev *pctldev, seq_printf(s, "ERROR READING CONFIG SETTING %d ", i); continue; } - /* Space between multiple configs */ - seq_puts(s, " "); + /* comma between multiple configs */ + if (*print_sep) + seq_puts(s, ", "); + *print_sep = 1; seq_puts(s, items[i].display); /* Print unit if available */ if (items[i].has_arg) { @@ -105,19 +107,21 @@ void pinconf_generic_dump_pins(struct pinctrl_dev *pctldev, struct seq_file *s, const char *gname, unsigned pin) { const struct pinconf_ops *ops = pctldev->desc->confops; + int print_sep = 0; if (!ops->is_generic) return; /* generic parameters */ pinconf_generic_dump_one(pctldev, s, gname, pin, conf_items, - ARRAY_SIZE(conf_items)); + ARRAY_SIZE(conf_items), &print_sep); /* driver-specific parameters */ if (pctldev->desc->num_custom_params && pctldev->desc->custom_conf_items) pinconf_generic_dump_one(pctldev, s, gname, pin, pctldev->desc->custom_conf_items, - pctldev->desc->num_custom_params); + pctldev->desc->num_custom_params, + &print_sep); } void pinconf_generic_dump_config(struct pinctrl_dev *pctldev, diff --git a/drivers/pinctrl/pinconf.c b/drivers/pinctrl/pinconf.c index 4dd7722f9935..799048f3c8d4 100644 --- a/drivers/pinctrl/pinconf.c +++ b/drivers/pinctrl/pinconf.c @@ -258,8 +258,7 @@ void pinconf_show_setting(struct seq_file *s, case PIN_MAP_TYPE_CONFIGS_PIN: desc = pin_desc_get(setting->pctldev, setting->data.configs.group_or_pin); - seq_printf(s, "pin %s (%d)", - desc->name ? desc->name : "unnamed", + seq_printf(s, "pin %s (%d)", desc->name, setting->data.configs.group_or_pin); break; case PIN_MAP_TYPE_CONFIGS_GROUP: @@ -311,8 +310,7 @@ static int pinconf_pins_show(struct seq_file *s, void *what) if (desc == NULL) continue; - seq_printf(s, "pin %d (%s):", pin, - desc->name ? desc->name : "unnamed"); + seq_printf(s, "pin %d (%s): ", pin, desc->name); pinconf_dump_pin(pctldev, s, pin); @@ -349,7 +347,7 @@ static int pinconf_groups_show(struct seq_file *s, void *what) while (selector < ngroups) { const char *gname = pctlops->get_group_name(pctldev, selector); - seq_printf(s, "%u (%s):", selector, gname); + seq_printf(s, "%u (%s): ", selector, gname); pinconf_dump_group(pctldev, s, selector, gname); seq_printf(s, "\n"); diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c index 634b4d30eefb..b466d70b9004 100644 --- a/drivers/pinctrl/pinctrl-amd.c +++ b/drivers/pinctrl/pinctrl-amd.c @@ -13,7 +13,7 @@ #include <linux/err.h> #include <linux/bug.h> #include <linux/kernel.h> -#include <linux/module.h> +#include <linux/init.h> #include <linux/spinlock.h> #include <linux/compiler.h> #include <linux/types.h> @@ -828,35 +828,18 @@ out2: return ret; } -static int amd_gpio_remove(struct platform_device *pdev) -{ - struct amd_gpio *gpio_dev; - - gpio_dev = platform_get_drvdata(pdev); - - gpiochip_remove(&gpio_dev->gc); - - return 0; -} - static const struct acpi_device_id amd_gpio_acpi_match[] = { { "AMD0030", 0 }, { "AMDI0030", 0}, { }, }; -MODULE_DEVICE_TABLE(acpi, amd_gpio_acpi_match); static struct platform_driver amd_gpio_driver = { .driver = { .name = "amd_gpio", + .suppress_bind_attrs = true, .acpi_match_table = ACPI_PTR(amd_gpio_acpi_match), }, .probe = amd_gpio_probe, - .remove = amd_gpio_remove, }; - -module_platform_driver(amd_gpio_driver); - -MODULE_LICENSE("GPL v2"); -MODULE_AUTHOR("Ken Xue <Ken.Xue@amd.com>, Jeff Wu <Jeff.Wu@amd.com>"); -MODULE_DESCRIPTION("AMD GPIO pinctrl driver"); +builtin_platform_driver(amd_gpio_driver); diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c index a025b40d246b..28bbc1bb9e6c 100644 --- a/drivers/pinctrl/pinctrl-at91-pio4.c +++ b/drivers/pinctrl/pinctrl-at91-pio4.c @@ -20,7 +20,7 @@ #include <linux/gpio.h> #include <linux/interrupt.h> #include <linux/io.h> -#include <linux/module.h> +#include <linux/init.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/pinctrl/pinconf.h> @@ -421,8 +421,8 @@ static int atmel_pctl_get_group_pins(struct pinctrl_dev *pctldev, return 0; } -struct atmel_group *atmel_pctl_find_group_by_pin(struct pinctrl_dev *pctldev, - unsigned pin) +static struct atmel_group * +atmel_pctl_find_group_by_pin(struct pinctrl_dev *pctldev, unsigned pin) { struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); int i; @@ -879,7 +879,6 @@ static const struct of_device_id atmel_pctrl_of_match[] = { /* sentinel */ } }; -MODULE_DEVICE_TABLE(of, atmel_pctrl_of_match); static int atmel_pinctrl_probe(struct platform_device *pdev) { @@ -1074,28 +1073,13 @@ clk_prepare_enable_error: return ret; } -int atmel_pinctrl_remove(struct platform_device *pdev) -{ - struct atmel_pioctrl *atmel_pioctrl = platform_get_drvdata(pdev); - - irq_domain_remove(atmel_pioctrl->irq_domain); - clk_disable_unprepare(atmel_pioctrl->clk); - gpiochip_remove(atmel_pioctrl->gpio_chip); - - return 0; -} - static struct platform_driver atmel_pinctrl_driver = { .driver = { .name = "pinctrl-at91-pio4", .of_match_table = atmel_pctrl_of_match, .pm = &atmel_pctrl_pm_ops, + .suppress_bind_attrs = true, }, .probe = atmel_pinctrl_probe, - .remove = atmel_pinctrl_remove, }; -module_platform_driver(atmel_pinctrl_driver); - -MODULE_AUTHOR(Ludovic Desroches <ludovic.desroches@atmel.com>); -MODULE_DESCRIPTION("Atmel PIO4 pinctrl driver"); -MODULE_LICENSE("GPL v2"); +builtin_platform_driver(atmel_pinctrl_driver); diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c index b7c0d6f7c046..80daead3a5a1 100644 --- a/drivers/pinctrl/pinctrl-at91.c +++ b/drivers/pinctrl/pinctrl-at91.c @@ -9,7 +9,6 @@ #include <linux/clk.h> #include <linux/err.h> #include <linux/init.h> -#include <linux/module.h> #include <linux/of.h> #include <linux/of_device.h> #include <linux/of_address.h> @@ -189,7 +188,7 @@ struct at91_pinctrl { struct at91_pinctrl_mux_ops *ops; }; -static const inline struct at91_pin_group *at91_pinctrl_find_group_by_name( +static inline const struct at91_pin_group *at91_pinctrl_find_group_by_name( const struct at91_pinctrl *info, const char *name) { @@ -1818,13 +1817,3 @@ static int __init at91_pinctrl_init(void) return platform_register_drivers(drivers, ARRAY_SIZE(drivers)); } arch_initcall(at91_pinctrl_init); - -static void __exit at91_pinctrl_exit(void) -{ - platform_unregister_drivers(drivers, ARRAY_SIZE(drivers)); -} - -module_exit(at91_pinctrl_exit); -MODULE_AUTHOR("Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>"); -MODULE_DESCRIPTION("Atmel AT91 pinctrl driver"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/pinctrl-digicolor.c b/drivers/pinctrl/pinctrl-digicolor.c index 30ee56427f56..639a57ecc7c2 100644 --- a/drivers/pinctrl/pinctrl-digicolor.c +++ b/drivers/pinctrl/pinctrl-digicolor.c @@ -15,7 +15,7 @@ * - Pin pad configuration (pull up/down, strength) */ -#include <linux/module.h> +#include <linux/init.h> #include <linux/platform_device.h> #include <linux/of.h> #include <linux/of_device.h> @@ -335,27 +335,17 @@ static int dc_pinctrl_probe(struct platform_device *pdev) return dc_gpiochip_add(pmap, pdev->dev.of_node); } -static int dc_pinctrl_remove(struct platform_device *pdev) -{ - struct dc_pinmap *pmap = platform_get_drvdata(pdev); - - gpiochip_remove(&pmap->chip); - - return 0; -} - static const struct of_device_id dc_pinctrl_ids[] = { { .compatible = "cnxt,cx92755-pinctrl" }, { /* sentinel */ } }; -MODULE_DEVICE_TABLE(of, dc_pinctrl_ids); static struct platform_driver dc_pinctrl_driver = { .driver = { .name = DRIVER_NAME, .of_match_table = dc_pinctrl_ids, + .suppress_bind_attrs = true, }, .probe = dc_pinctrl_probe, - .remove = dc_pinctrl_remove, }; -module_platform_driver(dc_pinctrl_driver); +builtin_platform_driver(dc_pinctrl_driver); diff --git a/drivers/pinctrl/pinctrl-lpc18xx.c b/drivers/pinctrl/pinctrl-lpc18xx.c index 8a931c7ba2ff..e053f1fa5512 100644 --- a/drivers/pinctrl/pinctrl-lpc18xx.c +++ b/drivers/pinctrl/pinctrl-lpc18xx.c @@ -11,7 +11,7 @@ #include <linux/bitops.h> #include <linux/clk.h> #include <linux/io.h> -#include <linux/module.h> +#include <linux/init.h> #include <linux/of.h> #include <linux/of_device.h> #include <linux/pinctrl/pinctrl.h> @@ -1365,31 +1365,17 @@ static int lpc18xx_scu_probe(struct platform_device *pdev) return 0; } -static int lpc18xx_scu_remove(struct platform_device *pdev) -{ - struct lpc18xx_scu_data *scu = platform_get_drvdata(pdev); - - clk_disable_unprepare(scu->clk); - - return 0; -} - static const struct of_device_id lpc18xx_scu_match[] = { { .compatible = "nxp,lpc1850-scu" }, {}, }; -MODULE_DEVICE_TABLE(of, lpc18xx_scu_match); static struct platform_driver lpc18xx_scu_driver = { .probe = lpc18xx_scu_probe, - .remove = lpc18xx_scu_remove, .driver = { .name = "lpc18xx-scu", .of_match_table = lpc18xx_scu_match, + .suppress_bind_attrs = true, }, }; -module_platform_driver(lpc18xx_scu_driver); - -MODULE_AUTHOR("Joachim Eastwood <manabian@gmail.com>"); -MODULE_DESCRIPTION("Pinctrl driver for NXP LPC18xx/43xx SCU"); -MODULE_LICENSE("GPL v2"); +builtin_platform_driver(lpc18xx_scu_driver); diff --git a/drivers/pinctrl/pinctrl-max77620.c b/drivers/pinctrl/pinctrl-max77620.c new file mode 100644 index 000000000000..d9ff53e8f715 --- /dev/null +++ b/drivers/pinctrl/pinctrl-max77620.c @@ -0,0 +1,673 @@ +/* + * MAX77620 pin control driver. + * + * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * + * Author: + * Chaitanya Bandi <bandik@nvidia.com> + * Laxman Dewangan <ldewangan@nvidia.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + */ + +#include <linux/mfd/max77620.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/pinctrl/pinctrl.h> +#include <linux/pinctrl/pinconf-generic.h> +#include <linux/pinctrl/pinconf.h> +#include <linux/pinctrl/pinmux.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +#include "core.h" +#include "pinconf.h" +#include "pinctrl-utils.h" + +#define MAX77620_PIN_NUM 8 + +enum max77620_pin_ppdrv { + MAX77620_PIN_UNCONFIG_DRV, + MAX77620_PIN_OD_DRV, + MAX77620_PIN_PP_DRV, +}; + +enum max77620_pinconf_param { + MAX77620_ACTIVE_FPS_SOURCE = PIN_CONFIG_END + 1, + MAX77620_ACTIVE_FPS_POWER_ON_SLOTS, + MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS, + MAX77620_SUSPEND_FPS_SOURCE, + MAX77620_SUSPEND_FPS_POWER_ON_SLOTS, + MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS, +}; + +struct max77620_pin_function { + const char *name; + const char * const *groups; + unsigned int ngroups; + int mux_option; +}; + +static const struct pinconf_generic_params max77620_cfg_params[] = { + { + .property = "maxim,active-fps-source", + .param = MAX77620_ACTIVE_FPS_SOURCE, + }, { + .property = "maxim,active-fps-power-up-slot", + .param = MAX77620_ACTIVE_FPS_POWER_ON_SLOTS, + }, { + .property = "maxim,active-fps-power-down-slot", + .param = MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS, + }, { + .property = "maxim,suspend-fps-source", + .param = MAX77620_SUSPEND_FPS_SOURCE, + }, { + .property = "maxim,suspend-fps-power-up-slot", + .param = MAX77620_SUSPEND_FPS_POWER_ON_SLOTS, + }, { + .property = "maxim,suspend-fps-power-down-slot", + .param = MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS, + }, +}; + +enum max77620_alternate_pinmux_option { + MAX77620_PINMUX_GPIO = 0, + MAX77620_PINMUX_LOW_POWER_MODE_CONTROL_IN = 1, + MAX77620_PINMUX_FLEXIBLE_POWER_SEQUENCER_OUT = 2, + MAX77620_PINMUX_32K_OUT1 = 3, + MAX77620_PINMUX_SD0_DYNAMIC_VOLTAGE_SCALING_IN = 4, + MAX77620_PINMUX_SD1_DYNAMIC_VOLTAGE_SCALING_IN = 5, + MAX77620_PINMUX_REFERENCE_OUT = 6, +}; + +struct max77620_pingroup { + const char *name; + const unsigned int pins[1]; + unsigned int npins; + enum max77620_alternate_pinmux_option alt_option; +}; + +struct max77620_pin_info { + enum max77620_pin_ppdrv drv_type; + int pull_config; +}; + +struct max77620_fps_config { + int active_fps_src; + int active_power_up_slots; + int active_power_down_slots; + int suspend_fps_src; + int suspend_power_up_slots; + int suspend_power_down_slots; +}; + +struct max77620_pctrl_info { + struct device *dev; + struct pinctrl_dev *pctl; + struct regmap *rmap; + int pins_current_opt[MAX77620_GPIO_NR]; + const struct max77620_pin_function *functions; + unsigned int num_functions; + const struct max77620_pingroup *pin_groups; + int num_pin_groups; + const struct pinctrl_pin_desc *pins; + unsigned int num_pins; + struct max77620_pin_info pin_info[MAX77620_PIN_NUM]; + struct max77620_fps_config fps_config[MAX77620_PIN_NUM]; +}; + +static const struct pinctrl_pin_desc max77620_pins_desc[] = { + PINCTRL_PIN(MAX77620_GPIO0, "gpio0"), + PINCTRL_PIN(MAX77620_GPIO1, "gpio1"), + PINCTRL_PIN(MAX77620_GPIO2, "gpio2"), + PINCTRL_PIN(MAX77620_GPIO3, "gpio3"), + PINCTRL_PIN(MAX77620_GPIO4, "gpio4"), + PINCTRL_PIN(MAX77620_GPIO5, "gpio5"), + PINCTRL_PIN(MAX77620_GPIO6, "gpio6"), + PINCTRL_PIN(MAX77620_GPIO7, "gpio7"), +}; + +static const char * const gpio_groups[] = { + "gpio0", + "gpio1", + "gpio2", + "gpio3", + "gpio4", + "gpio5", + "gpio6", + "gpio7", +}; + +#define FUNCTION_GROUP(fname, mux) \ + { \ + .name = fname, \ + .groups = gpio_groups, \ + .ngroups = ARRAY_SIZE(gpio_groups), \ + .mux_option = MAX77620_PINMUX_##mux, \ + } + +static const struct max77620_pin_function max77620_pin_function[] = { + FUNCTION_GROUP("gpio", GPIO), + FUNCTION_GROUP("lpm-control-in", LOW_POWER_MODE_CONTROL_IN), + FUNCTION_GROUP("fps-out", FLEXIBLE_POWER_SEQUENCER_OUT), + FUNCTION_GROUP("32k-out1", 32K_OUT1), + FUNCTION_GROUP("sd0-dvs-in", SD0_DYNAMIC_VOLTAGE_SCALING_IN), + FUNCTION_GROUP("sd1-dvs-in", SD1_DYNAMIC_VOLTAGE_SCALING_IN), + FUNCTION_GROUP("reference-out", REFERENCE_OUT), +}; + +#define MAX77620_PINGROUP(pg_name, pin_id, option) \ + { \ + .name = #pg_name, \ + .pins = {MAX77620_##pin_id}, \ + .npins = 1, \ + .alt_option = MAX77620_PINMUX_##option, \ + } + +static const struct max77620_pingroup max77620_pingroups[] = { + MAX77620_PINGROUP(gpio0, GPIO0, LOW_POWER_MODE_CONTROL_IN), + MAX77620_PINGROUP(gpio1, GPIO1, FLEXIBLE_POWER_SEQUENCER_OUT), + MAX77620_PINGROUP(gpio2, GPIO2, FLEXIBLE_POWER_SEQUENCER_OUT), + MAX77620_PINGROUP(gpio3, GPIO3, FLEXIBLE_POWER_SEQUENCER_OUT), + MAX77620_PINGROUP(gpio4, GPIO4, 32K_OUT1), + MAX77620_PINGROUP(gpio5, GPIO5, SD0_DYNAMIC_VOLTAGE_SCALING_IN), + MAX77620_PINGROUP(gpio6, GPIO6, SD1_DYNAMIC_VOLTAGE_SCALING_IN), + MAX77620_PINGROUP(gpio7, GPIO7, REFERENCE_OUT), +}; + +static int max77620_pinctrl_get_groups_count(struct pinctrl_dev *pctldev) +{ + struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev); + + return mpci->num_pin_groups; +} + +static const char *max77620_pinctrl_get_group_name( + struct pinctrl_dev *pctldev, unsigned int group) +{ + struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev); + + return mpci->pin_groups[group].name; +} + +static int max77620_pinctrl_get_group_pins( + struct pinctrl_dev *pctldev, unsigned int group, + const unsigned int **pins, unsigned int *num_pins) +{ + struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev); + + *pins = mpci->pin_groups[group].pins; + *num_pins = mpci->pin_groups[group].npins; + + return 0; +} + +static const struct pinctrl_ops max77620_pinctrl_ops = { + .get_groups_count = max77620_pinctrl_get_groups_count, + .get_group_name = max77620_pinctrl_get_group_name, + .get_group_pins = max77620_pinctrl_get_group_pins, + .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, + .dt_free_map = pinctrl_utils_free_map, +}; + +static int max77620_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev) +{ + struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev); + + return mpci->num_functions; +} + +static const char *max77620_pinctrl_get_func_name(struct pinctrl_dev *pctldev, + unsigned int function) +{ + struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev); + + return mpci->functions[function].name; +} + +static int max77620_pinctrl_get_func_groups(struct pinctrl_dev *pctldev, + unsigned int function, + const char * const **groups, + unsigned int * const num_groups) +{ + struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev); + + *groups = mpci->functions[function].groups; + *num_groups = mpci->functions[function].ngroups; + + return 0; +} + +static int max77620_pinctrl_enable(struct pinctrl_dev *pctldev, + unsigned int function, unsigned int group) +{ + struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev); + u8 val; + int ret; + + if (function == MAX77620_PINMUX_GPIO) { + val = 0; + } else if (function == mpci->pin_groups[group].alt_option) { + val = 1 << group; + } else { + dev_err(mpci->dev, "GPIO %u doesn't have function %u\n", + group, function); + return -EINVAL; + } + ret = regmap_update_bits(mpci->rmap, MAX77620_REG_AME_GPIO, + BIT(group), val); + if (ret < 0) + dev_err(mpci->dev, "REG AME GPIO update failed: %d\n", ret); + + return ret; +} + +static const struct pinmux_ops max77620_pinmux_ops = { + .get_functions_count = max77620_pinctrl_get_funcs_count, + .get_function_name = max77620_pinctrl_get_func_name, + .get_function_groups = max77620_pinctrl_get_func_groups, + .set_mux = max77620_pinctrl_enable, +}; + +static int max77620_pinconf_get(struct pinctrl_dev *pctldev, + unsigned int pin, unsigned long *config) +{ + struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev); + struct device *dev = mpci->dev; + enum pin_config_param param = pinconf_to_config_param(*config); + unsigned int val; + int arg = 0; + int ret; + + switch (param) { + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + if (mpci->pin_info[pin].drv_type == MAX77620_PIN_OD_DRV) + arg = 1; + break; + + case PIN_CONFIG_DRIVE_PUSH_PULL: + if (mpci->pin_info[pin].drv_type == MAX77620_PIN_PP_DRV) + arg = 1; + break; + + case PIN_CONFIG_BIAS_PULL_UP: + ret = regmap_read(mpci->rmap, MAX77620_REG_PUE_GPIO, &val); + if (ret < 0) { + dev_err(dev, "Reg PUE_GPIO read failed: %d\n", ret); + return ret; + } + if (val & BIT(pin)) + arg = 1; + break; + + case PIN_CONFIG_BIAS_PULL_DOWN: + ret = regmap_read(mpci->rmap, MAX77620_REG_PDE_GPIO, &val); + if (ret < 0) { + dev_err(dev, "Reg PDE_GPIO read failed: %d\n", ret); + return ret; + } + if (val & BIT(pin)) + arg = 1; + break; + + default: + dev_err(dev, "Properties not supported\n"); + return -ENOTSUPP; + } + + *config = pinconf_to_config_packed(param, (u16)arg); + + return 0; +} + +static int max77620_get_default_fps(struct max77620_pctrl_info *mpci, + int addr, int *fps) +{ + unsigned int val; + int ret; + + ret = regmap_read(mpci->rmap, addr, &val); + if (ret < 0) { + dev_err(mpci->dev, "Reg PUE_GPIO read failed: %d\n", ret); + return ret; + } + *fps = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT; + + return 0; +} + +static int max77620_set_fps_param(struct max77620_pctrl_info *mpci, + int pin, int param) +{ + struct max77620_fps_config *fps_config = &mpci->fps_config[pin]; + int addr, ret; + int param_val; + int mask, shift; + + if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3)) + return 0; + + addr = MAX77620_REG_FPS_GPIO1 + pin - 1; + switch (param) { + case MAX77620_ACTIVE_FPS_SOURCE: + case MAX77620_SUSPEND_FPS_SOURCE: + mask = MAX77620_FPS_SRC_MASK; + shift = MAX77620_FPS_SRC_SHIFT; + param_val = fps_config->active_fps_src; + if (param == MAX77620_SUSPEND_FPS_SOURCE) + param_val = fps_config->suspend_fps_src; + break; + + case MAX77620_ACTIVE_FPS_POWER_ON_SLOTS: + case MAX77620_SUSPEND_FPS_POWER_ON_SLOTS: + mask = MAX77620_FPS_PU_PERIOD_MASK; + shift = MAX77620_FPS_PU_PERIOD_SHIFT; + param_val = fps_config->active_power_up_slots; + if (param == MAX77620_SUSPEND_FPS_POWER_ON_SLOTS) + param_val = fps_config->suspend_power_up_slots; + break; + + case MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS: + case MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS: + mask = MAX77620_FPS_PD_PERIOD_MASK; + shift = MAX77620_FPS_PD_PERIOD_SHIFT; + param_val = fps_config->active_power_down_slots; + if (param == MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS) + param_val = fps_config->suspend_power_down_slots; + break; + + default: + dev_err(mpci->dev, "Invalid parameter %d for pin %d\n", + param, pin); + return -EINVAL; + } + + if (param_val < 0) + return 0; + + ret = regmap_update_bits(mpci->rmap, addr, mask, param_val << shift); + if (ret < 0) + dev_err(mpci->dev, "Reg 0x%02x update failed %d\n", addr, ret); + + return ret; +} + +static int max77620_pinconf_set(struct pinctrl_dev *pctldev, + unsigned int pin, unsigned long *configs, + unsigned int num_configs) +{ + struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev); + struct device *dev = mpci->dev; + struct max77620_fps_config *fps_config; + int param; + u16 param_val; + unsigned int val; + unsigned int pu_val; + unsigned int pd_val; + int addr, ret; + int i; + + for (i = 0; i < num_configs; i++) { + param = pinconf_to_config_param(configs[i]); + param_val = pinconf_to_config_argument(configs[i]); + + switch (param) { + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + val = param_val ? 0 : 1; + ret = regmap_update_bits(mpci->rmap, + MAX77620_REG_GPIO0 + pin, + MAX77620_CNFG_GPIO_DRV_MASK, + val); + if (ret < 0) { + dev_err(dev, "Reg 0x%02x update failed %d\n", + MAX77620_REG_GPIO0 + pin, ret); + return ret; + } + mpci->pin_info[pin].drv_type = val ? + MAX77620_PIN_PP_DRV : MAX77620_PIN_OD_DRV; + break; + + case PIN_CONFIG_DRIVE_PUSH_PULL: + val = param_val ? 1 : 0; + ret = regmap_update_bits(mpci->rmap, + MAX77620_REG_GPIO0 + pin, + MAX77620_CNFG_GPIO_DRV_MASK, + val); + if (ret < 0) { + dev_err(dev, "Reg 0x%02x update failed %d\n", + MAX77620_REG_GPIO0 + pin, ret); + return ret; + } + mpci->pin_info[pin].drv_type = val ? + MAX77620_PIN_PP_DRV : MAX77620_PIN_OD_DRV; + break; + + case MAX77620_ACTIVE_FPS_SOURCE: + case MAX77620_ACTIVE_FPS_POWER_ON_SLOTS: + case MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS: + if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3)) + return -EINVAL; + + fps_config = &mpci->fps_config[pin]; + + if ((param == MAX77620_ACTIVE_FPS_SOURCE) && + (param_val == MAX77620_FPS_SRC_DEF)) { + addr = MAX77620_REG_FPS_GPIO1 + pin - 1; + ret = max77620_get_default_fps( + mpci, addr, + &fps_config->active_fps_src); + if (ret < 0) + return ret; + break; + } + + if (param == MAX77620_ACTIVE_FPS_SOURCE) + fps_config->active_fps_src = param_val; + else if (param == MAX77620_ACTIVE_FPS_POWER_ON_SLOTS) + fps_config->active_power_up_slots = param_val; + else + fps_config->active_power_down_slots = param_val; + + ret = max77620_set_fps_param(mpci, pin, param); + if (ret < 0) + return ret; + break; + + case MAX77620_SUSPEND_FPS_SOURCE: + case MAX77620_SUSPEND_FPS_POWER_ON_SLOTS: + case MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS: + if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3)) + return -EINVAL; + + fps_config = &mpci->fps_config[pin]; + + if ((param == MAX77620_SUSPEND_FPS_SOURCE) && + (param_val == MAX77620_FPS_SRC_DEF)) { + addr = MAX77620_REG_FPS_GPIO1 + pin - 1; + ret = max77620_get_default_fps( + mpci, addr, + &fps_config->suspend_fps_src); + if (ret < 0) + return ret; + break; + } + + if (param == MAX77620_SUSPEND_FPS_SOURCE) + fps_config->suspend_fps_src = param_val; + else if (param == MAX77620_SUSPEND_FPS_POWER_ON_SLOTS) + fps_config->suspend_power_up_slots = param_val; + else + fps_config->suspend_power_down_slots = + param_val; + break; + + case PIN_CONFIG_BIAS_PULL_UP: + case PIN_CONFIG_BIAS_PULL_DOWN: + pu_val = (param == PIN_CONFIG_BIAS_PULL_UP) ? + BIT(pin) : 0; + pd_val = (param == PIN_CONFIG_BIAS_PULL_DOWN) ? + BIT(pin) : 0; + + ret = regmap_update_bits(mpci->rmap, + MAX77620_REG_PUE_GPIO, + BIT(pin), pu_val); + if (ret < 0) { + dev_err(dev, "PUE_GPIO update failed: %d\n", + ret); + return ret; + } + + ret = regmap_update_bits(mpci->rmap, + MAX77620_REG_PDE_GPIO, + BIT(pin), pd_val); + if (ret < 0) { + dev_err(dev, "PDE_GPIO update failed: %d\n", + ret); + return ret; + } + break; + + default: + dev_err(dev, "Properties not supported\n"); + return -ENOTSUPP; + } + } + + return 0; +} + +static const struct pinconf_ops max77620_pinconf_ops = { + .pin_config_get = max77620_pinconf_get, + .pin_config_set = max77620_pinconf_set, +}; + +static struct pinctrl_desc max77620_pinctrl_desc = { + .pctlops = &max77620_pinctrl_ops, + .pmxops = &max77620_pinmux_ops, + .confops = &max77620_pinconf_ops, +}; + +static int max77620_pinctrl_probe(struct platform_device *pdev) +{ + struct max77620_chip *max77620 = dev_get_drvdata(pdev->dev.parent); + struct max77620_pctrl_info *mpci; + int i; + + mpci = devm_kzalloc(&pdev->dev, sizeof(*mpci), GFP_KERNEL); + if (!mpci) + return -ENOMEM; + + mpci->dev = &pdev->dev; + mpci->dev->of_node = pdev->dev.parent->of_node; + mpci->rmap = max77620->rmap; + + mpci->pins = max77620_pins_desc; + mpci->num_pins = ARRAY_SIZE(max77620_pins_desc); + mpci->functions = max77620_pin_function; + mpci->num_functions = ARRAY_SIZE(max77620_pin_function); + mpci->pin_groups = max77620_pingroups; + mpci->num_pin_groups = ARRAY_SIZE(max77620_pingroups); + platform_set_drvdata(pdev, mpci); + + max77620_pinctrl_desc.name = dev_name(&pdev->dev); + max77620_pinctrl_desc.pins = max77620_pins_desc; + max77620_pinctrl_desc.npins = ARRAY_SIZE(max77620_pins_desc); + max77620_pinctrl_desc.num_custom_params = + ARRAY_SIZE(max77620_cfg_params); + max77620_pinctrl_desc.custom_params = max77620_cfg_params; + + for (i = 0; i < MAX77620_PIN_NUM; ++i) { + mpci->fps_config[i].active_fps_src = -1; + mpci->fps_config[i].active_power_up_slots = -1; + mpci->fps_config[i].active_power_down_slots = -1; + mpci->fps_config[i].suspend_fps_src = -1; + mpci->fps_config[i].suspend_power_up_slots = -1; + mpci->fps_config[i].suspend_power_down_slots = -1; + } + + mpci->pctl = devm_pinctrl_register(&pdev->dev, &max77620_pinctrl_desc, + mpci); + if (IS_ERR(mpci->pctl)) { + dev_err(&pdev->dev, "Couldn't register pinctrl driver\n"); + return PTR_ERR(mpci->pctl); + } + + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int max77620_suspend_fps_param[] = { + MAX77620_SUSPEND_FPS_SOURCE, + MAX77620_SUSPEND_FPS_POWER_ON_SLOTS, + MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS, +}; + +static int max77620_active_fps_param[] = { + MAX77620_ACTIVE_FPS_SOURCE, + MAX77620_ACTIVE_FPS_POWER_ON_SLOTS, + MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS, +}; + +static int max77620_pinctrl_suspend(struct device *dev) +{ + struct max77620_pctrl_info *mpci = dev_get_drvdata(dev); + int pin, p; + + for (pin = 0; pin < MAX77620_PIN_NUM; ++pin) { + if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3)) + continue; + for (p = 0; p < 3; ++p) + max77620_set_fps_param( + mpci, pin, max77620_suspend_fps_param[p]); + } + + return 0; +}; + +static int max77620_pinctrl_resume(struct device *dev) +{ + struct max77620_pctrl_info *mpci = dev_get_drvdata(dev); + int pin, p; + + for (pin = 0; pin < MAX77620_PIN_NUM; ++pin) { + if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3)) + continue; + for (p = 0; p < 3; ++p) + max77620_set_fps_param( + mpci, pin, max77620_active_fps_param[p]); + } + + return 0; +} +#endif + +static const struct dev_pm_ops max77620_pinctrl_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS( + max77620_pinctrl_suspend, max77620_pinctrl_resume) +}; + +static const struct platform_device_id max77620_pinctrl_devtype[] = { + { .name = "max77620-pinctrl", }, + { .name = "max20024-pinctrl", }, + {}, +}; +MODULE_DEVICE_TABLE(platform, max77620_pinctrl_devtype); + +static struct platform_driver max77620_pinctrl_driver = { + .driver = { + .name = "max77620-pinctrl", + .pm = &max77620_pinctrl_pm_ops, + }, + .probe = max77620_pinctrl_probe, + .id_table = max77620_pinctrl_devtype, +}; + +module_platform_driver(max77620_pinctrl_driver); + +MODULE_DESCRIPTION("MAX77620/MAX20024 pin control driver"); +MODULE_AUTHOR("Chaitanya Bandi<bandik@nvidia.com>"); +MODULE_AUTHOR("Laxman Dewangan<ldewangan@nvidia.com>"); +MODULE_ALIAS("platform:max77620-pinctrl"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/pinctrl-oxnas.c b/drivers/pinctrl/pinctrl-oxnas.c new file mode 100644 index 000000000000..917a7d2535d7 --- /dev/null +++ b/drivers/pinctrl/pinctrl-oxnas.c @@ -0,0 +1,846 @@ +/* + * Oxford Semiconductor OXNAS SoC Family pinctrl driver + * + * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com> + * + * Based on pinctrl-pic32.c + * Joshua Henderson, <joshua.henderson@microchip.com> + * Copyright (C) 2015 Microchip Technology Inc. All rights reserved. + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ +#include <linux/gpio/driver.h> +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/irq.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/pinctrl/pinconf.h> +#include <linux/pinctrl/pinconf-generic.h> +#include <linux/pinctrl/pinctrl.h> +#include <linux/pinctrl/pinmux.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/regmap.h> +#include <linux/mfd/syscon.h> + +#include "pinctrl-utils.h" + +#define PINS_PER_BANK 32 + +#define GPIO_BANK_START(bank) ((bank) * PINS_PER_BANK) + +/* Regmap Offsets */ +#define PINMUX_PRIMARY_SEL0 0x0c +#define PINMUX_SECONDARY_SEL0 0x14 +#define PINMUX_TERTIARY_SEL0 0x8c +#define PINMUX_PRIMARY_SEL1 0x10 +#define PINMUX_SECONDARY_SEL1 0x18 +#define PINMUX_TERTIARY_SEL1 0x90 +#define PINMUX_PULLUP_CTRL0 0xac +#define PINMUX_PULLUP_CTRL1 0xb0 + +/* GPIO Registers */ +#define INPUT_VALUE 0x00 +#define OUTPUT_EN 0x04 +#define IRQ_PENDING 0x0c +#define OUTPUT_SET 0x14 +#define OUTPUT_CLEAR 0x18 +#define OUTPUT_EN_SET 0x1c +#define OUTPUT_EN_CLEAR 0x20 +#define RE_IRQ_ENABLE 0x28 +#define FE_IRQ_ENABLE 0x2c + +struct oxnas_function { + const char *name; + const char * const *groups; + unsigned int ngroups; +}; + +struct oxnas_pin_group { + const char *name; + unsigned int pin; + unsigned int bank; + struct oxnas_desc_function *functions; +}; + +struct oxnas_desc_function { + const char *name; + unsigned int fct; +}; + +struct oxnas_gpio_bank { + void __iomem *reg_base; + struct gpio_chip gpio_chip; + struct irq_chip irq_chip; + unsigned int id; +}; + +struct oxnas_pinctrl { + struct regmap *regmap; + struct device *dev; + struct pinctrl_dev *pctldev; + const struct pinctrl_pin_desc *pins; + unsigned int npins; + const struct oxnas_function *functions; + unsigned int nfunctions; + const struct oxnas_pin_group *groups; + unsigned int ngroups; + struct oxnas_gpio_bank *gpio_banks; + unsigned int nbanks; +}; + +static const struct pinctrl_pin_desc oxnas_pins[] = { + PINCTRL_PIN(0, "gpio0"), + PINCTRL_PIN(1, "gpio1"), + PINCTRL_PIN(2, "gpio2"), + PINCTRL_PIN(3, "gpio3"), + PINCTRL_PIN(4, "gpio4"), + PINCTRL_PIN(5, "gpio5"), + PINCTRL_PIN(6, "gpio6"), + PINCTRL_PIN(7, "gpio7"), + PINCTRL_PIN(8, "gpio8"), + PINCTRL_PIN(9, "gpio9"), + PINCTRL_PIN(10, "gpio10"), + PINCTRL_PIN(11, "gpio11"), + PINCTRL_PIN(12, "gpio12"), + PINCTRL_PIN(13, "gpio13"), + PINCTRL_PIN(14, "gpio14"), + PINCTRL_PIN(15, "gpio15"), + PINCTRL_PIN(16, "gpio16"), + PINCTRL_PIN(17, "gpio17"), + PINCTRL_PIN(18, "gpio18"), + PINCTRL_PIN(19, "gpio19"), + PINCTRL_PIN(20, "gpio20"), + PINCTRL_PIN(21, "gpio21"), + PINCTRL_PIN(22, "gpio22"), + PINCTRL_PIN(23, "gpio23"), + PINCTRL_PIN(24, "gpio24"), + PINCTRL_PIN(25, "gpio25"), + PINCTRL_PIN(26, "gpio26"), + PINCTRL_PIN(27, "gpio27"), + PINCTRL_PIN(28, "gpio28"), + PINCTRL_PIN(29, "gpio29"), + PINCTRL_PIN(30, "gpio30"), + PINCTRL_PIN(31, "gpio31"), + PINCTRL_PIN(32, "gpio32"), + PINCTRL_PIN(33, "gpio33"), + PINCTRL_PIN(34, "gpio34"), +}; + +static const char * const oxnas_fct0_group[] = { + "gpio0", "gpio1", "gpio2", "gpio3", + "gpio4", "gpio5", "gpio6", "gpio7", + "gpio8", "gpio9", "gpio10", "gpio11", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", "gpio18", "gpio19", + "gpio20", "gpio21", "gpio22", "gpio23", + "gpio24", "gpio25", "gpio26", "gpio27", + "gpio28", "gpio29", "gpio30", "gpio31", + "gpio32", "gpio33", "gpio34" +}; + +static const char * const oxnas_fct3_group[] = { + "gpio0", "gpio1", "gpio2", "gpio3", + "gpio4", "gpio5", "gpio6", "gpio7", + "gpio8", "gpio9", + "gpio20", + "gpio22", "gpio23", "gpio24", "gpio25", + "gpio26", "gpio27", "gpio28", "gpio29", + "gpio30", "gpio31", "gpio32", "gpio33", + "gpio34" +}; + +#define FUNCTION(_name, _gr) \ + { \ + .name = #_name, \ + .groups = oxnas_##_gr##_group, \ + .ngroups = ARRAY_SIZE(oxnas_##_gr##_group), \ + } + +static const struct oxnas_function oxnas_functions[] = { + FUNCTION(gpio, fct0), + FUNCTION(fct3, fct3), +}; + +#define OXNAS_PINCTRL_GROUP(_pin, _name, ...) \ + { \ + .name = #_name, \ + .pin = _pin, \ + .bank = _pin / PINS_PER_BANK, \ + .functions = (struct oxnas_desc_function[]){ \ + __VA_ARGS__, { } }, \ + } + +#define OXNAS_PINCTRL_FUNCTION(_name, _fct) \ + { \ + .name = #_name, \ + .fct = _fct, \ + } + +static const struct oxnas_pin_group oxnas_groups[] = { + OXNAS_PINCTRL_GROUP(0, gpio0, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(1, gpio1, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(2, gpio2, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(3, gpio3, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(4, gpio4, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(5, gpio5, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(6, gpio6, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(7, gpio7, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(8, gpio8, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(9, gpio9, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(10, gpio10, + OXNAS_PINCTRL_FUNCTION(gpio, 0)), + OXNAS_PINCTRL_GROUP(11, gpio11, + OXNAS_PINCTRL_FUNCTION(gpio, 0)), + OXNAS_PINCTRL_GROUP(12, gpio12, + OXNAS_PINCTRL_FUNCTION(gpio, 0)), + OXNAS_PINCTRL_GROUP(13, gpio13, + OXNAS_PINCTRL_FUNCTION(gpio, 0)), + OXNAS_PINCTRL_GROUP(14, gpio14, + OXNAS_PINCTRL_FUNCTION(gpio, 0)), + OXNAS_PINCTRL_GROUP(15, gpio15, + OXNAS_PINCTRL_FUNCTION(gpio, 0)), + OXNAS_PINCTRL_GROUP(16, gpio16, + OXNAS_PINCTRL_FUNCTION(gpio, 0)), + OXNAS_PINCTRL_GROUP(17, gpio17, + OXNAS_PINCTRL_FUNCTION(gpio, 0)), + OXNAS_PINCTRL_GROUP(18, gpio18, + OXNAS_PINCTRL_FUNCTION(gpio, 0)), + OXNAS_PINCTRL_GROUP(19, gpio19, + OXNAS_PINCTRL_FUNCTION(gpio, 0)), + OXNAS_PINCTRL_GROUP(20, gpio20, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(21, gpio21, + OXNAS_PINCTRL_FUNCTION(gpio, 0)), + OXNAS_PINCTRL_GROUP(22, gpio22, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(23, gpio23, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(24, gpio24, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(25, gpio25, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(26, gpio26, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(27, gpio27, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(28, gpio28, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(29, gpio29, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(30, gpio30, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(31, gpio31, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(32, gpio32, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(33, gpio33, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), + OXNAS_PINCTRL_GROUP(34, gpio34, + OXNAS_PINCTRL_FUNCTION(gpio, 0), + OXNAS_PINCTRL_FUNCTION(fct3, 3)), +}; + +static inline struct oxnas_gpio_bank *pctl_to_bank(struct oxnas_pinctrl *pctl, + unsigned int pin) +{ + return &pctl->gpio_banks[pin / PINS_PER_BANK]; +} + +static int oxnas_pinctrl_get_groups_count(struct pinctrl_dev *pctldev) +{ + struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); + + return pctl->ngroups; +} + +static const char *oxnas_pinctrl_get_group_name(struct pinctrl_dev *pctldev, + unsigned int group) +{ + struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); + + return pctl->groups[group].name; +} + +static int oxnas_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, + unsigned int group, + const unsigned int **pins, + unsigned int *num_pins) +{ + struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); + + *pins = &pctl->groups[group].pin; + *num_pins = 1; + + return 0; +} + +static const struct pinctrl_ops oxnas_pinctrl_ops = { + .get_groups_count = oxnas_pinctrl_get_groups_count, + .get_group_name = oxnas_pinctrl_get_group_name, + .get_group_pins = oxnas_pinctrl_get_group_pins, + .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, + .dt_free_map = pinctrl_utils_free_map, +}; + +static int oxnas_pinmux_get_functions_count(struct pinctrl_dev *pctldev) +{ + struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); + + return pctl->nfunctions; +} + +static const char * +oxnas_pinmux_get_function_name(struct pinctrl_dev *pctldev, unsigned int func) +{ + struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); + + return pctl->functions[func].name; +} + +static int oxnas_pinmux_get_function_groups(struct pinctrl_dev *pctldev, + unsigned int func, + const char * const **groups, + unsigned int * const num_groups) +{ + struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); + + *groups = pctl->functions[func].groups; + *num_groups = pctl->functions[func].ngroups; + + return 0; +} + +static int oxnas_pinmux_enable(struct pinctrl_dev *pctldev, + unsigned int func, unsigned int group) +{ + struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); + const struct oxnas_pin_group *pg = &pctl->groups[group]; + const struct oxnas_function *pf = &pctl->functions[func]; + const char *fname = pf->name; + struct oxnas_desc_function *functions = pg->functions; + u32 mask = BIT(pg->pin); + + while (functions->name) { + if (!strcmp(functions->name, fname)) { + dev_dbg(pctl->dev, + "setting function %s bank %d pin %d fct %d mask %x\n", + fname, pg->bank, pg->pin, + functions->fct, mask); + + regmap_write_bits(pctl->regmap, + (pg->bank ? + PINMUX_PRIMARY_SEL1 : + PINMUX_PRIMARY_SEL0), + mask, + (functions->fct == 1 ? + mask : 0)); + regmap_write_bits(pctl->regmap, + (pg->bank ? + PINMUX_SECONDARY_SEL1 : + PINMUX_SECONDARY_SEL0), + mask, + (functions->fct == 2 ? + mask : 0)); + regmap_write_bits(pctl->regmap, + (pg->bank ? + PINMUX_TERTIARY_SEL1 : + PINMUX_TERTIARY_SEL0), + mask, + (functions->fct == 3 ? + mask : 0)); + + return 0; + } + + functions++; + } + + dev_err(pctl->dev, "cannot mux pin %u to function %u\n", group, func); + + return -EINVAL; +} + +static int oxnas_gpio_request_enable(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned int offset) +{ + struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); + struct oxnas_gpio_bank *bank = gpiochip_get_data(range->gc); + u32 mask = BIT(offset - bank->gpio_chip.base); + + dev_dbg(pctl->dev, "requesting gpio %d in bank %d (id %d) with mask 0x%x\n", + offset, bank->gpio_chip.base, bank->id, mask); + + regmap_write_bits(pctl->regmap, + (bank->id ? + PINMUX_PRIMARY_SEL1 : + PINMUX_PRIMARY_SEL0), + mask, 0); + regmap_write_bits(pctl->regmap, + (bank->id ? + PINMUX_SECONDARY_SEL1 : + PINMUX_SECONDARY_SEL0), + mask, 0); + regmap_write_bits(pctl->regmap, + (bank->id ? + PINMUX_TERTIARY_SEL1 : + PINMUX_TERTIARY_SEL0), + mask, 0); + + return 0; +} + +static int oxnas_gpio_get_direction(struct gpio_chip *chip, + unsigned int offset) +{ + struct oxnas_gpio_bank *bank = gpiochip_get_data(chip); + u32 mask = BIT(offset); + + return !(readl_relaxed(bank->reg_base + OUTPUT_EN) & mask); +} + +static int oxnas_gpio_direction_input(struct gpio_chip *chip, + unsigned int offset) +{ + struct oxnas_gpio_bank *bank = gpiochip_get_data(chip); + u32 mask = BIT(offset); + + writel_relaxed(mask, bank->reg_base + OUTPUT_EN_CLEAR); + + return 0; +} + +static int oxnas_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + struct oxnas_gpio_bank *bank = gpiochip_get_data(chip); + u32 mask = BIT(offset); + + return (readl_relaxed(bank->reg_base + INPUT_VALUE) & mask) != 0; +} + +static void oxnas_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value) +{ + struct oxnas_gpio_bank *bank = gpiochip_get_data(chip); + u32 mask = BIT(offset); + + if (value) + writel_relaxed(mask, bank->reg_base + OUTPUT_SET); + else + writel_relaxed(mask, bank->reg_base + OUTPUT_CLEAR); +} + +static int oxnas_gpio_direction_output(struct gpio_chip *chip, + unsigned int offset, int value) +{ + struct oxnas_gpio_bank *bank = gpiochip_get_data(chip); + u32 mask = BIT(offset); + + oxnas_gpio_set(chip, offset, value); + writel_relaxed(mask, bank->reg_base + OUTPUT_EN_SET); + + return 0; +} + +static int oxnas_gpio_set_direction(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned int offset, bool input) +{ + struct gpio_chip *chip = range->gc; + + if (input) + oxnas_gpio_direction_input(chip, offset); + else + oxnas_gpio_direction_output(chip, offset, 0); + + return 0; +} + +static const struct pinmux_ops oxnas_pinmux_ops = { + .get_functions_count = oxnas_pinmux_get_functions_count, + .get_function_name = oxnas_pinmux_get_function_name, + .get_function_groups = oxnas_pinmux_get_function_groups, + .set_mux = oxnas_pinmux_enable, + .gpio_request_enable = oxnas_gpio_request_enable, + .gpio_set_direction = oxnas_gpio_set_direction, +}; + +static int oxnas_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, + unsigned long *config) +{ + struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); + struct oxnas_gpio_bank *bank = pctl_to_bank(pctl, pin); + unsigned int param = pinconf_to_config_param(*config); + u32 mask = BIT(pin - bank->gpio_chip.base); + int ret; + u32 arg; + + switch (param) { + case PIN_CONFIG_BIAS_PULL_UP: + ret = regmap_read(pctl->regmap, + (bank->id ? + PINMUX_PULLUP_CTRL1 : + PINMUX_PULLUP_CTRL0), + &arg); + if (ret) + return ret; + + arg = !!(arg & mask); + break; + default: + return -ENOTSUPP; + } + + *config = pinconf_to_config_packed(param, arg); + + return 0; +} + +static int oxnas_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, + unsigned long *configs, unsigned int num_configs) +{ + struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); + struct oxnas_gpio_bank *bank = pctl_to_bank(pctl, pin); + unsigned int param; + u32 arg; + unsigned int i; + u32 offset = pin - bank->gpio_chip.base; + u32 mask = BIT(offset); + + dev_dbg(pctl->dev, "setting pin %d bank %d mask 0x%x\n", + pin, bank->gpio_chip.base, mask); + + for (i = 0; i < num_configs; i++) { + param = pinconf_to_config_param(configs[i]); + arg = pinconf_to_config_argument(configs[i]); + + switch (param) { + case PIN_CONFIG_BIAS_PULL_UP: + dev_dbg(pctl->dev, " pullup\n"); + regmap_write_bits(pctl->regmap, + (bank->id ? + PINMUX_PULLUP_CTRL1 : + PINMUX_PULLUP_CTRL0), + mask, mask); + break; + default: + dev_err(pctl->dev, "Property %u not supported\n", + param); + return -ENOTSUPP; + } + } + + return 0; +} + +static const struct pinconf_ops oxnas_pinconf_ops = { + .pin_config_get = oxnas_pinconf_get, + .pin_config_set = oxnas_pinconf_set, + .is_generic = true, +}; + +static struct pinctrl_desc oxnas_pinctrl_desc = { + .name = "oxnas-pinctrl", + .pctlops = &oxnas_pinctrl_ops, + .pmxops = &oxnas_pinmux_ops, + .confops = &oxnas_pinconf_ops, + .owner = THIS_MODULE, +}; + +static void oxnas_gpio_irq_ack(struct irq_data *data) +{ + struct gpio_chip *chip = irq_data_get_irq_chip_data(data); + struct oxnas_gpio_bank *bank = gpiochip_get_data(chip); + u32 mask = BIT(data->hwirq); + + writel(mask, bank->reg_base + IRQ_PENDING); +} + +static void oxnas_gpio_irq_mask(struct irq_data *data) +{ + struct gpio_chip *chip = irq_data_get_irq_chip_data(data); + struct oxnas_gpio_bank *bank = gpiochip_get_data(chip); + unsigned int type = irqd_get_trigger_type(data); + u32 mask = BIT(data->hwirq); + + if (type & IRQ_TYPE_EDGE_RISING) + writel(readl(bank->reg_base + RE_IRQ_ENABLE) & ~mask, + bank->reg_base + RE_IRQ_ENABLE); + + if (type & IRQ_TYPE_EDGE_FALLING) + writel(readl(bank->reg_base + FE_IRQ_ENABLE) & ~mask, + bank->reg_base + FE_IRQ_ENABLE); +} + +static void oxnas_gpio_irq_unmask(struct irq_data *data) +{ + struct gpio_chip *chip = irq_data_get_irq_chip_data(data); + struct oxnas_gpio_bank *bank = gpiochip_get_data(chip); + unsigned int type = irqd_get_trigger_type(data); + u32 mask = BIT(data->hwirq); + + if (type & IRQ_TYPE_EDGE_RISING) + writel(readl(bank->reg_base + RE_IRQ_ENABLE) | mask, + bank->reg_base + RE_IRQ_ENABLE); + + if (type & IRQ_TYPE_EDGE_FALLING) + writel(readl(bank->reg_base + FE_IRQ_ENABLE) | mask, + bank->reg_base + FE_IRQ_ENABLE); +} + +static unsigned int oxnas_gpio_irq_startup(struct irq_data *data) +{ + struct gpio_chip *chip = irq_data_get_irq_chip_data(data); + + oxnas_gpio_direction_input(chip, data->hwirq); + oxnas_gpio_irq_unmask(data); + + return 0; +} + +static int oxnas_gpio_irq_set_type(struct irq_data *data, unsigned int type) +{ + if ((type & (IRQ_TYPE_EDGE_RISING|IRQ_TYPE_EDGE_FALLING)) == 0) + return -EINVAL; + + irq_set_handler_locked(data, handle_edge_irq); + + return 0; +} + +static void oxnas_gpio_irq_handler(struct irq_desc *desc) +{ + struct gpio_chip *gc = irq_desc_get_handler_data(desc); + struct oxnas_gpio_bank *bank = gpiochip_get_data(gc); + struct irq_chip *chip = irq_desc_get_chip(desc); + unsigned long stat; + unsigned int pin; + + chained_irq_enter(chip, desc); + + stat = readl(bank->reg_base + IRQ_PENDING); + + for_each_set_bit(pin, &stat, BITS_PER_LONG) + generic_handle_irq(irq_linear_revmap(gc->irqdomain, pin)); + + chained_irq_exit(chip, desc); +} + +#define GPIO_BANK(_bank) \ + { \ + .gpio_chip = { \ + .label = "GPIO" #_bank, \ + .request = gpiochip_generic_request, \ + .free = gpiochip_generic_free, \ + .get_direction = oxnas_gpio_get_direction, \ + .direction_input = oxnas_gpio_direction_input, \ + .direction_output = oxnas_gpio_direction_output, \ + .get = oxnas_gpio_get, \ + .set = oxnas_gpio_set, \ + .ngpio = PINS_PER_BANK, \ + .base = GPIO_BANK_START(_bank), \ + .owner = THIS_MODULE, \ + .can_sleep = 0, \ + }, \ + .irq_chip = { \ + .name = "GPIO" #_bank, \ + .irq_startup = oxnas_gpio_irq_startup, \ + .irq_ack = oxnas_gpio_irq_ack, \ + .irq_mask = oxnas_gpio_irq_mask, \ + .irq_unmask = oxnas_gpio_irq_unmask, \ + .irq_set_type = oxnas_gpio_irq_set_type, \ + }, \ + } + +static struct oxnas_gpio_bank oxnas_gpio_banks[] = { + GPIO_BANK(0), + GPIO_BANK(1), +}; + +static int oxnas_pinctrl_probe(struct platform_device *pdev) +{ + struct oxnas_pinctrl *pctl; + + pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); + if (!pctl) + return -ENOMEM; + pctl->dev = &pdev->dev; + dev_set_drvdata(&pdev->dev, pctl); + + pctl->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, + "oxsemi,sys-ctrl"); + if (IS_ERR(pctl->regmap)) { + dev_err(&pdev->dev, "failed to get sys ctrl regmap\n"); + return -ENODEV; + } + + pctl->pins = oxnas_pins; + pctl->npins = ARRAY_SIZE(oxnas_pins); + pctl->functions = oxnas_functions; + pctl->nfunctions = ARRAY_SIZE(oxnas_functions); + pctl->groups = oxnas_groups; + pctl->ngroups = ARRAY_SIZE(oxnas_groups); + pctl->gpio_banks = oxnas_gpio_banks; + pctl->nbanks = ARRAY_SIZE(oxnas_gpio_banks); + + oxnas_pinctrl_desc.pins = pctl->pins; + oxnas_pinctrl_desc.npins = pctl->npins; + + pctl->pctldev = pinctrl_register(&oxnas_pinctrl_desc, + &pdev->dev, pctl); + if (IS_ERR(pctl->pctldev)) { + dev_err(&pdev->dev, "Failed to register pinctrl device\n"); + return PTR_ERR(pctl->pctldev); + } + + return 0; +} + +static int oxnas_gpio_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + struct of_phandle_args pinspec; + struct oxnas_gpio_bank *bank; + unsigned int id, ngpios; + int irq, ret; + struct resource *res; + + if (of_parse_phandle_with_fixed_args(np, "gpio-ranges", + 3, 0, &pinspec)) { + dev_err(&pdev->dev, "gpio-ranges property not found\n"); + return -EINVAL; + } + + id = pinspec.args[1] / PINS_PER_BANK; + ngpios = pinspec.args[2]; + + if (id >= ARRAY_SIZE(oxnas_gpio_banks)) { + dev_err(&pdev->dev, "invalid gpio-ranges base arg\n"); + return -EINVAL; + } + + if (ngpios > PINS_PER_BANK) { + dev_err(&pdev->dev, "invalid gpio-ranges count arg\n"); + return -EINVAL; + } + + bank = &oxnas_gpio_banks[id]; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + bank->reg_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(bank->reg_base)) + return PTR_ERR(bank->reg_base); + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + dev_err(&pdev->dev, "irq get failed\n"); + return irq; + } + + bank->id = id; + bank->gpio_chip.parent = &pdev->dev; + bank->gpio_chip.of_node = np; + bank->gpio_chip.ngpio = ngpios; + ret = gpiochip_add_data(&bank->gpio_chip, bank); + if (ret < 0) { + dev_err(&pdev->dev, "Failed to add GPIO chip %u: %d\n", + id, ret); + return ret; + } + + ret = gpiochip_irqchip_add(&bank->gpio_chip, &bank->irq_chip, + 0, handle_level_irq, IRQ_TYPE_NONE); + if (ret < 0) { + dev_err(&pdev->dev, "Failed to add IRQ chip %u: %d\n", + id, ret); + gpiochip_remove(&bank->gpio_chip); + return ret; + } + + gpiochip_set_chained_irqchip(&bank->gpio_chip, &bank->irq_chip, + irq, oxnas_gpio_irq_handler); + + return 0; +} + +static const struct of_device_id oxnas_pinctrl_of_match[] = { + { .compatible = "oxsemi,ox810se-pinctrl", }, + { }, +}; + +static struct platform_driver oxnas_pinctrl_driver = { + .driver = { + .name = "oxnas-pinctrl", + .of_match_table = oxnas_pinctrl_of_match, + .suppress_bind_attrs = true, + }, + .probe = oxnas_pinctrl_probe, +}; + +static const struct of_device_id oxnas_gpio_of_match[] = { + { .compatible = "oxsemi,ox810se-gpio", }, + { }, +}; + +static struct platform_driver oxnas_gpio_driver = { + .driver = { + .name = "oxnas-gpio", + .of_match_table = oxnas_gpio_of_match, + .suppress_bind_attrs = true, + }, + .probe = oxnas_gpio_probe, +}; + +static int __init oxnas_gpio_register(void) +{ + return platform_driver_register(&oxnas_gpio_driver); +} +arch_initcall(oxnas_gpio_register); + +static int __init oxnas_pinctrl_register(void) +{ + return platform_driver_register(&oxnas_pinctrl_driver); +} +arch_initcall(oxnas_pinctrl_register); diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index a91026e8cd7c..44902c63f507 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -360,7 +360,7 @@ static struct regmap_config rockchip_regmap_config = { .reg_stride = 4, }; -static const inline struct rockchip_pin_group *pinctrl_name_to_group( +static inline const struct rockchip_pin_group *pinctrl_name_to_group( const struct rockchip_pinctrl *info, const char *name) { @@ -2007,7 +2007,7 @@ static void rockchip_irq_gc_mask_clr_bit(struct irq_data *d) irq_gc_mask_clr_bit(d); } -void rockchip_irq_gc_mask_set_bit(struct irq_data *d) +static void rockchip_irq_gc_mask_set_bit(struct irq_data *d) { struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); struct rockchip_pin_bank *bank = gc->private; diff --git a/drivers/pinctrl/pinctrl-st.c b/drivers/pinctrl/pinctrl-st.c index d0ba968af5bb..0de1c67dfb94 100644 --- a/drivers/pinctrl/pinctrl-st.c +++ b/drivers/pinctrl/pinctrl-st.c @@ -844,7 +844,7 @@ static int st_pctl_get_group_pins(struct pinctrl_dev *pctldev, return 0; } -static const inline struct st_pctl_group *st_pctl_find_group_by_name( +static inline const struct st_pctl_group *st_pctl_find_group_by_name( const struct st_pinctrl *info, const char *name) { int i; diff --git a/drivers/pinctrl/pinctrl-u300.c b/drivers/pinctrl/pinctrl-u300.c index d1af908a7060..9cc80a500880 100644 --- a/drivers/pinctrl/pinctrl-u300.c +++ b/drivers/pinctrl/pinctrl-u300.c @@ -670,7 +670,7 @@ struct u300_pmx { * u300_pmx_registers - the array of registers read/written for each pinmux * shunt setting */ -const u32 u300_pmx_registers[] = { +static const u32 u300_pmx_registers[] = { U300_SYSCON_PMC1LR, U300_SYSCON_PMC1HR, U300_SYSCON_PMC2R, diff --git a/drivers/pinctrl/pinctrl-xway.c b/drivers/pinctrl/pinctrl-xway.c index a13f2b6f6fc0..dac88a2a1693 100644 --- a/drivers/pinctrl/pinctrl-xway.c +++ b/drivers/pinctrl/pinctrl-xway.c @@ -1616,50 +1616,74 @@ struct pinctrl_xway_soc { /* xway xr9 series (DEPRECATED: Use XWAY xRX100/xRX200 Family) */ static struct pinctrl_xway_soc xr9_pinctrl = { - XR9_MAX_PIN, xway_mfp, - xway_grps, ARRAY_SIZE(xway_grps), - xrx_funcs, ARRAY_SIZE(xrx_funcs), - xway_exin_pin_map, 6 + .pin_count = XR9_MAX_PIN, + .mfp = xway_mfp, + .grps = xway_grps, + .num_grps = ARRAY_SIZE(xway_grps), + .funcs = xrx_funcs, + .num_funcs = ARRAY_SIZE(xrx_funcs), + .exin = xway_exin_pin_map, + .num_exin = 6 }; /* XWAY AMAZON Family */ static struct pinctrl_xway_soc ase_pinctrl = { - ASE_MAX_PIN, ase_mfp, - ase_grps, ARRAY_SIZE(ase_grps), - ase_funcs, ARRAY_SIZE(ase_funcs), - ase_exin_pin_map, 3 + .pin_count = ASE_MAX_PIN, + .mfp = ase_mfp, + .grps = ase_grps, + .num_grps = ARRAY_SIZE(ase_grps), + .funcs = ase_funcs, + .num_funcs = ARRAY_SIZE(ase_funcs), + .exin = ase_exin_pin_map, + .num_exin = 3 }; /* XWAY DANUBE Family */ static struct pinctrl_xway_soc danube_pinctrl = { - DANUBE_MAX_PIN, danube_mfp, - danube_grps, ARRAY_SIZE(danube_grps), - danube_funcs, ARRAY_SIZE(danube_funcs), - danube_exin_pin_map, 3 + .pin_count = DANUBE_MAX_PIN, + .mfp = danube_mfp, + .grps = danube_grps, + .num_grps = ARRAY_SIZE(danube_grps), + .funcs = danube_funcs, + .num_funcs = ARRAY_SIZE(danube_funcs), + .exin = danube_exin_pin_map, + .num-exin = 3 }; /* XWAY xRX100 Family */ static struct pinctrl_xway_soc xrx100_pinctrl = { - XRX100_MAX_PIN, xrx100_mfp, - xrx100_grps, ARRAY_SIZE(xrx100_grps), - xrx100_funcs, ARRAY_SIZE(xrx100_funcs), - xrx100_exin_pin_map, 6 + .pin_count = XRX100_MAX_PIN, + .mfp = xrx100_mfp, + .grps = xrx100_grps, + .num_grps = ARRAY_SIZE(xrx100_grps), + .funcs = xrx100_funcs, + .num_funcs = ARRAY_SIZE(xrx100_funcs), + .exin = xrx100_exin_pin_map, + .num_exin = 6 }; /* XWAY xRX200 Family */ static struct pinctrl_xway_soc xrx200_pinctrl = { - XRX200_MAX_PIN, xrx200_mfp, - xrx200_grps, ARRAY_SIZE(xrx200_grps), - xrx200_funcs, ARRAY_SIZE(xrx200_funcs), - xrx200_exin_pin_map, 6 + .pin_count = XRX200_MAX_PIN, + .mfp = xrx200_mfp, + .grps = xrx200_grps, + .num_grps = ARRAY_SIZE(xrx200_grps), + .funcs = xrx200_funcs, + .num_funcs = ARRAY_SIZE(xrx200_funcs), + .exin = xrx200_exin_pin_map, + .num_exin = 6 }; /* XWAY xRX300 Family */ static struct pinctrl_xway_soc xrx300_pinctrl = { - XRX300_MAX_PIN, xrx300_mfp, - xrx300_grps, ARRAY_SIZE(xrx300_grps), - xrx300_funcs, ARRAY_SIZE(xrx300_funcs), - xrx300_exin_pin_map, 5 + .pin_count = XRX300_MAX_PIN, + .mfp = xrx300_mfp, + .grps = xrx300_grps, + .num_grps = ARRAY_SIZE(xrx300_grps), + .funcs = xrx300_funcs, + .num_funcs = ARRAY_SIZE(xrx300_funcs), + .exin = xrx300_exin_pin_map, + .num_exin = 5 }; static struct pinctrl_gpio_range xway_gpio_range = { diff --git a/drivers/pinctrl/pinctrl-zynq.c b/drivers/pinctrl/pinctrl-zynq.c index 8fdc60c5aeaf..7afdbede6823 100644 --- a/drivers/pinctrl/pinctrl-zynq.c +++ b/drivers/pinctrl/pinctrl-zynq.c @@ -20,7 +20,7 @@ */ #include <linux/io.h> #include <linux/mfd/syscon.h> -#include <linux/module.h> +#include <linux/init.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/pinctrl/pinctrl.h> @@ -1210,7 +1210,6 @@ static const struct of_device_id zynq_pinctrl_of_match[] = { { .compatible = "xlnx,pinctrl-zynq" }, { } }; -MODULE_DEVICE_TABLE(of, zynq_pinctrl_of_match); static struct platform_driver zynq_pinctrl_driver = { .driver = { @@ -1225,13 +1224,3 @@ static int __init zynq_pinctrl_init(void) return platform_driver_register(&zynq_pinctrl_driver); } arch_initcall(zynq_pinctrl_init); - -static void __exit zynq_pinctrl_exit(void) -{ - platform_driver_unregister(&zynq_pinctrl_driver); -} -module_exit(zynq_pinctrl_exit); - -MODULE_AUTHOR("Sören Brinkmann <soren.brinkmann@xilinx.com>"); -MODULE_DESCRIPTION("Xilinx Zynq pinctrl driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c index c223a9ef1fe1..ece702881946 100644 --- a/drivers/pinctrl/pinmux.c +++ b/drivers/pinctrl/pinmux.c @@ -256,7 +256,7 @@ int pinmux_request_gpio(struct pinctrl_dev *pctldev, /* Conjure some name stating what chip and pin this is taken by */ owner = kasprintf(GFP_KERNEL, "%s:%d", range->name, gpio); if (!owner) - return -EINVAL; + return -ENOMEM; ret = pin_request(pctldev, pin, owner, range); if (ret < 0) @@ -606,23 +606,17 @@ static int pinmux_pins_show(struct seq_file *s, void *what) if (pmxops->strict) { if (desc->mux_owner) seq_printf(s, "pin %d (%s): device %s%s", - pin, - desc->name ? desc->name : "unnamed", - desc->mux_owner, + pin, desc->name, desc->mux_owner, is_hog ? " (HOG)" : ""); else if (desc->gpio_owner) seq_printf(s, "pin %d (%s): GPIO %s", - pin, - desc->name ? desc->name : "unnamed", - desc->gpio_owner); + pin, desc->name, desc->gpio_owner); else seq_printf(s, "pin %d (%s): UNCLAIMED", - pin, - desc->name ? desc->name : "unnamed"); + pin, desc->name); } else { /* For non-strict controllers */ - seq_printf(s, "pin %d (%s): %s %s%s", pin, - desc->name ? desc->name : "unnamed", + seq_printf(s, "pin %d (%s): %s %s%s", pin, desc->name, desc->mux_owner ? desc->mux_owner : "(MUX UNCLAIMED)", desc->gpio_owner ? desc->gpio_owner diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c b/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c index 9191727aff5e..0d1392fc32dd 100644 --- a/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c +++ b/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c @@ -744,6 +744,7 @@ static int pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl, static const struct of_device_id pm8xxx_mpp_of_match[] = { { .compatible = "qcom,pm8018-mpp" }, { .compatible = "qcom,pm8038-mpp" }, + { .compatible = "qcom,pm8058-mpp" }, { .compatible = "qcom,pm8917-mpp" }, { .compatible = "qcom,pm8821-mpp" }, { .compatible = "qcom,pm8921-mpp" }, diff --git a/drivers/pinctrl/samsung/pinctrl-exynos5440.c b/drivers/pinctrl/samsung/pinctrl-exynos5440.c index fb71fc3e5aa0..3000df80709f 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos5440.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos5440.c @@ -998,6 +998,7 @@ static struct platform_driver exynos5440_pinctrl_driver = { .driver = { .name = "exynos5440-pinctrl", .of_match_table = exynos5440_pinctrl_dt_match, + .suppress_bind_attrs = true, }, }; diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c index ed0b70881e19..513fe6b23248 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c @@ -1274,6 +1274,7 @@ static struct platform_driver samsung_pinctrl_driver = { .driver = { .name = "samsung-pinctrl", .of_match_table = samsung_pinctrl_dt_match, + .suppress_bind_attrs = true, }, }; diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c index ae9fab82a1b9..4ae596bf19b5 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32.c +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c @@ -638,8 +638,8 @@ static u32 stm32_pconf_get_bias(struct stm32_gpio_bank *bank, return (val >> (offset * 2)); } -static bool stm32_pconf_input_get(struct stm32_gpio_bank *bank, - unsigned int offset) +static bool stm32_pconf_get(struct stm32_gpio_bank *bank, + unsigned int offset, bool dir) { unsigned long flags; u32 val; @@ -647,23 +647,12 @@ static bool stm32_pconf_input_get(struct stm32_gpio_bank *bank, clk_enable(bank->clk); spin_lock_irqsave(&bank->lock, flags); - val = !!(readl_relaxed(bank->base + STM32_GPIO_IDR) & BIT(offset)); - - spin_unlock_irqrestore(&bank->lock, flags); - clk_disable(bank->clk); - - return val; -} - -static bool stm32_pconf_output_get(struct stm32_gpio_bank *bank, - unsigned int offset) -{ - unsigned long flags; - u32 val; - - clk_enable(bank->clk); - spin_lock_irqsave(&bank->lock, flags); - val = !!(readl_relaxed(bank->base + STM32_GPIO_ODR) & BIT(offset)); + if (dir) + val = !!(readl_relaxed(bank->base + STM32_GPIO_IDR) & + BIT(offset)); + else + val = !!(readl_relaxed(bank->base + STM32_GPIO_ODR) & + BIT(offset)); spin_unlock_irqrestore(&bank->lock, flags); clk_disable(bank->clk); @@ -772,7 +761,7 @@ static void stm32_pconf_dbg_show(struct pinctrl_dev *pctldev, switch (mode) { /* input */ case 0: - val = stm32_pconf_input_get(bank, offset); + val = stm32_pconf_get(bank, offset, true); seq_printf(s, "- %s - %s", val ? "high" : "low", biasing[bias]); @@ -782,7 +771,7 @@ static void stm32_pconf_dbg_show(struct pinctrl_dev *pctldev, case 1: drive = stm32_pconf_get_driving(bank, offset); speed = stm32_pconf_get_speed(bank, offset); - val = stm32_pconf_output_get(bank, offset); + val = stm32_pconf_get(bank, offset, false); seq_printf(s, "- %s - %s - %s - %s %s", val ? "high" : "low", drive ? "open drain" : "push pull", diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c index 6e82b290cb4f..277622b4b6fb 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra.c @@ -632,11 +632,11 @@ static void tegra_pinctrl_clear_parked_bits(struct tegra_pmx *pmx) u32 val; for (i = 0; i < pmx->soc->ngroups; ++i) { - if (pmx->soc->groups[i].parked_reg >= 0) { - g = &pmx->soc->groups[i]; - val = pmx_readl(pmx, g->parked_bank, g->parked_reg); + g = &pmx->soc->groups[i]; + if (g->parked_bit >= 0) { + val = pmx_readl(pmx, g->mux_bank, g->mux_reg); val &= ~(1 << g->parked_bit); - pmx_writel(pmx, val, g->parked_bank, g->parked_reg); + pmx_writel(pmx, val, g->mux_bank, g->mux_reg); } } } diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.h b/drivers/pinctrl/tegra/pinctrl-tegra.h index d2ced17382b5..33b17cb1471e 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra.h +++ b/drivers/pinctrl/tegra/pinctrl-tegra.h @@ -93,9 +93,7 @@ struct tegra_function { * @tri_reg: Tri-state register offset. * @tri_bank: Tri-state register bank. * @tri_bit: Tri-state register bit. - * @parked_reg: Parked register offset. -1 if unsupported. - * @parked_bank: Parked register bank. 0 if unsupported. - * @parked_bit: Parked register bit. 0 if unsupported. + * @parked_bit: Parked register bit. -1 if unsupported. * @einput_bit: Enable-input register bit. * @odrain_bit: Open-drain register bit. * @lock_bit: Lock register bit. @@ -138,12 +136,10 @@ struct tegra_pingroup { s16 pupd_reg; s16 tri_reg; s16 drv_reg; - s16 parked_reg; u32 mux_bank:2; u32 pupd_bank:2; u32 tri_bank:2; u32 drv_bank:2; - u32 parked_bank:2; s32 mux_bit:6; s32 pupd_bit:6; s32 tri_bit:6; diff --git a/drivers/pinctrl/tegra/pinctrl-tegra114.c b/drivers/pinctrl/tegra/pinctrl-tegra114.c index 4851d169f4c7..952132ce5ea0 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra114.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra114.c @@ -1578,7 +1578,7 @@ static struct tegra_function tegra114_functions[] = { .lock_bit = 7, \ .ioreset_bit = PINGROUP_BIT_##ior(8), \ .rcv_sel_bit = PINGROUP_BIT_##rcv_sel(9), \ - .parked_reg = -1, \ + .parked_bit = -1, \ .drv_reg = -1, \ } @@ -1599,7 +1599,7 @@ static struct tegra_function tegra114_functions[] = { .rcv_sel_bit = -1, \ .drv_reg = DRV_PINGROUP_REG(r), \ .drv_bank = 0, \ - .parked_reg = -1, \ + .parked_bit = -1, \ .hsm_bit = hsm_b, \ .schmitt_bit = schmitt_b, \ .lpmd_bit = lpmd_b, \ diff --git a/drivers/pinctrl/tegra/pinctrl-tegra124.c b/drivers/pinctrl/tegra/pinctrl-tegra124.c index a0ce723a9482..bca239e3ae50 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra124.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra124.c @@ -1747,7 +1747,7 @@ static struct tegra_function tegra124_functions[] = { .lock_bit = 7, \ .ioreset_bit = PINGROUP_BIT_##ior(8), \ .rcv_sel_bit = PINGROUP_BIT_##rcv_sel(9), \ - .parked_reg = -1, \ + .parked_bit = -1, \ .drv_reg = -1, \ } @@ -1768,7 +1768,7 @@ static struct tegra_function tegra124_functions[] = { .rcv_sel_bit = -1, \ .drv_reg = DRV_PINGROUP_REG(r), \ .drv_bank = 0, \ - .parked_reg = -1, \ + .parked_bit = -1, \ .hsm_bit = hsm_b, \ .schmitt_bit = schmitt_b, \ .lpmd_bit = lpmd_b, \ diff --git a/drivers/pinctrl/tegra/pinctrl-tegra20.c b/drivers/pinctrl/tegra/pinctrl-tegra20.c index 09bad6980ad1..ad62451a5a9b 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra20.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra20.c @@ -1994,7 +1994,7 @@ static struct tegra_function tegra20_functions[] = { .tri_reg = ((tri_r) - TRISTATE_REG_A), \ .tri_bank = 0, \ .tri_bit = tri_b, \ - .parked_reg = -1, \ + .parked_bit = -1, \ .einput_bit = -1, \ .odrain_bit = -1, \ .lock_bit = -1, \ @@ -2014,7 +2014,7 @@ static struct tegra_function tegra20_functions[] = { .pupd_bank = 2, \ .pupd_bit = pupd_b, \ .drv_reg = -1, \ - .parked_reg = -1, \ + .parked_bit = -1, \ } /* Pin groups for drive strength registers (configurable version) */ @@ -2030,7 +2030,7 @@ static struct tegra_function tegra20_functions[] = { .tri_reg = -1, \ .drv_reg = ((r) - PINGROUP_REG_A), \ .drv_bank = 3, \ - .parked_reg = -1, \ + .parked_bit = -1, \ .hsm_bit = hsm_b, \ .schmitt_bit = schmitt_b, \ .lpmd_bit = lpmd_b, \ diff --git a/drivers/pinctrl/tegra/pinctrl-tegra210.c b/drivers/pinctrl/tegra/pinctrl-tegra210.c index 2d856af389ef..2b70e93da9db 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra210.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra210.c @@ -1310,8 +1310,6 @@ static struct tegra_function tegra210_functions[] = { .lock_bit = 7, \ .ioreset_bit = -1, \ .rcv_sel_bit = PINGROUP_BIT_##e_io_hv(10), \ - .parked_reg = PINGROUP_REG(r), \ - .parked_bank = 1, \ .parked_bit = 5, \ .hsm_bit = PINGROUP_BIT_##hsm(9), \ .schmitt_bit = 12, \ @@ -1345,7 +1343,7 @@ static struct tegra_function tegra210_functions[] = { .rcv_sel_bit = -1, \ .drv_reg = DRV_PINGROUP_REG(r), \ .drv_bank = 0, \ - .parked_reg = -1, \ + .parked_bit = -1, \ .hsm_bit = -1, \ .schmitt_bit = -1, \ .lpmd_bit = -1, \ diff --git a/drivers/pinctrl/tegra/pinctrl-tegra30.c b/drivers/pinctrl/tegra/pinctrl-tegra30.c index fb7817fea2d9..474ac6daf513 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra30.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra30.c @@ -2139,7 +2139,7 @@ static struct tegra_function tegra30_functions[] = { .lock_bit = 7, \ .ioreset_bit = PINGROUP_BIT_##ior(8), \ .rcv_sel_bit = -1, \ - .parked_reg = -1, \ + .parked_bit = -1, \ .drv_reg = -1, \ } @@ -2160,7 +2160,7 @@ static struct tegra_function tegra30_functions[] = { .rcv_sel_bit = -1, \ .drv_reg = DRV_PINGROUP_REG(r), \ .drv_bank = 0, \ - .parked_reg = -1, \ + .parked_bit = -1, \ .hsm_bit = hsm_b, \ .schmitt_bit = schmitt_b, \ .lpmd_bit = lpmd_b, \ diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 0b40ded5738f..e077a9ec23d9 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -10,26 +10,34 @@ if PINCTRL_UNIPHIER config PINCTRL_UNIPHIER_LD4 tristate "UniPhier PH1-LD4 SoC pinctrl driver" - default y + default ARM config PINCTRL_UNIPHIER_PRO4 tristate "UniPhier PH1-Pro4 SoC pinctrl driver" - default y + default ARM config PINCTRL_UNIPHIER_SLD8 tristate "UniPhier PH1-sLD8 SoC pinctrl driver" - default y + default ARM config PINCTRL_UNIPHIER_PRO5 tristate "UniPhier PH1-Pro5 SoC pinctrl driver" - default y + default ARM config PINCTRL_UNIPHIER_PXS2 tristate "UniPhier ProXstream2 SoC pinctrl driver" - default y + default ARM config PINCTRL_UNIPHIER_LD6B tristate "UniPhier PH1-LD6b SoC pinctrl driver" - default y + default ARM + +config PINCTRL_UNIPHIER_LD11 + tristate "UniPhier PH1-LD11 SoC pinctrl driver" + default ARM64 + +config PINCTRL_UNIPHIER_LD20 + tristate "UniPhier PH1-LD20 SoC pinctrl driver" + default ARM64 endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index 3b8f9ee0bb6f..9f4bc8aa6f68 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -6,3 +6,5 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_SLD8) += pinctrl-uniphier-sld8.o obj-$(CONFIG_PINCTRL_UNIPHIER_PRO5) += pinctrl-uniphier-pro5.o obj-$(CONFIG_PINCTRL_UNIPHIER_PXS2) += pinctrl-uniphier-pxs2.o obj-$(CONFIG_PINCTRL_UNIPHIER_LD6B) += pinctrl-uniphier-ld6b.o +obj-$(CONFIG_PINCTRL_UNIPHIER_LD11) += pinctrl-uniphier-ld11.o +obj-$(CONFIG_PINCTRL_UNIPHIER_LD20) += pinctrl-uniphier-ld20.o diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c index 967400971d45..9b2ee717bccc 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c @@ -14,6 +14,7 @@ #include <linux/export.h> #include <linux/mfd/syscon.h> +#include <linux/of.h> #include <linux/pinctrl/pinconf.h> #include <linux/pinctrl/pinconf-generic.h> #include <linux/pinctrl/pinctrl.h> @@ -26,8 +27,10 @@ #include "pinctrl-uniphier.h" struct uniphier_pinctrl_priv { + struct pinctrl_desc pctldesc; struct pinctrl_dev *pctldev; struct regmap *regmap; + unsigned int regbase; struct uniphier_pinctrl_socdata *socdata; }; @@ -63,16 +66,22 @@ static int uniphier_pctl_get_group_pins(struct pinctrl_dev *pctldev, static void uniphier_pctl_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, unsigned offset) { - const struct pinctrl_pin_desc *pin = &pctldev->desc->pins[offset]; - const char *pull_dir, *drv_str; + const struct pin_desc *desc = pin_desc_get(pctldev, offset); + const char *pull_dir, *drv_type; - switch (uniphier_pin_get_pull_dir(pin->drv_data)) { + switch (uniphier_pin_get_pull_dir(desc->drv_data)) { case UNIPHIER_PIN_PULL_UP: pull_dir = "UP"; break; case UNIPHIER_PIN_PULL_DOWN: pull_dir = "DOWN"; break; + case UNIPHIER_PIN_PULL_UP_FIXED: + pull_dir = "UP(FIXED)"; + break; + case UNIPHIER_PIN_PULL_DOWN_FIXED: + pull_dir = "DOWN(FIXED)"; + break; case UNIPHIER_PIN_PULL_NONE: pull_dir = "NONE"; break; @@ -80,30 +89,33 @@ static void uniphier_pctl_pin_dbg_show(struct pinctrl_dev *pctldev, BUG(); } - switch (uniphier_pin_get_drv_str(pin->drv_data)) { - case UNIPHIER_PIN_DRV_4_8: - drv_str = "4/8(mA)"; + switch (uniphier_pin_get_drv_type(desc->drv_data)) { + case UNIPHIER_PIN_DRV_1BIT: + drv_type = "4/8(mA)"; + break; + case UNIPHIER_PIN_DRV_2BIT: + drv_type = "8/12/16/20(mA)"; break; - case UNIPHIER_PIN_DRV_8_12_16_20: - drv_str = "8/12/16/20(mA)"; + case UNIPHIER_PIN_DRV_3BIT: + drv_type = "4/5/7/9/11/12/14/16(mA)"; break; - case UNIPHIER_PIN_DRV_FIXED_4: - drv_str = "4(mA)"; + case UNIPHIER_PIN_DRV_FIXED4: + drv_type = "4(mA)"; break; - case UNIPHIER_PIN_DRV_FIXED_5: - drv_str = "5(mA)"; + case UNIPHIER_PIN_DRV_FIXED5: + drv_type = "5(mA)"; break; - case UNIPHIER_PIN_DRV_FIXED_8: - drv_str = "8(mA)"; + case UNIPHIER_PIN_DRV_FIXED8: + drv_type = "8(mA)"; break; case UNIPHIER_PIN_DRV_NONE: - drv_str = "NONE"; + drv_type = "NONE"; break; default: BUG(); } - seq_printf(s, " PULL_DIR=%s DRV_STR=%s", pull_dir, drv_str); + seq_printf(s, " PULL_DIR=%s DRV_TYPE=%s", pull_dir, drv_type); } #endif @@ -119,12 +131,12 @@ static const struct pinctrl_ops uniphier_pctlops = { }; static int uniphier_conf_pin_bias_get(struct pinctrl_dev *pctldev, - const struct pinctrl_pin_desc *pin, + const struct pin_desc *desc, enum pin_config_param param) { struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); enum uniphier_pin_pull_dir pull_dir = - uniphier_pin_get_pull_dir(pin->drv_data); + uniphier_pin_get_pull_dir(desc->drv_data); unsigned int pupdctrl, reg, shift, val; unsigned int expected = 1; int ret; @@ -154,12 +166,12 @@ static int uniphier_conf_pin_bias_get(struct pinctrl_dev *pctldev, BUG(); } - pupdctrl = uniphier_pin_get_pupdctrl(pin->drv_data); + pupdctrl = uniphier_pin_get_pupdctrl(desc->drv_data); reg = UNIPHIER_PINCTRL_PUPDCTRL_BASE + pupdctrl / 32 * 4; shift = pupdctrl % 32; - ret = regmap_read(priv->regmap, reg, &val); + ret = regmap_read(priv->regmap, priv->regbase + reg, &val); if (ret) return ret; @@ -169,34 +181,42 @@ static int uniphier_conf_pin_bias_get(struct pinctrl_dev *pctldev, } static int uniphier_conf_pin_drive_get(struct pinctrl_dev *pctldev, - const struct pinctrl_pin_desc *pin, + const struct pin_desc *desc, u16 *strength) { struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); - enum uniphier_pin_drv_str drv_str = - uniphier_pin_get_drv_str(pin->drv_data); - const unsigned int strength_4_8[] = {4, 8}; - const unsigned int strength_8_12_16_20[] = {8, 12, 16, 20}; + enum uniphier_pin_drv_type type = + uniphier_pin_get_drv_type(desc->drv_data); + const unsigned int strength_1bit[] = {4, 8}; + const unsigned int strength_2bit[] = {8, 12, 16, 20}; + const unsigned int strength_3bit[] = {4, 5, 7, 9, 11, 12, 14, 16}; const unsigned int *supported_strength; unsigned int drvctrl, reg, shift, mask, width, val; int ret; - switch (drv_str) { - case UNIPHIER_PIN_DRV_4_8: - supported_strength = strength_4_8; + switch (type) { + case UNIPHIER_PIN_DRV_1BIT: + supported_strength = strength_1bit; + reg = UNIPHIER_PINCTRL_DRVCTRL_BASE; width = 1; break; - case UNIPHIER_PIN_DRV_8_12_16_20: - supported_strength = strength_8_12_16_20; + case UNIPHIER_PIN_DRV_2BIT: + supported_strength = strength_2bit; + reg = UNIPHIER_PINCTRL_DRV2CTRL_BASE; width = 2; break; - case UNIPHIER_PIN_DRV_FIXED_4: + case UNIPHIER_PIN_DRV_3BIT: + supported_strength = strength_3bit; + reg = UNIPHIER_PINCTRL_DRV3CTRL_BASE; + width = 4; + break; + case UNIPHIER_PIN_DRV_FIXED4: *strength = 4; return 0; - case UNIPHIER_PIN_DRV_FIXED_5: + case UNIPHIER_PIN_DRV_FIXED5: *strength = 5; return 0; - case UNIPHIER_PIN_DRV_FIXED_8: + case UNIPHIER_PIN_DRV_FIXED8: *strength = 8; return 0; default: @@ -204,17 +224,14 @@ static int uniphier_conf_pin_drive_get(struct pinctrl_dev *pctldev, return -EINVAL; } - drvctrl = uniphier_pin_get_drvctrl(pin->drv_data); + drvctrl = uniphier_pin_get_drvctrl(desc->drv_data); drvctrl *= width; - reg = (width == 2) ? UNIPHIER_PINCTRL_DRV2CTRL_BASE : - UNIPHIER_PINCTRL_DRVCTRL_BASE; - reg += drvctrl / 32 * 4; shift = drvctrl % 32; mask = (1U << width) - 1; - ret = regmap_read(priv->regmap, reg, &val); + ret = regmap_read(priv->regmap, priv->regbase + reg, &val); if (ret) return ret; @@ -224,10 +241,10 @@ static int uniphier_conf_pin_drive_get(struct pinctrl_dev *pctldev, } static int uniphier_conf_pin_input_enable_get(struct pinctrl_dev *pctldev, - const struct pinctrl_pin_desc *pin) + const struct pin_desc *desc) { struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); - unsigned int iectrl = uniphier_pin_get_iectrl(pin->drv_data); + unsigned int iectrl = uniphier_pin_get_iectrl(desc->drv_data); unsigned int val; int ret; @@ -235,7 +252,8 @@ static int uniphier_conf_pin_input_enable_get(struct pinctrl_dev *pctldev, /* This pin is always input-enabled. */ return 0; - ret = regmap_read(priv->regmap, UNIPHIER_PINCTRL_IECTRL, &val); + ret = regmap_read(priv->regmap, + priv->regbase + UNIPHIER_PINCTRL_IECTRL, &val); if (ret) return ret; @@ -246,7 +264,7 @@ static int uniphier_conf_pin_config_get(struct pinctrl_dev *pctldev, unsigned pin, unsigned long *configs) { - const struct pinctrl_pin_desc *pin_desc = &pctldev->desc->pins[pin]; + const struct pin_desc *desc = pin_desc_get(pctldev, pin); enum pin_config_param param = pinconf_to_config_param(*configs); bool has_arg = false; u16 arg; @@ -256,14 +274,14 @@ static int uniphier_conf_pin_config_get(struct pinctrl_dev *pctldev, case PIN_CONFIG_BIAS_DISABLE: case PIN_CONFIG_BIAS_PULL_UP: case PIN_CONFIG_BIAS_PULL_DOWN: - ret = uniphier_conf_pin_bias_get(pctldev, pin_desc, param); + ret = uniphier_conf_pin_bias_get(pctldev, desc, param); break; case PIN_CONFIG_DRIVE_STRENGTH: - ret = uniphier_conf_pin_drive_get(pctldev, pin_desc, &arg); + ret = uniphier_conf_pin_drive_get(pctldev, desc, &arg); has_arg = true; break; case PIN_CONFIG_INPUT_ENABLE: - ret = uniphier_conf_pin_input_enable_get(pctldev, pin_desc); + ret = uniphier_conf_pin_input_enable_get(pctldev, desc); break; default: /* unsupported parameter */ @@ -278,13 +296,12 @@ static int uniphier_conf_pin_config_get(struct pinctrl_dev *pctldev, } static int uniphier_conf_pin_bias_set(struct pinctrl_dev *pctldev, - const struct pinctrl_pin_desc *pin, - enum pin_config_param param, - u16 arg) + const struct pin_desc *desc, + enum pin_config_param param, u16 arg) { struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); enum uniphier_pin_pull_dir pull_dir = - uniphier_pin_get_pull_dir(pin->drv_data); + uniphier_pin_get_pull_dir(desc->drv_data); unsigned int pupdctrl, reg, shift; unsigned int val = 1; @@ -295,8 +312,8 @@ static int uniphier_conf_pin_bias_set(struct pinctrl_dev *pctldev, if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED || pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED) { dev_err(pctldev->dev, - "can not disable pull register for pin %u (%s)\n", - pin->number, pin->name); + "can not disable pull register for pin %s\n", + desc->name); return -EINVAL; } val = 0; @@ -306,8 +323,8 @@ static int uniphier_conf_pin_bias_set(struct pinctrl_dev *pctldev, return 0; if (pull_dir != UNIPHIER_PIN_PULL_UP) { dev_err(pctldev->dev, - "pull-up is unsupported for pin %u (%s)\n", - pin->number, pin->name); + "pull-up is unsupported for pin %s\n", + desc->name); return -EINVAL; } if (arg == 0) { @@ -320,8 +337,8 @@ static int uniphier_conf_pin_bias_set(struct pinctrl_dev *pctldev, return 0; if (pull_dir != UNIPHIER_PIN_PULL_DOWN) { dev_err(pctldev->dev, - "pull-down is unsupported for pin %u (%s)\n", - pin->number, pin->name); + "pull-down is unsupported for pin %s\n", + desc->name); return -EINVAL; } if (arg == 0) { @@ -332,8 +349,8 @@ static int uniphier_conf_pin_bias_set(struct pinctrl_dev *pctldev, case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: if (pull_dir == UNIPHIER_PIN_PULL_NONE) { dev_err(pctldev->dev, - "pull-up/down is unsupported for pin %u (%s)\n", - pin->number, pin->name); + "pull-up/down is unsupported for pin %s\n", + desc->name); return -EINVAL; } @@ -344,39 +361,48 @@ static int uniphier_conf_pin_bias_set(struct pinctrl_dev *pctldev, BUG(); } - pupdctrl = uniphier_pin_get_pupdctrl(pin->drv_data); + pupdctrl = uniphier_pin_get_pupdctrl(desc->drv_data); reg = UNIPHIER_PINCTRL_PUPDCTRL_BASE + pupdctrl / 32 * 4; shift = pupdctrl % 32; - return regmap_update_bits(priv->regmap, reg, 1 << shift, val << shift); + return regmap_update_bits(priv->regmap, priv->regbase + reg, + 1 << shift, val << shift); } static int uniphier_conf_pin_drive_set(struct pinctrl_dev *pctldev, - const struct pinctrl_pin_desc *pin, + const struct pin_desc *desc, u16 strength) { struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); - enum uniphier_pin_drv_str drv_str = - uniphier_pin_get_drv_str(pin->drv_data); - const unsigned int strength_4_8[] = {4, 8, -1}; - const unsigned int strength_8_12_16_20[] = {8, 12, 16, 20, -1}; + enum uniphier_pin_drv_type type = + uniphier_pin_get_drv_type(desc->drv_data); + const unsigned int strength_1bit[] = {4, 8, -1}; + const unsigned int strength_2bit[] = {8, 12, 16, 20, -1}; + const unsigned int strength_3bit[] = {4, 5, 7, 9, 11, 12, 14, 16, -1}; const unsigned int *supported_strength; unsigned int drvctrl, reg, shift, mask, width, val; - switch (drv_str) { - case UNIPHIER_PIN_DRV_4_8: - supported_strength = strength_4_8; + switch (type) { + case UNIPHIER_PIN_DRV_1BIT: + supported_strength = strength_1bit; + reg = UNIPHIER_PINCTRL_DRVCTRL_BASE; width = 1; break; - case UNIPHIER_PIN_DRV_8_12_16_20: - supported_strength = strength_8_12_16_20; + case UNIPHIER_PIN_DRV_2BIT: + supported_strength = strength_2bit; + reg = UNIPHIER_PINCTRL_DRV2CTRL_BASE; width = 2; break; + case UNIPHIER_PIN_DRV_3BIT: + supported_strength = strength_3bit; + reg = UNIPHIER_PINCTRL_DRV3CTRL_BASE; + width = 4; + break; default: dev_err(pctldev->dev, - "cannot change drive strength for pin %u (%s)\n", - pin->number, pin->name); + "cannot change drive strength for pin %s\n", + desc->name); return -EINVAL; } @@ -387,49 +413,48 @@ static int uniphier_conf_pin_drive_set(struct pinctrl_dev *pctldev, if (val == 0) { dev_err(pctldev->dev, - "unsupported drive strength %u mA for pin %u (%s)\n", - strength, pin->number, pin->name); + "unsupported drive strength %u mA for pin %s\n", + strength, desc->name); return -EINVAL; } val--; - drvctrl = uniphier_pin_get_drvctrl(pin->drv_data); + drvctrl = uniphier_pin_get_drvctrl(desc->drv_data); drvctrl *= width; - reg = (width == 2) ? UNIPHIER_PINCTRL_DRV2CTRL_BASE : - UNIPHIER_PINCTRL_DRVCTRL_BASE; - reg += drvctrl / 32 * 4; shift = drvctrl % 32; mask = (1U << width) - 1; - return regmap_update_bits(priv->regmap, reg, + return regmap_update_bits(priv->regmap, priv->regbase + reg, mask << shift, val << shift); } static int uniphier_conf_pin_input_enable(struct pinctrl_dev *pctldev, - const struct pinctrl_pin_desc *pin, + const struct pin_desc *desc, u16 enable) { struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); - unsigned int iectrl = uniphier_pin_get_iectrl(pin->drv_data); + unsigned int iectrl = uniphier_pin_get_iectrl(desc->drv_data); + unsigned int reg, mask; - if (enable == 0) { - /* - * Multiple pins share one input enable, so per-pin disabling - * is impossible. - */ - dev_err(pctldev->dev, "unable to disable input\n"); + /* + * Multiple pins share one input enable, per-pin disabling is + * impossible. + */ + if (!(priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL) && + !enable) return -EINVAL; - } + /* UNIPHIER_PIN_IECTRL_NONE means the pin is always input-enabled */ if (iectrl == UNIPHIER_PIN_IECTRL_NONE) - /* This pin is always input-enabled. nothing to do. */ - return 0; + return enable ? 0 : -EINVAL; + + reg = priv->regbase + UNIPHIER_PINCTRL_IECTRL + iectrl / 32 * 4; + mask = BIT(iectrl % 32); - return regmap_update_bits(priv->regmap, UNIPHIER_PINCTRL_IECTRL, - BIT(iectrl), BIT(iectrl)); + return regmap_update_bits(priv->regmap, reg, mask, enable ? mask : 0); } static int uniphier_conf_pin_config_set(struct pinctrl_dev *pctldev, @@ -437,7 +462,7 @@ static int uniphier_conf_pin_config_set(struct pinctrl_dev *pctldev, unsigned long *configs, unsigned num_configs) { - const struct pinctrl_pin_desc *pin_desc = &pctldev->desc->pins[pin]; + const struct pin_desc *desc = pin_desc_get(pctldev, pin); int i, ret; for (i = 0; i < num_configs; i++) { @@ -450,16 +475,15 @@ static int uniphier_conf_pin_config_set(struct pinctrl_dev *pctldev, case PIN_CONFIG_BIAS_PULL_UP: case PIN_CONFIG_BIAS_PULL_DOWN: case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: - ret = uniphier_conf_pin_bias_set(pctldev, pin_desc, + ret = uniphier_conf_pin_bias_set(pctldev, desc, param, arg); break; case PIN_CONFIG_DRIVE_STRENGTH: - ret = uniphier_conf_pin_drive_set(pctldev, pin_desc, - arg); + ret = uniphier_conf_pin_drive_set(pctldev, desc, arg); break; case PIN_CONFIG_INPUT_ENABLE: - ret = uniphier_conf_pin_input_enable(pctldev, - pin_desc, arg); + ret = uniphier_conf_pin_input_enable(pctldev, desc, + arg); break; default: dev_err(pctldev->dev, @@ -531,20 +555,42 @@ static int uniphier_pmx_get_function_groups(struct pinctrl_dev *pctldev, } static int uniphier_pmx_set_one_mux(struct pinctrl_dev *pctldev, unsigned pin, - unsigned muxval) + int muxval) { struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); - unsigned mux_bits = priv->socdata->mux_bits; - unsigned reg_stride = priv->socdata->reg_stride; - unsigned reg, reg_end, shift, mask; + unsigned int mux_bits, reg_stride, reg, reg_end, shift, mask; + bool load_pinctrl; int ret; /* some pins need input-enabling */ ret = uniphier_conf_pin_input_enable(pctldev, - &pctldev->desc->pins[pin], 1); + pin_desc_get(pctldev, pin), 1); if (ret) return ret; + if (muxval < 0) + return 0; /* dedicated pin; nothing to do for pin-mux */ + + if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE) { + /* + * Mode reg_offset bit_position + * Normal 4 * n shift+3:shift + * Debug 4 * n shift+7:shift+4 + */ + mux_bits = 4; + reg_stride = 8; + load_pinctrl = true; + } else { + /* + * Mode reg_offset bit_position + * Normal 8 * n shift+3:shift + * Debug 8 * n + 4 shift+3:shift + */ + mux_bits = 8; + reg_stride = 4; + load_pinctrl = false; + } + reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride; reg_end = reg + reg_stride; shift = pin * mux_bits % 32; @@ -555,16 +601,17 @@ static int uniphier_pmx_set_one_mux(struct pinctrl_dev *pctldev, unsigned pin, * stored in the offset+4. */ for (; reg < reg_end; reg += 4) { - ret = regmap_update_bits(priv->regmap, reg, + ret = regmap_update_bits(priv->regmap, priv->regbase + reg, mask << shift, muxval << shift); if (ret) return ret; muxval >>= mux_bits; } - if (priv->socdata->load_pinctrl) { + if (load_pinctrl) { ret = regmap_write(priv->regmap, - UNIPHIER_PINCTRL_LOAD_PINMUX, 1); + priv->regbase + UNIPHIER_PINCTRL_LOAD_PINMUX, + 1); if (ret) return ret; } @@ -633,19 +680,16 @@ static const struct pinmux_ops uniphier_pmxops = { }; int uniphier_pinctrl_probe(struct platform_device *pdev, - struct pinctrl_desc *desc, struct uniphier_pinctrl_socdata *socdata) { struct device *dev = &pdev->dev; struct uniphier_pinctrl_priv *priv; + struct device_node *parent; if (!socdata || - !socdata->groups || - !socdata->groups_count || - !socdata->functions || - !socdata->functions_count || - !socdata->mux_bits || - !socdata->reg_stride) { + !socdata->pins || !socdata->npins || + !socdata->groups || !socdata->groups_count || + !socdata->functions || !socdata->functions_count) { dev_err(dev, "pinctrl socdata lacks necessary members\n"); return -EINVAL; } @@ -654,18 +698,36 @@ int uniphier_pinctrl_probe(struct platform_device *pdev, if (!priv) return -ENOMEM; - priv->regmap = syscon_node_to_regmap(dev->of_node); + if (of_device_is_compatible(dev->of_node, "socionext,ph1-ld4-pinctrl") || + of_device_is_compatible(dev->of_node, "socionext,ph1-pro4-pinctrl") || + of_device_is_compatible(dev->of_node, "socionext,ph1-sld8-pinctrl") || + of_device_is_compatible(dev->of_node, "socionext,ph1-pro5-pinctrl") || + of_device_is_compatible(dev->of_node, "socionext,proxstream2-pinctrl") || + of_device_is_compatible(dev->of_node, "socionext,ph1-ld6b-pinctrl")) { + /* old binding */ + priv->regmap = syscon_node_to_regmap(dev->of_node); + } else { + priv->regbase = 0x1000; + parent = of_get_parent(dev->of_node); + priv->regmap = syscon_node_to_regmap(parent); + of_node_put(parent); + } + if (IS_ERR(priv->regmap)) { dev_err(dev, "failed to get regmap\n"); return PTR_ERR(priv->regmap); } priv->socdata = socdata; - desc->pctlops = &uniphier_pctlops; - desc->pmxops = &uniphier_pmxops; - desc->confops = &uniphier_confops; - - priv->pctldev = devm_pinctrl_register(dev, desc, priv); + priv->pctldesc.name = dev->driver->name; + priv->pctldesc.pins = socdata->pins; + priv->pctldesc.npins = socdata->npins; + priv->pctldesc.pctlops = &uniphier_pctlops; + priv->pctldesc.pmxops = &uniphier_pmxops; + priv->pctldesc.confops = &uniphier_confops; + priv->pctldesc.owner = dev->driver->owner; + + priv->pctldev = devm_pinctrl_register(dev, &priv->pctldesc, priv); if (IS_ERR(priv->pctldev)) { dev_err(dev, "failed to register UniPhier pinctrl driver\n"); return PTR_ERR(priv->pctldev); diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c new file mode 100644 index 000000000000..608cd73c2bfb --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c @@ -0,0 +1,956 @@ +/* + * Copyright (C) 2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/pinctrl/pinctrl.h> +#include <linux/platform_device.h> + +#include "pinctrl-uniphier.h" + +static const struct pinctrl_pin_desc uniphier_ld11_pins[] = { + UNIPHIER_PINCTRL_PIN(0, "XECS1", 0, + 0, UNIPHIER_PIN_DRV_1BIT, + 0, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(1, "ERXW", UNIPHIER_PIN_IECTRL_NONE, + 1, UNIPHIER_PIN_DRV_1BIT, + 1, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(2, "XERWE1", UNIPHIER_PIN_IECTRL_NONE, + 2, UNIPHIER_PIN_DRV_1BIT, + 2, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(3, "XNFWP", 3, + 3, UNIPHIER_PIN_DRV_1BIT, + 3, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(4, "XNFCE0", 4, + 4, UNIPHIER_PIN_DRV_1BIT, + 4, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(5, "NFRYBY0", 5, + 5, UNIPHIER_PIN_DRV_1BIT, + 5, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(6, "XNFRE", UNIPHIER_PIN_IECTRL_NONE, + 6, UNIPHIER_PIN_DRV_1BIT, + 6, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(7, "XNFWE", UNIPHIER_PIN_IECTRL_NONE, + 7, UNIPHIER_PIN_DRV_1BIT, + 7, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(8, "NFALE", UNIPHIER_PIN_IECTRL_NONE, + 8, UNIPHIER_PIN_DRV_1BIT, + 8, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(9, "NFCLE", UNIPHIER_PIN_IECTRL_NONE, + 9, UNIPHIER_PIN_DRV_1BIT, + 9, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(10, "NFD0", 10, + 10, UNIPHIER_PIN_DRV_1BIT, + 10, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(11, "NFD1", 11, + 11, UNIPHIER_PIN_DRV_1BIT, + 11, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(12, "NFD2", 12, + 12, UNIPHIER_PIN_DRV_1BIT, + 12, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(13, "NFD3", 13, + 13, UNIPHIER_PIN_DRV_1BIT, + 13, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(14, "NFD4", 14, + 14, UNIPHIER_PIN_DRV_1BIT, + 14, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(15, "NFD5", 15, + 15, UNIPHIER_PIN_DRV_1BIT, + 15, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(16, "NFD6", 16, + 16, UNIPHIER_PIN_DRV_1BIT, + 16, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(17, "NFD7", 17, + 17, UNIPHIER_PIN_DRV_1BIT, + 17, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(18, "XERST", 18, + 0, UNIPHIER_PIN_DRV_2BIT, + 18, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(19, "MMCCLK", 19, + 1, UNIPHIER_PIN_DRV_2BIT, + 19, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(20, "MMCCMD", 20, + 2, UNIPHIER_PIN_DRV_2BIT, + 20, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(21, "MMCDS", 21, + 3, UNIPHIER_PIN_DRV_2BIT, + 21, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(22, "MMCDAT0", 22, + 4, UNIPHIER_PIN_DRV_2BIT, + 22, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(23, "MMCDAT1", 23, + 5, UNIPHIER_PIN_DRV_2BIT, + 23, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(24, "MMCDAT2", 24, + 6, UNIPHIER_PIN_DRV_2BIT, + 24, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(25, "MMCDAT3", 25, + 7, UNIPHIER_PIN_DRV_2BIT, + 25, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(26, "MMCDAT4", 26, + 8, UNIPHIER_PIN_DRV_2BIT, + 26, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(27, "MMCDAT5", 27, + 9, UNIPHIER_PIN_DRV_2BIT, + 27, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(28, "MMCDAT6", 28, + 10, UNIPHIER_PIN_DRV_2BIT, + 28, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(29, "MMCDAT7", 29, + 11, UNIPHIER_PIN_DRV_2BIT, + 29, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(46, "USB0VBUS", 46, + 46, UNIPHIER_PIN_DRV_1BIT, + 46, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(47, "USB0OD", UNIPHIER_PIN_IECTRL_NONE, + 47, UNIPHIER_PIN_DRV_1BIT, + 47, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(48, "USB1VBUS", 48, + 48, UNIPHIER_PIN_DRV_1BIT, + 48, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(49, "USB1OD", 49, + 49, UNIPHIER_PIN_DRV_1BIT, + 49, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(50, "USB2VBUS", 50, + 50, UNIPHIER_PIN_DRV_1BIT, + 50, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(51, "USB2OD", 51, + 51, UNIPHIER_PIN_DRV_1BIT, + 51, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(54, "TXD0", 54, + 54, UNIPHIER_PIN_DRV_1BIT, + 54, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(55, "RXD0", 55, + 55, UNIPHIER_PIN_DRV_1BIT, + 55, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(56, "SPISYNC0", 56, + 56, UNIPHIER_PIN_DRV_1BIT, + 56, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(57, "SPISCLK0", 57, + 57, UNIPHIER_PIN_DRV_1BIT, + 57, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(58, "SPITXD0", 58, + 58, UNIPHIER_PIN_DRV_1BIT, + 58, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(59, "SPIRXD0", 59, + 59, UNIPHIER_PIN_DRV_1BIT, + 59, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(60, "AGCI", 60, + 60, UNIPHIER_PIN_DRV_1BIT, + 60, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(61, "DMDSDA0", 61, + -1, UNIPHIER_PIN_DRV_FIXED4, + -1, UNIPHIER_PIN_PULL_NONE), + UNIPHIER_PINCTRL_PIN(62, "DMDSCL0", 62, + -1, UNIPHIER_PIN_DRV_FIXED4, + -1, UNIPHIER_PIN_PULL_NONE), + UNIPHIER_PINCTRL_PIN(63, "SDA0", 63, + -1, UNIPHIER_PIN_DRV_FIXED4, + -1, UNIPHIER_PIN_PULL_NONE), + UNIPHIER_PINCTRL_PIN(64, "SCL0", 64, + -1, UNIPHIER_PIN_DRV_FIXED4, + -1, UNIPHIER_PIN_PULL_NONE), + UNIPHIER_PINCTRL_PIN(65, "SDA1", 65, + -1, UNIPHIER_PIN_DRV_FIXED4, + -1, UNIPHIER_PIN_PULL_NONE), + UNIPHIER_PINCTRL_PIN(66, "SCL1", 66, + -1, UNIPHIER_PIN_DRV_FIXED4, + -1, UNIPHIER_PIN_PULL_NONE), + UNIPHIER_PINCTRL_PIN(67, "HIN", 67, + -1, UNIPHIER_PIN_DRV_FIXED5, + -1, UNIPHIER_PIN_PULL_NONE), + UNIPHIER_PINCTRL_PIN(68, "VIN", 68, + -1, UNIPHIER_PIN_DRV_FIXED5, + -1, UNIPHIER_PIN_PULL_NONE), + UNIPHIER_PINCTRL_PIN(69, "PCA00", 69, + 69, UNIPHIER_PIN_DRV_1BIT, + 69, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(70, "PCA01", 70, + 70, UNIPHIER_PIN_DRV_1BIT, + 70, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(71, "PCA02", 71, + 71, UNIPHIER_PIN_DRV_1BIT, + 71, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(72, "PCA03", 72, + 72, UNIPHIER_PIN_DRV_1BIT, + 72, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(73, "PCA04", 73, + 73, UNIPHIER_PIN_DRV_1BIT, + 73, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(74, "PCA05", 74, + 74, UNIPHIER_PIN_DRV_1BIT, + 74, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(75, "PCA06", 75, + 75, UNIPHIER_PIN_DRV_1BIT, + 75, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(76, "PCA07", 76, + 76, UNIPHIER_PIN_DRV_1BIT, + 76, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(77, "PCA08", 77, + 77, UNIPHIER_PIN_DRV_1BIT, + 77, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(78, "PCA09", 78, + 78, UNIPHIER_PIN_DRV_1BIT, + 78, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(79, "PCA10", 79, + 79, UNIPHIER_PIN_DRV_1BIT, + 79, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(80, "PCA11", 80, + 80, UNIPHIER_PIN_DRV_1BIT, + 80, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(81, "PCA12", 81, + 81, UNIPHIER_PIN_DRV_1BIT, + 81, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(82, "PCA13", 82, + 82, UNIPHIER_PIN_DRV_1BIT, + 82, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(83, "PCA14", 83, + 83, UNIPHIER_PIN_DRV_1BIT, + 83, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(84, "PC0READY", 84, + 84, UNIPHIER_PIN_DRV_1BIT, + 84, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(85, "PC0CD1", 85, + 85, UNIPHIER_PIN_DRV_1BIT, + 85, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(86, "PC0CD2", 86, + 86, UNIPHIER_PIN_DRV_1BIT, + 86, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(87, "PC0WAIT", 87, + 87, UNIPHIER_PIN_DRV_1BIT, + 87, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(88, "PC0RESET", 88, + 88, UNIPHIER_PIN_DRV_1BIT, + 88, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(89, "PC0CE1", 89, + 89, UNIPHIER_PIN_DRV_1BIT, + 89, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(90, "PC0WE", 90, + 90, UNIPHIER_PIN_DRV_1BIT, + 90, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(91, "PC0OE", 91, + 91, UNIPHIER_PIN_DRV_1BIT, + 91, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(92, "PC0IOWR", 92, + 92, UNIPHIER_PIN_DRV_1BIT, + 92, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(93, "PC0IORD", 93, + 93, UNIPHIER_PIN_DRV_1BIT, + 93, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(94, "PCD00", 94, + 94, UNIPHIER_PIN_DRV_1BIT, + 94, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(95, "PCD01", 95, + 95, UNIPHIER_PIN_DRV_1BIT, + 95, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(96, "PCD02", 96, + 96, UNIPHIER_PIN_DRV_1BIT, + 96, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(97, "PCD03", 97, + 97, UNIPHIER_PIN_DRV_1BIT, + 97, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(98, "PCD04", 98, + 98, UNIPHIER_PIN_DRV_1BIT, + 98, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(99, "PCD05", 99, + 99, UNIPHIER_PIN_DRV_1BIT, + 99, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(100, "PCD06", 100, + 100, UNIPHIER_PIN_DRV_1BIT, + 100, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(101, "PCD07", 101, + 101, UNIPHIER_PIN_DRV_1BIT, + 101, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(102, "HS0BCLKIN", 102, + 102, UNIPHIER_PIN_DRV_1BIT, + 102, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(103, "HS0SYNCIN", 103, + 103, UNIPHIER_PIN_DRV_1BIT, + 103, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(104, "HS0VALIN", 104, + 104, UNIPHIER_PIN_DRV_1BIT, + 104, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(105, "HS0DIN0", 105, + 105, UNIPHIER_PIN_DRV_1BIT, + 105, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(106, "HS0DIN1", 106, + 106, UNIPHIER_PIN_DRV_1BIT, + 106, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(107, "HS0DIN2", 107, + 107, UNIPHIER_PIN_DRV_1BIT, + 107, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(108, "HS0DIN3", 108, + 108, UNIPHIER_PIN_DRV_1BIT, + 108, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(109, "HS0DIN4", 109, + 109, UNIPHIER_PIN_DRV_1BIT, + 109, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(110, "HS0DIN5", 110, + 110, UNIPHIER_PIN_DRV_1BIT, + 110, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(111, "HS0DIN6", 111, + 111, UNIPHIER_PIN_DRV_1BIT, + 111, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(112, "HS0DIN7", 112, + 112, UNIPHIER_PIN_DRV_1BIT, + 112, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(113, "HS0BCLKOUT", 113, + 113, UNIPHIER_PIN_DRV_1BIT, + 113, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(114, "HS0SYNCOUT", 114, + 114, UNIPHIER_PIN_DRV_1BIT, + 114, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(115, "HS0VALOUT", 115, + 115, UNIPHIER_PIN_DRV_1BIT, + 115, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(116, "HS0DOUT0", 116, + 116, UNIPHIER_PIN_DRV_1BIT, + 116, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(117, "HS0DOUT1", 117, + 117, UNIPHIER_PIN_DRV_1BIT, + 117, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(118, "HS0DOUT2", 118, + 118, UNIPHIER_PIN_DRV_1BIT, + 118, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(119, "HS0DOUT3", 119, + 119, UNIPHIER_PIN_DRV_1BIT, + 119, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(120, "HS0DOUT4", 120, + 120, UNIPHIER_PIN_DRV_1BIT, + 120, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(121, "HS0DOUT5", 121, + 121, UNIPHIER_PIN_DRV_1BIT, + 121, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(122, "HS0DOUT6", 122, + 122, UNIPHIER_PIN_DRV_1BIT, + 122, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(123, "HS0DOUT7", 123, + 123, UNIPHIER_PIN_DRV_1BIT, + 123, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(124, "HS1BCLKIN", 124, + 124, UNIPHIER_PIN_DRV_1BIT, + 124, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(125, "HS1SYNCIN", 125, + 125, UNIPHIER_PIN_DRV_1BIT, + 125, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(126, "HS1VALIN", 126, + 126, UNIPHIER_PIN_DRV_1BIT, + 126, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(127, "HS1DIN0", 127, + 127, UNIPHIER_PIN_DRV_1BIT, + 127, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(128, "HS1DIN1", 128, + 128, UNIPHIER_PIN_DRV_1BIT, + 128, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(129, "HS1DIN2", 129, + 129, UNIPHIER_PIN_DRV_1BIT, + 129, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(130, "HS1DIN3", 130, + 130, UNIPHIER_PIN_DRV_1BIT, + 130, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(131, "HS1DIN4", 131, + 131, UNIPHIER_PIN_DRV_1BIT, + 131, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(132, "HS1DIN5", 132, + 132, UNIPHIER_PIN_DRV_1BIT, + 132, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(133, "HS1DIN6", 133, + 133, UNIPHIER_PIN_DRV_1BIT, + 133, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(134, "HS1DIN7", 134, + 134, UNIPHIER_PIN_DRV_1BIT, + 134, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(135, "AO1IEC", 135, + 135, UNIPHIER_PIN_DRV_1BIT, + 135, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(136, "AO1ARC", 136, + 136, UNIPHIER_PIN_DRV_1BIT, + 136, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(137, "AO1DACCK", 137, + 137, UNIPHIER_PIN_DRV_1BIT, + 137, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(138, "AO1BCK", 138, + 138, UNIPHIER_PIN_DRV_1BIT, + 138, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(139, "AO1LRCK", 139, + 139, UNIPHIER_PIN_DRV_1BIT, + 139, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(140, "AO1D0", 140, + 140, UNIPHIER_PIN_DRV_1BIT, + 140, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(141, "TCON0", 141, + 141, UNIPHIER_PIN_DRV_1BIT, + 141, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(142, "TCON1", 142, + 142, UNIPHIER_PIN_DRV_1BIT, + 142, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(143, "TCON2", 143, + 143, UNIPHIER_PIN_DRV_1BIT, + 143, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(144, "TCON3", 144, + 144, UNIPHIER_PIN_DRV_1BIT, + 144, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(145, "TCON4", 145, + 145, UNIPHIER_PIN_DRV_1BIT, + 145, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(146, "TCON5", 146, + 146, UNIPHIER_PIN_DRV_1BIT, + 146, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(147, "PWMA", 147, + 147, UNIPHIER_PIN_DRV_1BIT, + 147, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(148, "LR_GOUT", 148, + 148, UNIPHIER_PIN_DRV_1BIT, + 148, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(149, "XIRQ0", 149, + 149, UNIPHIER_PIN_DRV_1BIT, + 149, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(150, "XIRQ1", 150, + 150, UNIPHIER_PIN_DRV_1BIT, + 150, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(151, "XIRQ2", 151, + 151, UNIPHIER_PIN_DRV_1BIT, + 151, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(152, "XIRQ3", 152, + 152, UNIPHIER_PIN_DRV_1BIT, + 152, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(153, "XIRQ4", 153, + 153, UNIPHIER_PIN_DRV_1BIT, + 153, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(154, "XIRQ5", 154, + 154, UNIPHIER_PIN_DRV_1BIT, + 154, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(155, "XIRQ6", 155, + 155, UNIPHIER_PIN_DRV_1BIT, + 155, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(156, "XIRQ7", 156, + 156, UNIPHIER_PIN_DRV_1BIT, + 156, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(157, "XIRQ8", 157, + 157, UNIPHIER_PIN_DRV_1BIT, + 157, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(158, "AGCBS", 158, + 158, UNIPHIER_PIN_DRV_1BIT, + 158, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(159, "XIRQ21", 159, + 159, UNIPHIER_PIN_DRV_1BIT, + 159, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(160, "XIRQ22", 160, + 160, UNIPHIER_PIN_DRV_1BIT, + 160, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(161, "XIRQ23", 161, + 161, UNIPHIER_PIN_DRV_1BIT, + 161, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(162, "CH2CLK", 162, + 162, UNIPHIER_PIN_DRV_1BIT, + 162, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(163, "CH2PSYNC", 163, + 163, UNIPHIER_PIN_DRV_1BIT, + 163, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(164, "CH2VAL", 164, + 164, UNIPHIER_PIN_DRV_1BIT, + 164, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(165, "CH2DATA", 165, + 165, UNIPHIER_PIN_DRV_1BIT, + 165, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(166, "CK25O", 166, + 166, UNIPHIER_PIN_DRV_1BIT, + 166, UNIPHIER_PIN_PULL_DOWN), +}; + +static const unsigned emmc_pins[] = {18, 19, 20, 21, 22, 23, 24, 25}; +static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned emmc_dat8_pins[] = {26, 27, 28, 29}; +static const int emmc_dat8_muxvals[] = {0, 0, 0, 0}; +static const unsigned i2c0_pins[] = {63, 64}; +static const int i2c0_muxvals[] = {0, 0}; +static const unsigned i2c1_pins[] = {65, 66}; +static const int i2c1_muxvals[] = {0, 0}; +static const unsigned i2c3_pins[] = {67, 68}; +static const int i2c3_muxvals[] = {1, 1}; +static const unsigned i2c4_pins[] = {61, 62}; +static const int i2c4_muxvals[] = {1, 1}; +static const unsigned nand_pins[] = {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 15, 16, 17}; +static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned sd_pins[] = {10, 11, 12, 13, 14, 15, 16, 17}; +static const int sd_muxvals[] = {3, 3, 3, 3, 3, 3, 3, 3}; /* No SDVOLC */ +static const unsigned system_bus_pins[] = {1, 2, 6, 7, 8, 9, 10, 11, 12, 13, + 14, 15, 16, 17}; +static const int system_bus_muxvals[] = {0, 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2}; +static const unsigned system_bus_cs1_pins[] = {0}; +static const int system_bus_cs1_muxvals[] = {0}; +static const unsigned uart0_pins[] = {54, 55}; +static const int uart0_muxvals[] = {0, 0}; +static const unsigned uart1_pins[] = {58, 59}; +static const int uart1_muxvals[] = {1, 1}; +static const unsigned uart2_pins[] = {90, 91}; +static const int uart2_muxvals[] = {1, 1}; +static const unsigned uart3_pins[] = {94, 95}; +static const int uart3_muxvals[] = {1, 1}; +static const unsigned usb0_pins[] = {46, 47}; +static const int usb0_muxvals[] = {0, 0}; +static const unsigned usb1_pins[] = {48, 49}; +static const int usb1_muxvals[] = {0, 0}; +static const unsigned usb2_pins[] = {50, 51}; +static const int usb2_muxvals[] = {0, 0}; +static const unsigned usb3_pins[] = {52, 53}; +static const int usb3_muxvals[] = {0, 0}; +static const unsigned port_range_pins[] = { + 159, 160, 161, 162, 163, 164, 165, 166, /* PORT0x */ + 0, 1, 2, 3, 4, 5, 6, 7, /* PORT1x */ + 8, 9, 10, 11, 12, 13, 14, 15, /* PORT2x */ + 16, 17, 18, -1, -1, -1, -1, -1, /* PORT3x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT4x */ + -1, -1, -1, 46, 47, 48, 49, 50, /* PORT5x */ + 51, -1, -1, 54, 55, 56, 57, 58, /* PORT6x */ + 59, 60, 69, 70, 71, 72, 73, 74, /* PORT7x */ + 75, 76, 77, 78, 79, 80, 81, 82, /* PORT8x */ + 83, 84, 85, 86, 87, 88, 89, 90, /* PORT9x */ + 91, 92, 93, 94, 95, 96, 97, 98, /* PORT10x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT11x */ + 99, 100, 101, 102, 103, 104, 105, 106, /* PORT12x */ + 107, 108, 109, 110, 111, 112, 113, 114, /* PORT13x */ + 115, 116, 117, 118, 119, 120, 121, 122, /* PORT14x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT15x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT16x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT17x */ + 61, 62, 63, 64, 65, 66, 67, 68, /* PORT18x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT19x */ + 123, 124, 125, 126, 127, 128, 129, 130, /* PORT20x */ + 131, 132, 133, 134, 135, 136, 137, 138, /* PORT21x */ + 139, 140, 141, 142, -1, -1, -1, -1, /* PORT22x */ + 147, 148, 149, 150, 151, 152, 153, 154, /* PORT23x */ + 155, 156, 157, 143, 144, 145, 146, 158, /* PORT24x */ +}; +static const int port_range_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT0x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT1x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT2x */ + 15, 15, 15, -1, -1, -1, -1, -1, /* PORT3x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT4x */ + -1, -1, -1, 15, 15, 15, 15, 15, /* PORT5x */ + 15, -1, -1, 15, 15, 15, 15, 15, /* PORT6x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT7x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT8x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT9x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT10x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT11x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT12x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT13x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT14x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT15x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT16x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT17x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT18x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT19x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT20x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT21x */ + 15, 15, 15, 15, -1, -1, -1, -1, /* PORT22x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT23x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT24x */ +}; +static const unsigned xirq_pins[] = { + 149, 150, 151, 152, 153, 154, 155, 156, /* XIRQ0-7 */ + 157, 143, 144, 145, 85, 146, 158, 84, /* XIRQ8-15 */ + 141, 142, 148, 50, 51, 159, 160, 161, /* XIRQ16-23 */ +}; +static const int xirq_muxvals[] = { + 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ0-7 */ + 14, 14, 14, 14, 13, 14, 14, 13, /* XIRQ8-15 */ + 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ16-23 */ +}; +static const unsigned xirq_alternatives_pins[] = { + 94, 95, 96, 97, 98, 99, 100, 101, /* XIRQ0-7 */ + 102, 103, 104, 105, 106, 107, /* XIRQ8-11,13,14 */ + 108, 109, 110, 111, 112, 113, 114, 115, /* XIRQ16-23 */ + 9, 10, 11, 12, 13, 14, 15, 16, /* XIRQ4-11 */ + 17, 0, 1, 2, 3, 4, 5, 6, 7, 8, /* XIRQ13,14,16-23 */ + 139, 140, 135, 147, /* XIRQ17,18,21,22 */ +}; +static const int xirq_alternatives_muxvals[] = { + 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ0-7 */ + 14, 14, 14, 14, 14, 14, /* XIRQ8-11,13,14 */ + 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ16-23 */ + 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ4-11 */ + 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ13,14,16-23 */ + 14, 14, 14, 14, /* XIRQ17,18,21,22 */ +}; + +static const struct uniphier_pinctrl_group uniphier_ld11_groups[] = { + UNIPHIER_PINCTRL_GROUP(emmc), + UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(i2c4), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(system_bus), + UNIPHIER_PINCTRL_GROUP(system_bus_cs1), + UNIPHIER_PINCTRL_GROUP(uart0), + UNIPHIER_PINCTRL_GROUP(uart1), + UNIPHIER_PINCTRL_GROUP(uart2), + UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb3), + UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range), + UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(xirq), + UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(xirq_alternatives), + UNIPHIER_PINCTRL_GROUP_SINGLE(port00, port_range, 0), + UNIPHIER_PINCTRL_GROUP_SINGLE(port01, port_range, 1), + UNIPHIER_PINCTRL_GROUP_SINGLE(port02, port_range, 2), + UNIPHIER_PINCTRL_GROUP_SINGLE(port03, port_range, 3), + UNIPHIER_PINCTRL_GROUP_SINGLE(port04, port_range, 4), + UNIPHIER_PINCTRL_GROUP_SINGLE(port05, port_range, 5), + UNIPHIER_PINCTRL_GROUP_SINGLE(port06, port_range, 6), + UNIPHIER_PINCTRL_GROUP_SINGLE(port07, port_range, 7), + UNIPHIER_PINCTRL_GROUP_SINGLE(port10, port_range, 8), + UNIPHIER_PINCTRL_GROUP_SINGLE(port11, port_range, 9), + UNIPHIER_PINCTRL_GROUP_SINGLE(port12, port_range, 10), + UNIPHIER_PINCTRL_GROUP_SINGLE(port13, port_range, 11), + UNIPHIER_PINCTRL_GROUP_SINGLE(port14, port_range, 12), + UNIPHIER_PINCTRL_GROUP_SINGLE(port15, port_range, 13), + UNIPHIER_PINCTRL_GROUP_SINGLE(port16, port_range, 14), + UNIPHIER_PINCTRL_GROUP_SINGLE(port17, port_range, 15), + UNIPHIER_PINCTRL_GROUP_SINGLE(port20, port_range, 16), + UNIPHIER_PINCTRL_GROUP_SINGLE(port21, port_range, 17), + UNIPHIER_PINCTRL_GROUP_SINGLE(port22, port_range, 18), + UNIPHIER_PINCTRL_GROUP_SINGLE(port23, port_range, 19), + UNIPHIER_PINCTRL_GROUP_SINGLE(port24, port_range, 20), + UNIPHIER_PINCTRL_GROUP_SINGLE(port25, port_range, 21), + UNIPHIER_PINCTRL_GROUP_SINGLE(port26, port_range, 22), + UNIPHIER_PINCTRL_GROUP_SINGLE(port27, port_range, 23), + UNIPHIER_PINCTRL_GROUP_SINGLE(port30, port_range, 24), + UNIPHIER_PINCTRL_GROUP_SINGLE(port31, port_range, 25), + UNIPHIER_PINCTRL_GROUP_SINGLE(port32, port_range, 26), + UNIPHIER_PINCTRL_GROUP_SINGLE(port53, port_range, 43), + UNIPHIER_PINCTRL_GROUP_SINGLE(port54, port_range, 44), + UNIPHIER_PINCTRL_GROUP_SINGLE(port55, port_range, 45), + UNIPHIER_PINCTRL_GROUP_SINGLE(port56, port_range, 46), + UNIPHIER_PINCTRL_GROUP_SINGLE(port57, port_range, 47), + UNIPHIER_PINCTRL_GROUP_SINGLE(port60, port_range, 48), + UNIPHIER_PINCTRL_GROUP_SINGLE(port63, port_range, 51), + UNIPHIER_PINCTRL_GROUP_SINGLE(port64, port_range, 52), + UNIPHIER_PINCTRL_GROUP_SINGLE(port65, port_range, 53), + UNIPHIER_PINCTRL_GROUP_SINGLE(port66, port_range, 54), + UNIPHIER_PINCTRL_GROUP_SINGLE(port67, port_range, 55), + UNIPHIER_PINCTRL_GROUP_SINGLE(port70, port_range, 56), + UNIPHIER_PINCTRL_GROUP_SINGLE(port71, port_range, 57), + UNIPHIER_PINCTRL_GROUP_SINGLE(port72, port_range, 58), + UNIPHIER_PINCTRL_GROUP_SINGLE(port73, port_range, 59), + UNIPHIER_PINCTRL_GROUP_SINGLE(port74, port_range, 60), + UNIPHIER_PINCTRL_GROUP_SINGLE(port75, port_range, 61), + UNIPHIER_PINCTRL_GROUP_SINGLE(port76, port_range, 62), + UNIPHIER_PINCTRL_GROUP_SINGLE(port77, port_range, 63), + UNIPHIER_PINCTRL_GROUP_SINGLE(port80, port_range, 64), + UNIPHIER_PINCTRL_GROUP_SINGLE(port81, port_range, 65), + UNIPHIER_PINCTRL_GROUP_SINGLE(port82, port_range, 66), + UNIPHIER_PINCTRL_GROUP_SINGLE(port83, port_range, 67), + UNIPHIER_PINCTRL_GROUP_SINGLE(port84, port_range, 68), + UNIPHIER_PINCTRL_GROUP_SINGLE(port85, port_range, 69), + UNIPHIER_PINCTRL_GROUP_SINGLE(port86, port_range, 70), + UNIPHIER_PINCTRL_GROUP_SINGLE(port87, port_range, 71), + UNIPHIER_PINCTRL_GROUP_SINGLE(port90, port_range, 72), + UNIPHIER_PINCTRL_GROUP_SINGLE(port91, port_range, 73), + UNIPHIER_PINCTRL_GROUP_SINGLE(port92, port_range, 74), + UNIPHIER_PINCTRL_GROUP_SINGLE(port93, port_range, 75), + UNIPHIER_PINCTRL_GROUP_SINGLE(port94, port_range, 76), + UNIPHIER_PINCTRL_GROUP_SINGLE(port95, port_range, 77), + UNIPHIER_PINCTRL_GROUP_SINGLE(port96, port_range, 78), + UNIPHIER_PINCTRL_GROUP_SINGLE(port97, port_range, 79), + UNIPHIER_PINCTRL_GROUP_SINGLE(port100, port_range, 80), + UNIPHIER_PINCTRL_GROUP_SINGLE(port101, port_range, 81), + UNIPHIER_PINCTRL_GROUP_SINGLE(port102, port_range, 82), + UNIPHIER_PINCTRL_GROUP_SINGLE(port103, port_range, 83), + UNIPHIER_PINCTRL_GROUP_SINGLE(port104, port_range, 84), + UNIPHIER_PINCTRL_GROUP_SINGLE(port105, port_range, 85), + UNIPHIER_PINCTRL_GROUP_SINGLE(port106, port_range, 86), + UNIPHIER_PINCTRL_GROUP_SINGLE(port107, port_range, 87), + UNIPHIER_PINCTRL_GROUP_SINGLE(port120, port_range, 96), + UNIPHIER_PINCTRL_GROUP_SINGLE(port121, port_range, 97), + UNIPHIER_PINCTRL_GROUP_SINGLE(port122, port_range, 98), + UNIPHIER_PINCTRL_GROUP_SINGLE(port123, port_range, 99), + UNIPHIER_PINCTRL_GROUP_SINGLE(port124, port_range, 100), + UNIPHIER_PINCTRL_GROUP_SINGLE(port125, port_range, 101), + UNIPHIER_PINCTRL_GROUP_SINGLE(port126, port_range, 102), + UNIPHIER_PINCTRL_GROUP_SINGLE(port127, port_range, 103), + UNIPHIER_PINCTRL_GROUP_SINGLE(port130, port_range, 104), + UNIPHIER_PINCTRL_GROUP_SINGLE(port131, port_range, 105), + UNIPHIER_PINCTRL_GROUP_SINGLE(port132, port_range, 106), + UNIPHIER_PINCTRL_GROUP_SINGLE(port133, port_range, 107), + UNIPHIER_PINCTRL_GROUP_SINGLE(port134, port_range, 108), + UNIPHIER_PINCTRL_GROUP_SINGLE(port135, port_range, 109), + UNIPHIER_PINCTRL_GROUP_SINGLE(port136, port_range, 110), + UNIPHIER_PINCTRL_GROUP_SINGLE(port137, port_range, 111), + UNIPHIER_PINCTRL_GROUP_SINGLE(port140, port_range, 112), + UNIPHIER_PINCTRL_GROUP_SINGLE(port141, port_range, 113), + UNIPHIER_PINCTRL_GROUP_SINGLE(port142, port_range, 114), + UNIPHIER_PINCTRL_GROUP_SINGLE(port143, port_range, 115), + UNIPHIER_PINCTRL_GROUP_SINGLE(port144, port_range, 116), + UNIPHIER_PINCTRL_GROUP_SINGLE(port145, port_range, 117), + UNIPHIER_PINCTRL_GROUP_SINGLE(port146, port_range, 118), + UNIPHIER_PINCTRL_GROUP_SINGLE(port147, port_range, 119), + UNIPHIER_PINCTRL_GROUP_SINGLE(port180, port_range, 144), + UNIPHIER_PINCTRL_GROUP_SINGLE(port181, port_range, 145), + UNIPHIER_PINCTRL_GROUP_SINGLE(port182, port_range, 146), + UNIPHIER_PINCTRL_GROUP_SINGLE(port183, port_range, 147), + UNIPHIER_PINCTRL_GROUP_SINGLE(port184, port_range, 148), + UNIPHIER_PINCTRL_GROUP_SINGLE(port185, port_range, 149), + UNIPHIER_PINCTRL_GROUP_SINGLE(port186, port_range, 150), + UNIPHIER_PINCTRL_GROUP_SINGLE(port187, port_range, 151), + UNIPHIER_PINCTRL_GROUP_SINGLE(port200, port_range, 160), + UNIPHIER_PINCTRL_GROUP_SINGLE(port201, port_range, 161), + UNIPHIER_PINCTRL_GROUP_SINGLE(port202, port_range, 162), + UNIPHIER_PINCTRL_GROUP_SINGLE(port203, port_range, 163), + UNIPHIER_PINCTRL_GROUP_SINGLE(port204, port_range, 164), + UNIPHIER_PINCTRL_GROUP_SINGLE(port205, port_range, 165), + UNIPHIER_PINCTRL_GROUP_SINGLE(port206, port_range, 166), + UNIPHIER_PINCTRL_GROUP_SINGLE(port207, port_range, 167), + UNIPHIER_PINCTRL_GROUP_SINGLE(port210, port_range, 168), + UNIPHIER_PINCTRL_GROUP_SINGLE(port211, port_range, 169), + UNIPHIER_PINCTRL_GROUP_SINGLE(port212, port_range, 170), + UNIPHIER_PINCTRL_GROUP_SINGLE(port213, port_range, 171), + UNIPHIER_PINCTRL_GROUP_SINGLE(port214, port_range, 172), + UNIPHIER_PINCTRL_GROUP_SINGLE(port215, port_range, 173), + UNIPHIER_PINCTRL_GROUP_SINGLE(port216, port_range, 174), + UNIPHIER_PINCTRL_GROUP_SINGLE(port217, port_range, 175), + UNIPHIER_PINCTRL_GROUP_SINGLE(port220, port_range, 176), + UNIPHIER_PINCTRL_GROUP_SINGLE(port221, port_range, 177), + UNIPHIER_PINCTRL_GROUP_SINGLE(port222, port_range, 178), + UNIPHIER_PINCTRL_GROUP_SINGLE(port223, port_range, 179), + UNIPHIER_PINCTRL_GROUP_SINGLE(port230, port_range, 184), + UNIPHIER_PINCTRL_GROUP_SINGLE(port231, port_range, 185), + UNIPHIER_PINCTRL_GROUP_SINGLE(port232, port_range, 186), + UNIPHIER_PINCTRL_GROUP_SINGLE(port233, port_range, 187), + UNIPHIER_PINCTRL_GROUP_SINGLE(port234, port_range, 188), + UNIPHIER_PINCTRL_GROUP_SINGLE(port235, port_range, 189), + UNIPHIER_PINCTRL_GROUP_SINGLE(port236, port_range, 190), + UNIPHIER_PINCTRL_GROUP_SINGLE(port237, port_range, 191), + UNIPHIER_PINCTRL_GROUP_SINGLE(port240, port_range, 192), + UNIPHIER_PINCTRL_GROUP_SINGLE(port241, port_range, 193), + UNIPHIER_PINCTRL_GROUP_SINGLE(port242, port_range, 194), + UNIPHIER_PINCTRL_GROUP_SINGLE(port243, port_range, 195), + UNIPHIER_PINCTRL_GROUP_SINGLE(port244, port_range, 196), + UNIPHIER_PINCTRL_GROUP_SINGLE(port245, port_range, 197), + UNIPHIER_PINCTRL_GROUP_SINGLE(port246, port_range, 198), + UNIPHIER_PINCTRL_GROUP_SINGLE(port247, port_range, 199), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq0, xirq, 0), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq1, xirq, 1), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq2, xirq, 2), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq3, xirq, 3), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq4, xirq, 4), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq5, xirq, 5), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq6, xirq, 6), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq7, xirq, 7), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq8, xirq, 8), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq9, xirq, 9), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq10, xirq, 10), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq11, xirq, 11), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq12, xirq, 12), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq13, xirq, 13), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq14, xirq, 14), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq15, xirq, 15), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq16, xirq, 16), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq17, xirq, 17), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq18, xirq, 18), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq19, xirq, 19), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq20, xirq, 20), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq21, xirq, 21), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq22, xirq, 22), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq23, xirq, 23), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq0b, xirq_alternatives, 0), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq1b, xirq_alternatives, 1), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq2b, xirq_alternatives, 2), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq3b, xirq_alternatives, 3), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq4b, xirq_alternatives, 4), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq5b, xirq_alternatives, 5), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq6b, xirq_alternatives, 6), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq7b, xirq_alternatives, 7), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq8b, xirq_alternatives, 8), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq9b, xirq_alternatives, 9), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq10b, xirq_alternatives, 10), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq11b, xirq_alternatives, 11), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq13b, xirq_alternatives, 12), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq14b, xirq_alternatives, 13), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq16b, xirq_alternatives, 14), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq17b, xirq_alternatives, 15), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq18b, xirq_alternatives, 16), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq19b, xirq_alternatives, 17), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq20b, xirq_alternatives, 18), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq21b, xirq_alternatives, 19), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq22b, xirq_alternatives, 20), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq23b, xirq_alternatives, 21), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq4c, xirq_alternatives, 22), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq5c, xirq_alternatives, 23), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq6c, xirq_alternatives, 24), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq7c, xirq_alternatives, 25), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq8c, xirq_alternatives, 26), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq9c, xirq_alternatives, 27), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq10c, xirq_alternatives, 28), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq11c, xirq_alternatives, 29), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq13c, xirq_alternatives, 30), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq14c, xirq_alternatives, 31), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq16c, xirq_alternatives, 32), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq17c, xirq_alternatives, 33), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq18c, xirq_alternatives, 34), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq19c, xirq_alternatives, 35), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq20c, xirq_alternatives, 36), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq21c, xirq_alternatives, 37), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq22c, xirq_alternatives, 38), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq23c, xirq_alternatives, 39), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq17d, xirq_alternatives, 40), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq18d, xirq_alternatives, 41), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq21d, xirq_alternatives, 42), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq22d, xirq_alternatives, 43), +}; + +static const char * const emmc_groups[] = {"emmc", "emmc_dat8"}; +static const char * const i2c0_groups[] = {"i2c0"}; +static const char * const i2c1_groups[] = {"i2c1"}; +static const char * const i2c3_groups[] = {"i2c3"}; +static const char * const i2c4_groups[] = {"i2c4"}; +static const char * const nand_groups[] = {"nand"}; +static const char * const sd_groups[] = {"sd"}; +static const char * const system_bus_groups[] = {"system_bus", + "system_bus_cs1"}; +static const char * const uart0_groups[] = {"uart0"}; +static const char * const uart1_groups[] = {"uart1"}; +static const char * const uart2_groups[] = {"uart2"}; +static const char * const uart3_groups[] = {"uart3"}; +static const char * const usb0_groups[] = {"usb0"}; +static const char * const usb1_groups[] = {"usb1"}; +static const char * const usb2_groups[] = {"usb2"}; +static const char * const usb3_groups[] = {"usb3"}; +static const char * const port_groups[] = { + "port00", "port01", "port02", "port03", + "port04", "port05", "port06", "port07", + "port10", "port11", "port12", "port13", + "port14", "port15", "port16", "port17", + "port20", "port21", "port22", "port23", + "port24", "port25", "port26", "port27", + "port30", "port31", "port32", + /* port33-52 missing */ "port53", + "port54", "port55", "port56", "port57", + "port60", /* port61-62 missing*/ "port63", + "port64", "port65", "port66", "port67", + "port70", "port71", "port72", "port73", + "port74", "port75", "port76", "port77", + "port80", "port81", "port82", "port83", + "port84", "port85", "port86", "port87", + "port90", "port91", "port92", "port93", + "port94", "port95", "port96", "port97", + "port100", "port101", "port102", "port103", + "port104", "port105", "port106", "port107", + /* port110-117 missing */ + "port120", "port121", "port122", "port123", + "port124", "port125", "port126", "port127", + "port130", "port131", "port132", "port133", + "port134", "port135", "port136", "port137", + "port140", "port141", "port142", "port143", + "port144", "port145", "port146", "port147", + /* port150-177 missing */ + "port180", "port181", "port182", "port183", + "port184", "port185", "port186", "port187", + /* port190-197 missing */ + "port200", "port201", "port202", "port203", + "port204", "port205", "port206", "port207", + "port210", "port211", "port212", "port213", + "port214", "port215", "port216", "port217", + "port220", "port221", "port222", "port223", + /* port224-227 missing */ + "port230", "port231", "port232", "port233", + "port234", "port235", "port236", "port237", + "port240", "port241", "port242", "port243", + "port244", "port245", "port246", "port247", +}; +static const char * const xirq_groups[] = { + "xirq0", "xirq1", "xirq2", "xirq3", + "xirq4", "xirq5", "xirq6", "xirq7", + "xirq8", "xirq9", "xirq10", "xirq11", + "xirq12", "xirq13", "xirq14", "xirq15", + "xirq16", "xirq17", "xirq18", "xirq19", + "xirq20", "xirq21", "xirq22", "xirq23", + "xirq0b", "xirq1b", "xirq2b", "xirq3b", + "xirq4b", "xirq5b", "xirq6b", "xirq7b", + "xirq8b", "xirq9b", "xirq10b", "xirq11b", + /* none */ "xirq13b", "xirq14b", /* none */ + "xirq16b", "xirq17b", "xirq18b", "xirq19b", + "xirq20b", "xirq21b", "xirq22b", "xirq23b", + "xirq4c", "xirq5c", "xirq6c", "xirq7c", + "xirq8c", "xirq9c", "xirq10c", "xirq11c", + /* none */ "xirq13c", "xirq14c", /* none */ + "xirq16c", "xirq17c", "xirq18c", "xirq19c", + "xirq20c", "xirq21c", "xirq22c", "xirq23c", + "xirq17d", "xirq18d", "xirq21d", "xirq22d", +}; + +static const struct uniphier_pinmux_function uniphier_ld11_functions[] = { + UNIPHIER_PINMUX_FUNCTION(emmc), + UNIPHIER_PINMUX_FUNCTION(i2c0), + UNIPHIER_PINMUX_FUNCTION(i2c1), + UNIPHIER_PINMUX_FUNCTION(i2c3), + UNIPHIER_PINMUX_FUNCTION(i2c4), + UNIPHIER_PINMUX_FUNCTION(nand), + UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION(system_bus), + UNIPHIER_PINMUX_FUNCTION(uart0), + UNIPHIER_PINMUX_FUNCTION(uart1), + UNIPHIER_PINMUX_FUNCTION(uart2), + UNIPHIER_PINMUX_FUNCTION(uart3), + UNIPHIER_PINMUX_FUNCTION(usb0), + UNIPHIER_PINMUX_FUNCTION(usb1), + UNIPHIER_PINMUX_FUNCTION(usb2), + UNIPHIER_PINMUX_FUNCTION(usb3), + UNIPHIER_PINMUX_FUNCTION(port), + UNIPHIER_PINMUX_FUNCTION(xirq), +}; + +static struct uniphier_pinctrl_socdata uniphier_ld11_pindata = { + .pins = uniphier_ld11_pins, + .npins = ARRAY_SIZE(uniphier_ld11_pins), + .groups = uniphier_ld11_groups, + .groups_count = ARRAY_SIZE(uniphier_ld11_groups), + .functions = uniphier_ld11_functions, + .functions_count = ARRAY_SIZE(uniphier_ld11_functions), + .caps = UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL, +}; + +static int uniphier_ld11_pinctrl_probe(struct platform_device *pdev) +{ + return uniphier_pinctrl_probe(pdev, &uniphier_ld11_pindata); +} + +static const struct of_device_id uniphier_ld11_pinctrl_match[] = { + { .compatible = "socionext,uniphier-ld11-pinctrl" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, uniphier_ld11_pinctrl_match); + +static struct platform_driver uniphier_ld11_pinctrl_driver = { + .probe = uniphier_ld11_pinctrl_probe, + .driver = { + .name = "uniphier-ld11-pinctrl", + .of_match_table = uniphier_ld11_pinctrl_match, + }, +}; +module_platform_driver(uniphier_ld11_pinctrl_driver); + +MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>"); +MODULE_DESCRIPTION("UniPhier PH1-LD11 pinctrl driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c new file mode 100644 index 000000000000..7311453b5b79 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c @@ -0,0 +1,1037 @@ +/* + * Copyright (C) 2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/pinctrl/pinctrl.h> +#include <linux/platform_device.h> + +#include "pinctrl-uniphier.h" + +static const struct pinctrl_pin_desc uniphier_ld20_pins[] = { + UNIPHIER_PINCTRL_PIN(0, "XECS1", 0, + 0, UNIPHIER_PIN_DRV_3BIT, + 0, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(1, "ERXW", 1, + 1, UNIPHIER_PIN_DRV_3BIT, + 1, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(2, "XERWE1", 2, + 2, UNIPHIER_PIN_DRV_3BIT, + 2, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(3, "XNFWP", 3, + 3, UNIPHIER_PIN_DRV_3BIT, + 3, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(4, "XNFCE0", 4, + 4, UNIPHIER_PIN_DRV_3BIT, + 4, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(5, "NFRYBY0", 5, + 5, UNIPHIER_PIN_DRV_3BIT, + 5, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(6, "XNFRE", 6, + 6, UNIPHIER_PIN_DRV_3BIT, + 6, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(7, "XNFWE", 7, + 7, UNIPHIER_PIN_DRV_3BIT, + 7, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(8, "NFALE", 8, + 8, UNIPHIER_PIN_DRV_3BIT, + 8, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(9, "NFCLE", 9, + 9, UNIPHIER_PIN_DRV_3BIT, + 9, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(10, "NFD0", 10, + 10, UNIPHIER_PIN_DRV_3BIT, + 10, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(11, "NFD1", 11, + 11, UNIPHIER_PIN_DRV_3BIT, + 11, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(12, "NFD2", 12, + 12, UNIPHIER_PIN_DRV_3BIT, + 12, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(13, "NFD3", 13, + 13, UNIPHIER_PIN_DRV_3BIT, + 13, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(14, "NFD4", 14, + 14, UNIPHIER_PIN_DRV_3BIT, + 14, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(15, "NFD5", 15, + 15, UNIPHIER_PIN_DRV_3BIT, + 15, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(16, "NFD6", 16, + 16, UNIPHIER_PIN_DRV_3BIT, + 16, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(17, "NFD7", 17, + 17, UNIPHIER_PIN_DRV_3BIT, + 17, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(18, "XERST", 18, + 0, UNIPHIER_PIN_DRV_2BIT, + 18, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(19, "MMCCLK", 19, + 1, UNIPHIER_PIN_DRV_2BIT, + 19, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(20, "MMCCMD", 20, + 2, UNIPHIER_PIN_DRV_2BIT, + 20, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(21, "MMCDS", 21, + 3, UNIPHIER_PIN_DRV_2BIT, + 21, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(22, "MMCDAT0", 22, + 4, UNIPHIER_PIN_DRV_2BIT, + 22, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(23, "MMCDAT1", 23, + 5, UNIPHIER_PIN_DRV_2BIT, + 23, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(24, "MMCDAT2", 24, + 6, UNIPHIER_PIN_DRV_2BIT, + 24, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(25, "MMCDAT3", 25, + 7, UNIPHIER_PIN_DRV_2BIT, + 25, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(26, "MMCDAT4", 26, + 8, UNIPHIER_PIN_DRV_2BIT, + 26, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(27, "MMCDAT5", 27, + 9, UNIPHIER_PIN_DRV_2BIT, + 27, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(28, "MMCDAT6", 28, + 10, UNIPHIER_PIN_DRV_2BIT, + 28, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(29, "MMCDAT7", 29, + 11, UNIPHIER_PIN_DRV_2BIT, + 29, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(30, "MDC", 30, + 18, UNIPHIER_PIN_DRV_3BIT, + 30, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(31, "MDIO", 31, + 19, UNIPHIER_PIN_DRV_3BIT, + 31, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(32, "MDIO_INTL", 32, + 20, UNIPHIER_PIN_DRV_3BIT, + 32, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(33, "PHYRSTL", 33, + 21, UNIPHIER_PIN_DRV_3BIT, + 33, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(34, "RGMII_RXCLK", 34, + 22, UNIPHIER_PIN_DRV_3BIT, + 34, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(35, "RGMII_RXD0", 35, + 23, UNIPHIER_PIN_DRV_3BIT, + 35, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(36, "RGMII_RXD1", 36, + 24, UNIPHIER_PIN_DRV_3BIT, + 36, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(37, "RGMII_RXD2", 37, + 25, UNIPHIER_PIN_DRV_3BIT, + 37, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(38, "RGMII_RXD3", 38, + 26, UNIPHIER_PIN_DRV_3BIT, + 38, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(39, "RGMII_RXCTL", 39, + 27, UNIPHIER_PIN_DRV_3BIT, + 39, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(40, "RGMII_TXCLK", 40, + 28, UNIPHIER_PIN_DRV_3BIT, + 40, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(41, "RGMII_TXD0", 41, + 29, UNIPHIER_PIN_DRV_3BIT, + 41, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(42, "RGMII_TXD1", 42, + 30, UNIPHIER_PIN_DRV_3BIT, + 42, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(43, "RGMII_TXD2", 43, + 31, UNIPHIER_PIN_DRV_3BIT, + 43, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(44, "RGMII_TXD3", 44, + 32, UNIPHIER_PIN_DRV_3BIT, + 44, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(45, "RGMII_TXCTL", 45, + 33, UNIPHIER_PIN_DRV_3BIT, + 45, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(46, "USB0VBUS", 46, + 34, UNIPHIER_PIN_DRV_3BIT, + 46, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(47, "USB0OD", 47, + 35, UNIPHIER_PIN_DRV_3BIT, + 47, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(48, "USB1VBUS", 48, + 36, UNIPHIER_PIN_DRV_3BIT, + 48, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(49, "USB1OD", 49, + 37, UNIPHIER_PIN_DRV_3BIT, + 49, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(50, "USB2VBUS", 50, + 38, UNIPHIER_PIN_DRV_3BIT, + 50, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(51, "USB2OD", 51, + 39, UNIPHIER_PIN_DRV_3BIT, + 51, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(52, "USB3VBUS", 52, + 40, UNIPHIER_PIN_DRV_3BIT, + 52, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(53, "USB3OD", 53, + 41, UNIPHIER_PIN_DRV_3BIT, + 53, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(54, "TXD0", 54, + 42, UNIPHIER_PIN_DRV_3BIT, + 54, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(55, "RXD0", 55, + 43, UNIPHIER_PIN_DRV_3BIT, + 55, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(56, "SPISYNC0", 56, + 44, UNIPHIER_PIN_DRV_3BIT, + 56, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(57, "SPISCLK0", 57, + 45, UNIPHIER_PIN_DRV_3BIT, + 57, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(58, "SPITXD0", 58, + 46, UNIPHIER_PIN_DRV_3BIT, + 58, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(59, "SPIRXD0", 59, + 47, UNIPHIER_PIN_DRV_3BIT, + 59, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(60, "AGCI", 60, + 48, UNIPHIER_PIN_DRV_3BIT, + 60, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(61, "DMDSDA0", 61, + -1, UNIPHIER_PIN_DRV_FIXED4, + -1, UNIPHIER_PIN_PULL_NONE), + UNIPHIER_PINCTRL_PIN(62, "DMDSCL0", 62, + -1, UNIPHIER_PIN_DRV_FIXED4, + -1, UNIPHIER_PIN_PULL_NONE), + UNIPHIER_PINCTRL_PIN(63, "SDA0", 63, + -1, UNIPHIER_PIN_DRV_FIXED4, + -1, UNIPHIER_PIN_PULL_NONE), + UNIPHIER_PINCTRL_PIN(64, "SCL0", 64, + -1, UNIPHIER_PIN_DRV_FIXED4, + -1, UNIPHIER_PIN_PULL_NONE), + UNIPHIER_PINCTRL_PIN(65, "SDA1", 65, + -1, UNIPHIER_PIN_DRV_FIXED4, + -1, UNIPHIER_PIN_PULL_NONE), + UNIPHIER_PINCTRL_PIN(66, "SCL1", 66, + -1, UNIPHIER_PIN_DRV_FIXED4, + -1, UNIPHIER_PIN_PULL_NONE), + UNIPHIER_PINCTRL_PIN(67, "HIN", 67, + -1, UNIPHIER_PIN_DRV_FIXED4, + -1, UNIPHIER_PIN_PULL_NONE), + UNIPHIER_PINCTRL_PIN(68, "VIN", 68, + -1, UNIPHIER_PIN_DRV_FIXED4, + -1, UNIPHIER_PIN_PULL_NONE), + UNIPHIER_PINCTRL_PIN(69, "PCA00", 69, + 49, UNIPHIER_PIN_DRV_3BIT, + 69, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(70, "PCA01", 70, + 50, UNIPHIER_PIN_DRV_3BIT, + 70, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(71, "PCA02", 71, + 51, UNIPHIER_PIN_DRV_3BIT, + 71, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(72, "PCA03", 72, + 52, UNIPHIER_PIN_DRV_3BIT, + 72, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(73, "PCA04", 73, + 53, UNIPHIER_PIN_DRV_3BIT, + 73, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(74, "PCA05", 74, + 54, UNIPHIER_PIN_DRV_3BIT, + 74, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(75, "PCA06", 75, + 55, UNIPHIER_PIN_DRV_3BIT, + 75, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(76, "PCA07", 76, + 56, UNIPHIER_PIN_DRV_3BIT, + 76, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(77, "PCA08", 77, + 57, UNIPHIER_PIN_DRV_3BIT, + 77, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(78, "PCA09", 78, + 58, UNIPHIER_PIN_DRV_3BIT, + 78, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(79, "PCA10", 79, + 59, UNIPHIER_PIN_DRV_3BIT, + 79, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(80, "PCA11", 80, + 60, UNIPHIER_PIN_DRV_3BIT, + 80, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(81, "PCA12", 81, + 61, UNIPHIER_PIN_DRV_3BIT, + 81, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(82, "PCA13", 82, + 62, UNIPHIER_PIN_DRV_3BIT, + 82, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(83, "PCA14", 83, + 63, UNIPHIER_PIN_DRV_3BIT, + 83, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(84, "PC0READY", 84, + 0, UNIPHIER_PIN_DRV_1BIT, + 84, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(85, "PC0CD1", 85, + 1, UNIPHIER_PIN_DRV_1BIT, + 85, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(86, "PC0CD2", 86, + 2, UNIPHIER_PIN_DRV_1BIT, + 86, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(87, "PC0WAIT", 87, + 3, UNIPHIER_PIN_DRV_1BIT, + 87, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(88, "PC0RESET", 88, + 4, UNIPHIER_PIN_DRV_1BIT, + 88, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(89, "PC0CE1", 89, + 5, UNIPHIER_PIN_DRV_1BIT, + 89, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(90, "PC0WE", 90, + 6, UNIPHIER_PIN_DRV_1BIT, + 90, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(91, "PC0OE", 91, + 7, UNIPHIER_PIN_DRV_1BIT, + 91, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(92, "PC0IOWR", 92, + 8, UNIPHIER_PIN_DRV_1BIT, + 92, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(93, "PC0IORD", 93, + 9, UNIPHIER_PIN_DRV_1BIT, + 93, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(94, "PCD00", 94, + 10, UNIPHIER_PIN_DRV_1BIT, + 94, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(95, "PCD01", 95, + 11, UNIPHIER_PIN_DRV_1BIT, + 95, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(96, "PCD02", 96, + 12, UNIPHIER_PIN_DRV_1BIT, + 96, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(97, "PCD03", 97, + 13, UNIPHIER_PIN_DRV_1BIT, + 97, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(98, "PCD04", 98, + 14, UNIPHIER_PIN_DRV_1BIT, + 98, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(99, "PCD05", 99, + 15, UNIPHIER_PIN_DRV_1BIT, + 99, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(100, "PCD06", 100, + 16, UNIPHIER_PIN_DRV_1BIT, + 100, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(101, "PCD07", 101, + 17, UNIPHIER_PIN_DRV_1BIT, + 101, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(102, "HS0BCLKIN", 102, + 18, UNIPHIER_PIN_DRV_1BIT, + 102, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(103, "HS0SYNCIN", 103, + 19, UNIPHIER_PIN_DRV_1BIT, + 103, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(104, "HS0VALIN", 104, + 20, UNIPHIER_PIN_DRV_1BIT, + 104, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(105, "HS0DIN0", 105, + 21, UNIPHIER_PIN_DRV_1BIT, + 105, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(106, "HS0DIN1", 106, + 22, UNIPHIER_PIN_DRV_1BIT, + 106, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(107, "HS0DIN2", 107, + 23, UNIPHIER_PIN_DRV_1BIT, + 107, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(108, "HS0DIN3", 108, + 24, UNIPHIER_PIN_DRV_1BIT, + 108, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(109, "HS0DIN4", 109, + 25, UNIPHIER_PIN_DRV_1BIT, + 109, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(110, "HS0DIN5", 110, + 26, UNIPHIER_PIN_DRV_1BIT, + 110, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(111, "HS0DIN6", 111, + 27, UNIPHIER_PIN_DRV_1BIT, + 111, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(112, "HS0DIN7", 112, + 28, UNIPHIER_PIN_DRV_1BIT, + 112, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(113, "HS0BCLKOUT", 113, + 64, UNIPHIER_PIN_DRV_3BIT, + 113, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(114, "HS0SYNCOUT", 114, + 65, UNIPHIER_PIN_DRV_3BIT, + 114, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(115, "HS0VALOUT", 115, + 66, UNIPHIER_PIN_DRV_3BIT, + 115, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(116, "HS0DOUT0", 116, + 67, UNIPHIER_PIN_DRV_3BIT, + 116, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(117, "HS0DOUT1", 117, + 68, UNIPHIER_PIN_DRV_3BIT, + 117, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(118, "HS0DOUT2", 118, + 69, UNIPHIER_PIN_DRV_3BIT, + 118, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(119, "HS0DOUT3", 119, + 70, UNIPHIER_PIN_DRV_3BIT, + 119, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(120, "HS0DOUT4", 120, + 71, UNIPHIER_PIN_DRV_3BIT, + 120, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(121, "HS0DOUT5", 121, + 72, UNIPHIER_PIN_DRV_3BIT, + 121, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(122, "HS0DOUT6", 122, + 73, UNIPHIER_PIN_DRV_3BIT, + 122, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(123, "HS0DOUT7", 123, + 74, UNIPHIER_PIN_DRV_3BIT, + 123, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(124, "HS1BCLKIN", 124, + 75, UNIPHIER_PIN_DRV_3BIT, + 124, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(125, "HS1SYNCIN", 125, + 76, UNIPHIER_PIN_DRV_3BIT, + 125, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(126, "HS1VALIN", 126, + 77, UNIPHIER_PIN_DRV_3BIT, + 126, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(127, "HS1DIN0", 127, + 78, UNIPHIER_PIN_DRV_3BIT, + 127, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(128, "HS1DIN1", 128, + 79, UNIPHIER_PIN_DRV_3BIT, + 128, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(129, "HS1DIN2", 129, + 80, UNIPHIER_PIN_DRV_3BIT, + 129, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(130, "HS1DIN3", 130, + 81, UNIPHIER_PIN_DRV_3BIT, + 130, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(131, "HS1DIN4", 131, + 82, UNIPHIER_PIN_DRV_3BIT, + 131, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(132, "HS1DIN5", 132, + 83, UNIPHIER_PIN_DRV_3BIT, + 132, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(133, "HS1DIN6", 133, + 84, UNIPHIER_PIN_DRV_3BIT, + 133, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(134, "HS1DIN7", 134, + 85, UNIPHIER_PIN_DRV_3BIT, + 134, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(135, "AO1IEC", 135, + 86, UNIPHIER_PIN_DRV_3BIT, + 135, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(136, "AO1ARC", 136, + 87, UNIPHIER_PIN_DRV_3BIT, + 136, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(137, "AO1DACCK", 137, + 88, UNIPHIER_PIN_DRV_3BIT, + 137, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(138, "AO1BCK", 138, + 89, UNIPHIER_PIN_DRV_3BIT, + 138, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(139, "AO1LRCK", 139, + 90, UNIPHIER_PIN_DRV_3BIT, + 139, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(140, "AO1D0", 140, + 91, UNIPHIER_PIN_DRV_3BIT, + 140, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(141, "AO1D1", 141, + 92, UNIPHIER_PIN_DRV_3BIT, + 141, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(142, "AO1D2", 142, + 93, UNIPHIER_PIN_DRV_3BIT, + 142, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(143, "HTPDN0", 143, + 94, UNIPHIER_PIN_DRV_3BIT, + 143, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(144, "LOCKN0", 144, + 95, UNIPHIER_PIN_DRV_3BIT, + 144, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(145, "HTPDN1", 145, + 96, UNIPHIER_PIN_DRV_3BIT, + 145, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(146, "LOCKN1", 146, + 97, UNIPHIER_PIN_DRV_3BIT, + 146, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(147, "PWMA", 147, + 98, UNIPHIER_PIN_DRV_3BIT, + 147, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(148, "LR_GOUT", 148, + 99, UNIPHIER_PIN_DRV_3BIT, + 148, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(149, "XIRQ0", 149, + 100, UNIPHIER_PIN_DRV_3BIT, + 149, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(150, "XIRQ1", 150, + 101, UNIPHIER_PIN_DRV_3BIT, + 150, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(151, "XIRQ2", 151, + 102, UNIPHIER_PIN_DRV_3BIT, + 151, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(152, "XIRQ3", 152, + 103, UNIPHIER_PIN_DRV_3BIT, + 152, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(153, "XIRQ4", 153, + 104, UNIPHIER_PIN_DRV_3BIT, + 153, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(154, "XIRQ5", 154, + 105, UNIPHIER_PIN_DRV_3BIT, + 154, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(155, "XIRQ6", 155, + 106, UNIPHIER_PIN_DRV_3BIT, + 155, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(156, "XIRQ7", 156, + 107, UNIPHIER_PIN_DRV_3BIT, + 156, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(157, "XIRQ8", 157, + 108, UNIPHIER_PIN_DRV_3BIT, + 157, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(158, "XIRQ9", 158, + 109, UNIPHIER_PIN_DRV_3BIT, + 158, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(159, "XIRQ10", 159, + 110, UNIPHIER_PIN_DRV_3BIT, + 159, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(160, "XIRQ11", 160, + 111, UNIPHIER_PIN_DRV_3BIT, + 160, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(161, "XIRQ13", 161, + 112, UNIPHIER_PIN_DRV_3BIT, + 161, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(162, "XIRQ14", 162, + 113, UNIPHIER_PIN_DRV_3BIT, + 162, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(163, "XIRQ16", 163, + 114, UNIPHIER_PIN_DRV_3BIT, + 163, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(164, "XIRQ17", 164, + 115, UNIPHIER_PIN_DRV_3BIT, + 164, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(165, "XIRQ18", 165, + 116, UNIPHIER_PIN_DRV_3BIT, + 165, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(166, "XIRQ19", 166, + 117, UNIPHIER_PIN_DRV_3BIT, + 166, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(167, "XIRQ20", 167, + 118, UNIPHIER_PIN_DRV_3BIT, + 167, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(168, "PORT00", 168, + 119, UNIPHIER_PIN_DRV_3BIT, + 168, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(169, "PORT01", 169, + 120, UNIPHIER_PIN_DRV_3BIT, + 169, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(170, "PORT02", 170, + 121, UNIPHIER_PIN_DRV_3BIT, + 170, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(171, "PORT03", 171, + 122, UNIPHIER_PIN_DRV_3BIT, + 171, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(172, "PORT04", 172, + 123, UNIPHIER_PIN_DRV_3BIT, + 172, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(173, "CK27FO", 173, + 124, UNIPHIER_PIN_DRV_3BIT, + 173, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(174, "PHSYNCO", 174, + 125, UNIPHIER_PIN_DRV_3BIT, + 174, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(175, "PVSYNCO", 175, + 126, UNIPHIER_PIN_DRV_3BIT, + 175, UNIPHIER_PIN_PULL_DOWN), +}; + +static const unsigned emmc_pins[] = {18, 19, 20, 21, 22, 23, 24, 25}; +static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned emmc_dat8_pins[] = {26, 27, 28, 29}; +static const int emmc_dat8_muxvals[] = {0, 0, 0, 0}; +static const unsigned i2c0_pins[] = {63, 64}; +static const int i2c0_muxvals[] = {0, 0}; +static const unsigned i2c1_pins[] = {65, 66}; +static const int i2c1_muxvals[] = {0, 0}; +static const unsigned i2c3_pins[] = {67, 68}; +static const int i2c3_muxvals[] = {1, 1}; +static const unsigned i2c4_pins[] = {61, 62}; +static const int i2c4_muxvals[] = {1, 1}; +static const unsigned nand_pins[] = {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 15, 16, 17}; +static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned sd_pins[] = {10, 11, 12, 13, 14, 15, 16, 17}; +static const int sd_muxvals[] = {3, 3, 3, 3, 3, 3, 3, 3}; /* No SDVOLC */ +static const unsigned system_bus_pins[] = {1, 2, 6, 7, 8, 9, 10, 11, 12, 13, + 14, 15, 16, 17}; +static const int system_bus_muxvals[] = {0, 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2}; +static const unsigned system_bus_cs1_pins[] = {0}; +static const int system_bus_cs1_muxvals[] = {0}; +static const unsigned uart0_pins[] = {54, 55}; +static const int uart0_muxvals[] = {0, 0}; +static const unsigned uart1_pins[] = {58, 59}; +static const int uart1_muxvals[] = {1, 1}; +static const unsigned uart2_pins[] = {90, 91}; +static const int uart2_muxvals[] = {1, 1}; +static const unsigned uart3_pins[] = {94, 95}; +static const int uart3_muxvals[] = {1, 1}; +static const unsigned usb0_pins[] = {46, 47}; +static const int usb0_muxvals[] = {0, 0}; +static const unsigned usb1_pins[] = {48, 49}; +static const int usb1_muxvals[] = {0, 0}; +static const unsigned usb2_pins[] = {50, 51}; +static const int usb2_muxvals[] = {0, 0}; +static const unsigned usb3_pins[] = {52, 53}; +static const int usb3_muxvals[] = {0, 0}; +static const unsigned port_range_pins[] = { + 168, 169, 170, 171, 172, 173, 174, 175, /* PORT0x */ + 0, 1, 2, 3, 4, 5, 6, 7, /* PORT1x */ + 8, 9, 10, 11, 12, 13, 14, 15, /* PORT2x */ + 16, 17, 18, 30, 31, 32, 33, 34, /* PORT3x */ + 35, 36, 37, 38, 39, 40, 41, 42, /* PORT4x */ + 43, 44, 45, 46, 47, 48, 49, 50, /* PORT5x */ + 51, 52, 53, 54, 55, 56, 57, 58, /* PORT6x */ + 59, 60, 69, 70, 71, 72, 73, 74, /* PORT7x */ + 75, 76, 77, 78, 79, 80, 81, 82, /* PORT8x */ + 83, 84, 85, 86, 87, 88, 89, 90, /* PORT9x */ + 91, 92, 93, 94, 95, 96, 97, 98, /* PORT10x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT11x */ + 99, 100, 101, 102, 103, 104, 105, 106, /* PORT12x */ + 107, 108, 109, 110, 111, 112, 113, 114, /* PORT13x */ + 115, 116, 117, 118, 119, 120, 121, 122, /* PORT14x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT15x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT16x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT17x */ + 61, 62, 63, 64, 65, 66, 67, 68, /* PORT18x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT19x */ + 123, 124, 125, 126, 127, 128, 129, 130, /* PORT20x */ + 131, 132, 133, 134, 135, 136, 137, 138, /* PORT21x */ + 139, 140, 141, 142, 143, 144, 145, 146, /* PORT22x */ + 147, 148, 149, 150, 151, 152, 153, 154, /* PORT23x */ + 155, 156, 157, 158, 159, 160, 161, 162, /* PORT24x */ + 163, 164, 165, 166, 167, /* PORT25x */ +}; +static const int port_range_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT0x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT1x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT2x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT3x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT4x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT5x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT6x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT7x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT8x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT9x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT10x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT11x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT12x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT13x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT14x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT15x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT16x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT17x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT18x */ + -1, -1, -1, -1, -1, -1, -1, -1, /* PORT19x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT20x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT21x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT22x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT23x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT24x */ + 15, 15, 15, 15, 15, /* PORT25x */ +}; +static const unsigned xirq_pins[] = { + 149, 150, 151, 152, 153, 154, 155, 156, /* XIRQ0-7 */ + 157, 158, 159, 160, 85, 161, 162, 84, /* XIRQ8-15 */ + 163, 164, 165, 166, 167, 146, 52, 53, /* XIRQ16-23 */ +}; +static const int xirq_muxvals[] = { + 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ0-7 */ + 14, 14, 14, 14, 13, 14, 14, 13, /* XIRQ8-15 */ + 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ16-23 */ +}; +static const unsigned xirq_alternatives_pins[] = { + 94, 95, 96, 97, 98, 99, 100, 101, /* XIRQ0-7 */ + 102, 103, 104, 105, 106, 107, /* XIRQ8-11,13,14 */ + 108, 109, 110, 111, 112, 147, 141, 142, /* XIRQ16-23 */ +}; +static const int xirq_alternatives_muxvals[] = { + 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ0-7 */ + 14, 14, 14, 14, 14, 14, /* XIRQ8-11,13,14 */ + 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ16-23 */ +}; + +static const struct uniphier_pinctrl_group uniphier_ld20_groups[] = { + UNIPHIER_PINCTRL_GROUP(emmc), + UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(i2c4), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(system_bus), + UNIPHIER_PINCTRL_GROUP(system_bus_cs1), + UNIPHIER_PINCTRL_GROUP(uart0), + UNIPHIER_PINCTRL_GROUP(uart1), + UNIPHIER_PINCTRL_GROUP(uart2), + UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb3), + UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range), + UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(xirq), + UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(xirq_alternatives), + UNIPHIER_PINCTRL_GROUP_SINGLE(port00, port_range, 0), + UNIPHIER_PINCTRL_GROUP_SINGLE(port01, port_range, 1), + UNIPHIER_PINCTRL_GROUP_SINGLE(port02, port_range, 2), + UNIPHIER_PINCTRL_GROUP_SINGLE(port03, port_range, 3), + UNIPHIER_PINCTRL_GROUP_SINGLE(port04, port_range, 4), + UNIPHIER_PINCTRL_GROUP_SINGLE(port05, port_range, 5), + UNIPHIER_PINCTRL_GROUP_SINGLE(port06, port_range, 6), + UNIPHIER_PINCTRL_GROUP_SINGLE(port07, port_range, 7), + UNIPHIER_PINCTRL_GROUP_SINGLE(port10, port_range, 8), + UNIPHIER_PINCTRL_GROUP_SINGLE(port11, port_range, 9), + UNIPHIER_PINCTRL_GROUP_SINGLE(port12, port_range, 10), + UNIPHIER_PINCTRL_GROUP_SINGLE(port13, port_range, 11), + UNIPHIER_PINCTRL_GROUP_SINGLE(port14, port_range, 12), + UNIPHIER_PINCTRL_GROUP_SINGLE(port15, port_range, 13), + UNIPHIER_PINCTRL_GROUP_SINGLE(port16, port_range, 14), + UNIPHIER_PINCTRL_GROUP_SINGLE(port17, port_range, 15), + UNIPHIER_PINCTRL_GROUP_SINGLE(port20, port_range, 16), + UNIPHIER_PINCTRL_GROUP_SINGLE(port21, port_range, 17), + UNIPHIER_PINCTRL_GROUP_SINGLE(port22, port_range, 18), + UNIPHIER_PINCTRL_GROUP_SINGLE(port23, port_range, 19), + UNIPHIER_PINCTRL_GROUP_SINGLE(port24, port_range, 20), + UNIPHIER_PINCTRL_GROUP_SINGLE(port25, port_range, 21), + UNIPHIER_PINCTRL_GROUP_SINGLE(port26, port_range, 22), + UNIPHIER_PINCTRL_GROUP_SINGLE(port27, port_range, 23), + UNIPHIER_PINCTRL_GROUP_SINGLE(port30, port_range, 24), + UNIPHIER_PINCTRL_GROUP_SINGLE(port31, port_range, 25), + UNIPHIER_PINCTRL_GROUP_SINGLE(port32, port_range, 26), + UNIPHIER_PINCTRL_GROUP_SINGLE(port33, port_range, 27), + UNIPHIER_PINCTRL_GROUP_SINGLE(port34, port_range, 28), + UNIPHIER_PINCTRL_GROUP_SINGLE(port35, port_range, 29), + UNIPHIER_PINCTRL_GROUP_SINGLE(port36, port_range, 30), + UNIPHIER_PINCTRL_GROUP_SINGLE(port37, port_range, 31), + UNIPHIER_PINCTRL_GROUP_SINGLE(port40, port_range, 32), + UNIPHIER_PINCTRL_GROUP_SINGLE(port41, port_range, 33), + UNIPHIER_PINCTRL_GROUP_SINGLE(port42, port_range, 34), + UNIPHIER_PINCTRL_GROUP_SINGLE(port43, port_range, 35), + UNIPHIER_PINCTRL_GROUP_SINGLE(port44, port_range, 36), + UNIPHIER_PINCTRL_GROUP_SINGLE(port45, port_range, 37), + UNIPHIER_PINCTRL_GROUP_SINGLE(port46, port_range, 38), + UNIPHIER_PINCTRL_GROUP_SINGLE(port47, port_range, 39), + UNIPHIER_PINCTRL_GROUP_SINGLE(port50, port_range, 40), + UNIPHIER_PINCTRL_GROUP_SINGLE(port51, port_range, 41), + UNIPHIER_PINCTRL_GROUP_SINGLE(port52, port_range, 42), + UNIPHIER_PINCTRL_GROUP_SINGLE(port53, port_range, 43), + UNIPHIER_PINCTRL_GROUP_SINGLE(port54, port_range, 44), + UNIPHIER_PINCTRL_GROUP_SINGLE(port55, port_range, 45), + UNIPHIER_PINCTRL_GROUP_SINGLE(port56, port_range, 46), + UNIPHIER_PINCTRL_GROUP_SINGLE(port57, port_range, 47), + UNIPHIER_PINCTRL_GROUP_SINGLE(port60, port_range, 48), + UNIPHIER_PINCTRL_GROUP_SINGLE(port61, port_range, 49), + UNIPHIER_PINCTRL_GROUP_SINGLE(port62, port_range, 50), + UNIPHIER_PINCTRL_GROUP_SINGLE(port63, port_range, 51), + UNIPHIER_PINCTRL_GROUP_SINGLE(port64, port_range, 52), + UNIPHIER_PINCTRL_GROUP_SINGLE(port65, port_range, 53), + UNIPHIER_PINCTRL_GROUP_SINGLE(port66, port_range, 54), + UNIPHIER_PINCTRL_GROUP_SINGLE(port67, port_range, 55), + UNIPHIER_PINCTRL_GROUP_SINGLE(port70, port_range, 56), + UNIPHIER_PINCTRL_GROUP_SINGLE(port71, port_range, 57), + UNIPHIER_PINCTRL_GROUP_SINGLE(port72, port_range, 58), + UNIPHIER_PINCTRL_GROUP_SINGLE(port73, port_range, 59), + UNIPHIER_PINCTRL_GROUP_SINGLE(port74, port_range, 60), + UNIPHIER_PINCTRL_GROUP_SINGLE(port75, port_range, 61), + UNIPHIER_PINCTRL_GROUP_SINGLE(port76, port_range, 62), + UNIPHIER_PINCTRL_GROUP_SINGLE(port77, port_range, 63), + UNIPHIER_PINCTRL_GROUP_SINGLE(port80, port_range, 64), + UNIPHIER_PINCTRL_GROUP_SINGLE(port81, port_range, 65), + UNIPHIER_PINCTRL_GROUP_SINGLE(port82, port_range, 66), + UNIPHIER_PINCTRL_GROUP_SINGLE(port83, port_range, 67), + UNIPHIER_PINCTRL_GROUP_SINGLE(port84, port_range, 68), + UNIPHIER_PINCTRL_GROUP_SINGLE(port85, port_range, 69), + UNIPHIER_PINCTRL_GROUP_SINGLE(port86, port_range, 70), + UNIPHIER_PINCTRL_GROUP_SINGLE(port87, port_range, 71), + UNIPHIER_PINCTRL_GROUP_SINGLE(port90, port_range, 72), + UNIPHIER_PINCTRL_GROUP_SINGLE(port91, port_range, 73), + UNIPHIER_PINCTRL_GROUP_SINGLE(port92, port_range, 74), + UNIPHIER_PINCTRL_GROUP_SINGLE(port93, port_range, 75), + UNIPHIER_PINCTRL_GROUP_SINGLE(port94, port_range, 76), + UNIPHIER_PINCTRL_GROUP_SINGLE(port95, port_range, 77), + UNIPHIER_PINCTRL_GROUP_SINGLE(port96, port_range, 78), + UNIPHIER_PINCTRL_GROUP_SINGLE(port97, port_range, 79), + UNIPHIER_PINCTRL_GROUP_SINGLE(port100, port_range, 80), + UNIPHIER_PINCTRL_GROUP_SINGLE(port101, port_range, 81), + UNIPHIER_PINCTRL_GROUP_SINGLE(port102, port_range, 82), + UNIPHIER_PINCTRL_GROUP_SINGLE(port103, port_range, 83), + UNIPHIER_PINCTRL_GROUP_SINGLE(port104, port_range, 84), + UNIPHIER_PINCTRL_GROUP_SINGLE(port105, port_range, 85), + UNIPHIER_PINCTRL_GROUP_SINGLE(port106, port_range, 86), + UNIPHIER_PINCTRL_GROUP_SINGLE(port107, port_range, 87), + UNIPHIER_PINCTRL_GROUP_SINGLE(port120, port_range, 96), + UNIPHIER_PINCTRL_GROUP_SINGLE(port121, port_range, 97), + UNIPHIER_PINCTRL_GROUP_SINGLE(port122, port_range, 98), + UNIPHIER_PINCTRL_GROUP_SINGLE(port123, port_range, 99), + UNIPHIER_PINCTRL_GROUP_SINGLE(port124, port_range, 100), + UNIPHIER_PINCTRL_GROUP_SINGLE(port125, port_range, 101), + UNIPHIER_PINCTRL_GROUP_SINGLE(port126, port_range, 102), + UNIPHIER_PINCTRL_GROUP_SINGLE(port127, port_range, 103), + UNIPHIER_PINCTRL_GROUP_SINGLE(port130, port_range, 104), + UNIPHIER_PINCTRL_GROUP_SINGLE(port131, port_range, 105), + UNIPHIER_PINCTRL_GROUP_SINGLE(port132, port_range, 106), + UNIPHIER_PINCTRL_GROUP_SINGLE(port133, port_range, 107), + UNIPHIER_PINCTRL_GROUP_SINGLE(port134, port_range, 108), + UNIPHIER_PINCTRL_GROUP_SINGLE(port135, port_range, 109), + UNIPHIER_PINCTRL_GROUP_SINGLE(port136, port_range, 110), + UNIPHIER_PINCTRL_GROUP_SINGLE(port137, port_range, 111), + UNIPHIER_PINCTRL_GROUP_SINGLE(port140, port_range, 112), + UNIPHIER_PINCTRL_GROUP_SINGLE(port141, port_range, 113), + UNIPHIER_PINCTRL_GROUP_SINGLE(port142, port_range, 114), + UNIPHIER_PINCTRL_GROUP_SINGLE(port143, port_range, 115), + UNIPHIER_PINCTRL_GROUP_SINGLE(port144, port_range, 116), + UNIPHIER_PINCTRL_GROUP_SINGLE(port145, port_range, 117), + UNIPHIER_PINCTRL_GROUP_SINGLE(port146, port_range, 118), + UNIPHIER_PINCTRL_GROUP_SINGLE(port147, port_range, 119), + UNIPHIER_PINCTRL_GROUP_SINGLE(port180, port_range, 144), + UNIPHIER_PINCTRL_GROUP_SINGLE(port181, port_range, 145), + UNIPHIER_PINCTRL_GROUP_SINGLE(port182, port_range, 146), + UNIPHIER_PINCTRL_GROUP_SINGLE(port183, port_range, 147), + UNIPHIER_PINCTRL_GROUP_SINGLE(port184, port_range, 148), + UNIPHIER_PINCTRL_GROUP_SINGLE(port185, port_range, 149), + UNIPHIER_PINCTRL_GROUP_SINGLE(port186, port_range, 150), + UNIPHIER_PINCTRL_GROUP_SINGLE(port187, port_range, 151), + UNIPHIER_PINCTRL_GROUP_SINGLE(port200, port_range, 160), + UNIPHIER_PINCTRL_GROUP_SINGLE(port201, port_range, 161), + UNIPHIER_PINCTRL_GROUP_SINGLE(port202, port_range, 162), + UNIPHIER_PINCTRL_GROUP_SINGLE(port203, port_range, 163), + UNIPHIER_PINCTRL_GROUP_SINGLE(port204, port_range, 164), + UNIPHIER_PINCTRL_GROUP_SINGLE(port205, port_range, 165), + UNIPHIER_PINCTRL_GROUP_SINGLE(port206, port_range, 166), + UNIPHIER_PINCTRL_GROUP_SINGLE(port207, port_range, 167), + UNIPHIER_PINCTRL_GROUP_SINGLE(port210, port_range, 168), + UNIPHIER_PINCTRL_GROUP_SINGLE(port211, port_range, 169), + UNIPHIER_PINCTRL_GROUP_SINGLE(port212, port_range, 170), + UNIPHIER_PINCTRL_GROUP_SINGLE(port213, port_range, 171), + UNIPHIER_PINCTRL_GROUP_SINGLE(port214, port_range, 172), + UNIPHIER_PINCTRL_GROUP_SINGLE(port215, port_range, 173), + UNIPHIER_PINCTRL_GROUP_SINGLE(port216, port_range, 174), + UNIPHIER_PINCTRL_GROUP_SINGLE(port217, port_range, 175), + UNIPHIER_PINCTRL_GROUP_SINGLE(port220, port_range, 176), + UNIPHIER_PINCTRL_GROUP_SINGLE(port221, port_range, 177), + UNIPHIER_PINCTRL_GROUP_SINGLE(port222, port_range, 178), + UNIPHIER_PINCTRL_GROUP_SINGLE(port223, port_range, 179), + UNIPHIER_PINCTRL_GROUP_SINGLE(port224, port_range, 180), + UNIPHIER_PINCTRL_GROUP_SINGLE(port225, port_range, 181), + UNIPHIER_PINCTRL_GROUP_SINGLE(port226, port_range, 182), + UNIPHIER_PINCTRL_GROUP_SINGLE(port227, port_range, 183), + UNIPHIER_PINCTRL_GROUP_SINGLE(port230, port_range, 184), + UNIPHIER_PINCTRL_GROUP_SINGLE(port231, port_range, 185), + UNIPHIER_PINCTRL_GROUP_SINGLE(port232, port_range, 186), + UNIPHIER_PINCTRL_GROUP_SINGLE(port233, port_range, 187), + UNIPHIER_PINCTRL_GROUP_SINGLE(port234, port_range, 188), + UNIPHIER_PINCTRL_GROUP_SINGLE(port235, port_range, 189), + UNIPHIER_PINCTRL_GROUP_SINGLE(port236, port_range, 190), + UNIPHIER_PINCTRL_GROUP_SINGLE(port237, port_range, 191), + UNIPHIER_PINCTRL_GROUP_SINGLE(port240, port_range, 192), + UNIPHIER_PINCTRL_GROUP_SINGLE(port241, port_range, 193), + UNIPHIER_PINCTRL_GROUP_SINGLE(port242, port_range, 194), + UNIPHIER_PINCTRL_GROUP_SINGLE(port243, port_range, 195), + UNIPHIER_PINCTRL_GROUP_SINGLE(port244, port_range, 196), + UNIPHIER_PINCTRL_GROUP_SINGLE(port245, port_range, 197), + UNIPHIER_PINCTRL_GROUP_SINGLE(port246, port_range, 198), + UNIPHIER_PINCTRL_GROUP_SINGLE(port247, port_range, 199), + UNIPHIER_PINCTRL_GROUP_SINGLE(port250, port_range, 200), + UNIPHIER_PINCTRL_GROUP_SINGLE(port251, port_range, 201), + UNIPHIER_PINCTRL_GROUP_SINGLE(port252, port_range, 202), + UNIPHIER_PINCTRL_GROUP_SINGLE(port253, port_range, 203), + UNIPHIER_PINCTRL_GROUP_SINGLE(port254, port_range, 204), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq0, xirq, 0), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq1, xirq, 1), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq2, xirq, 2), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq3, xirq, 3), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq4, xirq, 4), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq5, xirq, 5), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq6, xirq, 6), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq7, xirq, 7), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq8, xirq, 8), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq9, xirq, 9), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq10, xirq, 10), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq11, xirq, 11), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq12, xirq, 12), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq13, xirq, 13), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq14, xirq, 14), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq15, xirq, 15), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq16, xirq, 16), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq17, xirq, 17), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq18, xirq, 18), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq19, xirq, 19), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq20, xirq, 20), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq21, xirq, 21), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq22, xirq, 22), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq23, xirq, 23), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq0b, xirq_alternatives, 0), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq1b, xirq_alternatives, 1), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq2b, xirq_alternatives, 2), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq3b, xirq_alternatives, 3), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq4b, xirq_alternatives, 4), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq5b, xirq_alternatives, 5), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq6b, xirq_alternatives, 6), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq7b, xirq_alternatives, 7), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq8b, xirq_alternatives, 8), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq9b, xirq_alternatives, 9), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq10b, xirq_alternatives, 10), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq11b, xirq_alternatives, 11), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq13b, xirq_alternatives, 12), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq14b, xirq_alternatives, 13), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq16b, xirq_alternatives, 14), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq17b, xirq_alternatives, 15), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq18b, xirq_alternatives, 16), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq19b, xirq_alternatives, 17), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq20b, xirq_alternatives, 18), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq21b, xirq_alternatives, 19), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq22b, xirq_alternatives, 20), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq23b, xirq_alternatives, 21), +}; + +static const char * const emmc_groups[] = {"emmc", "emmc_dat8"}; +static const char * const i2c0_groups[] = {"i2c0"}; +static const char * const i2c1_groups[] = {"i2c1"}; +static const char * const i2c3_groups[] = {"i2c3"}; +static const char * const i2c4_groups[] = {"i2c4"}; +static const char * const nand_groups[] = {"nand"}; +static const char * const sd_groups[] = {"sd"}; +static const char * const system_bus_groups[] = {"system_bus", + "system_bus_cs1"}; +static const char * const uart0_groups[] = {"uart0"}; +static const char * const uart1_groups[] = {"uart1"}; +static const char * const uart2_groups[] = {"uart2"}; +static const char * const uart3_groups[] = {"uart3"}; +static const char * const usb0_groups[] = {"usb0"}; +static const char * const usb1_groups[] = {"usb1"}; +static const char * const usb2_groups[] = {"usb2"}; +static const char * const usb3_groups[] = {"usb3"}; +static const char * const port_groups[] = { + "port00", "port01", "port02", "port03", + "port04", "port05", "port06", "port07", + "port10", "port11", "port12", "port13", + "port14", "port15", "port16", "port17", + "port20", "port21", "port22", "port23", + "port24", "port25", "port26", "port27", + "port30", "port31", "port32", "port33", + "port34", "port35", "port36", "port37", + "port40", "port41", "port42", "port43", + "port44", "port45", "port46", "port47", + "port50", "port51", "port52", "port53", + "port54", "port55", "port56", "port57", + "port60", "port61", "port62", "port63", + "port64", "port65", "port66", "port67", + "port70", "port71", "port72", "port73", + "port74", "port75", "port76", "port77", + "port80", "port81", "port82", "port83", + "port84", "port85", "port86", "port87", + "port90", "port91", "port92", "port93", + "port94", "port95", "port96", "port97", + "port100", "port101", "port102", "port103", + "port104", "port105", "port106", "port107", + /* port110-117 missing */ + "port120", "port121", "port122", "port123", + "port124", "port125", "port126", "port127", + "port130", "port131", "port132", "port133", + "port134", "port135", "port136", "port137", + "port140", "port141", "port142", "port143", + "port144", "port145", "port146", "port147", + /* port150-177 missing */ + "port180", "port181", "port182", "port183", + "port184", "port185", "port186", "port187", + /* port190-197 missing */ + "port200", "port201", "port202", "port203", + "port204", "port205", "port206", "port207", + "port210", "port211", "port212", "port213", + "port214", "port215", "port216", "port217", + "port220", "port221", "port222", "port223", + "port224", "port225", "port226", "port227", + "port230", "port231", "port232", "port233", + "port234", "port235", "port236", "port237", + "port240", "port241", "port242", "port243", + "port244", "port245", "port246", "port247", + "port250", "port251", "port252", "port253", + "port254", +}; +static const char * const xirq_groups[] = { + "xirq0", "xirq1", "xirq2", "xirq3", + "xirq4", "xirq5", "xirq6", "xirq7", + "xirq8", "xirq9", "xirq10", "xirq11", + "xirq12", "xirq13", "xirq14", "xirq15", + "xirq16", "xirq17", "xirq18", "xirq19", + "xirq20", "xirq21", "xirq22", "xirq23", + "xirq0b", "xirq1b", "xirq2b", "xirq3b", + "xirq4b", "xirq5b", "xirq6b", "xirq7b", + "xirq8b", "xirq9b", "xirq10b", "xirq11b", + /* none */ "xirq13b", "xirq14b", /* none */ + "xirq16b", "xirq17b", "xirq18b", "xirq19b", + "xirq20b", "xirq21b", "xirq22b", "xirq23b", +}; + +static const struct uniphier_pinmux_function uniphier_ld20_functions[] = { + UNIPHIER_PINMUX_FUNCTION(emmc), + UNIPHIER_PINMUX_FUNCTION(i2c0), + UNIPHIER_PINMUX_FUNCTION(i2c1), + UNIPHIER_PINMUX_FUNCTION(i2c3), + UNIPHIER_PINMUX_FUNCTION(i2c4), + UNIPHIER_PINMUX_FUNCTION(nand), + UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION(system_bus), + UNIPHIER_PINMUX_FUNCTION(uart0), + UNIPHIER_PINMUX_FUNCTION(uart1), + UNIPHIER_PINMUX_FUNCTION(uart2), + UNIPHIER_PINMUX_FUNCTION(uart3), + UNIPHIER_PINMUX_FUNCTION(usb0), + UNIPHIER_PINMUX_FUNCTION(usb1), + UNIPHIER_PINMUX_FUNCTION(usb2), + UNIPHIER_PINMUX_FUNCTION(usb3), + UNIPHIER_PINMUX_FUNCTION(port), + UNIPHIER_PINMUX_FUNCTION(xirq), +}; + +static struct uniphier_pinctrl_socdata uniphier_ld20_pindata = { + .pins = uniphier_ld20_pins, + .npins = ARRAY_SIZE(uniphier_ld20_pins), + .groups = uniphier_ld20_groups, + .groups_count = ARRAY_SIZE(uniphier_ld20_groups), + .functions = uniphier_ld20_functions, + .functions_count = ARRAY_SIZE(uniphier_ld20_functions), + .caps = UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL, +}; + +static int uniphier_ld20_pinctrl_probe(struct platform_device *pdev) +{ + return uniphier_pinctrl_probe(pdev, &uniphier_ld20_pindata); +} + +static const struct of_device_id uniphier_ld20_pinctrl_match[] = { + { .compatible = "socionext,uniphier-ld20-pinctrl" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, uniphier_ld20_pinctrl_match); + +static struct platform_driver uniphier_ld20_pinctrl_driver = { + .probe = uniphier_ld20_pinctrl_probe, + .driver = { + .name = "uniphier-ld20-pinctrl", + .of_match_table = uniphier_ld20_pinctrl_match, + }, +}; +module_platform_driver(uniphier_ld20_pinctrl_driver); + +MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>"); +MODULE_DESCRIPTION("UniPhier PH1-LD20 pinctrl driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c index 4a0439c80aa0..98044bcd493e 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c @@ -19,544 +19,584 @@ #include "pinctrl-uniphier.h" -#define DRIVER_NAME "ph1-ld4-pinctrl" - -static const struct pinctrl_pin_desc ph1_ld4_pins[] = { +static const struct pinctrl_pin_desc uniphier_ld4_pins[] = { UNIPHIER_PINCTRL_PIN(0, "EA1", UNIPHIER_PIN_IECTRL_NONE, - 8, UNIPHIER_PIN_DRV_4_8, + 8, UNIPHIER_PIN_DRV_1BIT, 8, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(1, "EA2", UNIPHIER_PIN_IECTRL_NONE, - 9, UNIPHIER_PIN_DRV_4_8, + 9, UNIPHIER_PIN_DRV_1BIT, 9, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(2, "EA3", UNIPHIER_PIN_IECTRL_NONE, - 10, UNIPHIER_PIN_DRV_4_8, + 10, UNIPHIER_PIN_DRV_1BIT, 10, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(3, "EA4", UNIPHIER_PIN_IECTRL_NONE, - 11, UNIPHIER_PIN_DRV_4_8, + 11, UNIPHIER_PIN_DRV_1BIT, 11, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(4, "EA5", UNIPHIER_PIN_IECTRL_NONE, - 12, UNIPHIER_PIN_DRV_4_8, + 12, UNIPHIER_PIN_DRV_1BIT, 12, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(5, "EA6", UNIPHIER_PIN_IECTRL_NONE, - 13, UNIPHIER_PIN_DRV_4_8, + 13, UNIPHIER_PIN_DRV_1BIT, 13, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(6, "EA7", UNIPHIER_PIN_IECTRL_NONE, - 14, UNIPHIER_PIN_DRV_4_8, + 14, UNIPHIER_PIN_DRV_1BIT, 14, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(7, "EA8", 0, - 15, UNIPHIER_PIN_DRV_4_8, + 15, UNIPHIER_PIN_DRV_1BIT, 15, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(8, "EA9", 0, - 16, UNIPHIER_PIN_DRV_4_8, + 16, UNIPHIER_PIN_DRV_1BIT, 16, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(9, "EA10", 0, - 17, UNIPHIER_PIN_DRV_4_8, + 17, UNIPHIER_PIN_DRV_1BIT, 17, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(10, "EA11", 0, - 18, UNIPHIER_PIN_DRV_4_8, + 18, UNIPHIER_PIN_DRV_1BIT, 18, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(11, "EA12", 0, - 19, UNIPHIER_PIN_DRV_4_8, + 19, UNIPHIER_PIN_DRV_1BIT, 19, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(12, "EA13", 0, - 20, UNIPHIER_PIN_DRV_4_8, + 20, UNIPHIER_PIN_DRV_1BIT, 20, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(13, "EA14", 0, - 21, UNIPHIER_PIN_DRV_4_8, + 21, UNIPHIER_PIN_DRV_1BIT, 21, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(14, "EA15", 0, - 22, UNIPHIER_PIN_DRV_4_8, + 22, UNIPHIER_PIN_DRV_1BIT, 22, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(15, "ECLK", UNIPHIER_PIN_IECTRL_NONE, - 23, UNIPHIER_PIN_DRV_4_8, + 23, UNIPHIER_PIN_DRV_1BIT, 23, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(16, "XERWE0", UNIPHIER_PIN_IECTRL_NONE, - 24, UNIPHIER_PIN_DRV_4_8, + 24, UNIPHIER_PIN_DRV_1BIT, 24, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(17, "XERWE1", UNIPHIER_PIN_IECTRL_NONE, - 25, UNIPHIER_PIN_DRV_4_8, + 25, UNIPHIER_PIN_DRV_1BIT, 25, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(18, "ES0", UNIPHIER_PIN_IECTRL_NONE, - 27, UNIPHIER_PIN_DRV_4_8, + 27, UNIPHIER_PIN_DRV_1BIT, 27, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(19, "ES1", UNIPHIER_PIN_IECTRL_NONE, - 28, UNIPHIER_PIN_DRV_4_8, + 28, UNIPHIER_PIN_DRV_1BIT, 28, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(20, "ES2", UNIPHIER_PIN_IECTRL_NONE, - 29, UNIPHIER_PIN_DRV_4_8, + 29, UNIPHIER_PIN_DRV_1BIT, 29, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(21, "XERST", UNIPHIER_PIN_IECTRL_NONE, - 38, UNIPHIER_PIN_DRV_4_8, + 38, UNIPHIER_PIN_DRV_1BIT, 38, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(22, "MMCCLK", UNIPHIER_PIN_IECTRL_NONE, - 0, UNIPHIER_PIN_DRV_8_12_16_20, + 0, UNIPHIER_PIN_DRV_2BIT, 146, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(23, "MMCCMD", UNIPHIER_PIN_IECTRL_NONE, - 4, UNIPHIER_PIN_DRV_8_12_16_20, + 1, UNIPHIER_PIN_DRV_2BIT, 147, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(24, "MMCDAT0", UNIPHIER_PIN_IECTRL_NONE, - 8, UNIPHIER_PIN_DRV_8_12_16_20, + 2, UNIPHIER_PIN_DRV_2BIT, 148, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(25, "MMCDAT1", UNIPHIER_PIN_IECTRL_NONE, - 12, UNIPHIER_PIN_DRV_8_12_16_20, + 3, UNIPHIER_PIN_DRV_2BIT, 149, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(26, "MMCDAT2", UNIPHIER_PIN_IECTRL_NONE, - 16, UNIPHIER_PIN_DRV_8_12_16_20, + 4, UNIPHIER_PIN_DRV_2BIT, 150, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(27, "MMCDAT3", UNIPHIER_PIN_IECTRL_NONE, - 20, UNIPHIER_PIN_DRV_8_12_16_20, + 5, UNIPHIER_PIN_DRV_2BIT, 151, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(28, "MMCDAT4", UNIPHIER_PIN_IECTRL_NONE, - 24, UNIPHIER_PIN_DRV_8_12_16_20, + 6, UNIPHIER_PIN_DRV_2BIT, 152, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(29, "MMCDAT5", UNIPHIER_PIN_IECTRL_NONE, - 28, UNIPHIER_PIN_DRV_8_12_16_20, + 7, UNIPHIER_PIN_DRV_2BIT, 153, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(30, "MMCDAT6", UNIPHIER_PIN_IECTRL_NONE, - 32, UNIPHIER_PIN_DRV_8_12_16_20, + 8, UNIPHIER_PIN_DRV_2BIT, 154, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(31, "MMCDAT7", UNIPHIER_PIN_IECTRL_NONE, - 36, UNIPHIER_PIN_DRV_8_12_16_20, + 9, UNIPHIER_PIN_DRV_2BIT, 155, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(32, "RMII_RXD0", 6, - 39, UNIPHIER_PIN_DRV_4_8, + 39, UNIPHIER_PIN_DRV_1BIT, 39, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(33, "RMII_RXD1", 6, - 40, UNIPHIER_PIN_DRV_4_8, + 40, UNIPHIER_PIN_DRV_1BIT, 40, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(34, "RMII_CRS_DV", 6, - 41, UNIPHIER_PIN_DRV_4_8, + 41, UNIPHIER_PIN_DRV_1BIT, 41, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(35, "RMII_RXER", 6, - 42, UNIPHIER_PIN_DRV_4_8, + 42, UNIPHIER_PIN_DRV_1BIT, 42, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(36, "RMII_REFCLK", 6, - 43, UNIPHIER_PIN_DRV_4_8, + 43, UNIPHIER_PIN_DRV_1BIT, 43, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(37, "RMII_TXD0", 6, - 44, UNIPHIER_PIN_DRV_4_8, + 44, UNIPHIER_PIN_DRV_1BIT, 44, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(38, "RMII_TXD1", 6, - 45, UNIPHIER_PIN_DRV_4_8, + 45, UNIPHIER_PIN_DRV_1BIT, 45, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(39, "RMII_TXEN", 6, - 46, UNIPHIER_PIN_DRV_4_8, + 46, UNIPHIER_PIN_DRV_1BIT, 46, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(40, "MDC", 6, - 47, UNIPHIER_PIN_DRV_4_8, + 47, UNIPHIER_PIN_DRV_1BIT, 47, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(41, "MDIO", 6, - 48, UNIPHIER_PIN_DRV_4_8, + 48, UNIPHIER_PIN_DRV_1BIT, 48, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(42, "MDIO_INTL", 6, - 49, UNIPHIER_PIN_DRV_4_8, + 49, UNIPHIER_PIN_DRV_1BIT, 49, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(43, "PHYRSTL", 6, - 50, UNIPHIER_PIN_DRV_4_8, + 50, UNIPHIER_PIN_DRV_1BIT, 50, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(44, "SDCLK", UNIPHIER_PIN_IECTRL_NONE, - 40, UNIPHIER_PIN_DRV_8_12_16_20, + 10, UNIPHIER_PIN_DRV_2BIT, 156, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(45, "SDCMD", UNIPHIER_PIN_IECTRL_NONE, - 44, UNIPHIER_PIN_DRV_8_12_16_20, + 11, UNIPHIER_PIN_DRV_2BIT, 157, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(46, "SDDAT0", UNIPHIER_PIN_IECTRL_NONE, - 48, UNIPHIER_PIN_DRV_8_12_16_20, + 12, UNIPHIER_PIN_DRV_2BIT, 158, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(47, "SDDAT1", UNIPHIER_PIN_IECTRL_NONE, - 52, UNIPHIER_PIN_DRV_8_12_16_20, + 13, UNIPHIER_PIN_DRV_2BIT, 159, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(48, "SDDAT2", UNIPHIER_PIN_IECTRL_NONE, - 56, UNIPHIER_PIN_DRV_8_12_16_20, + 14, UNIPHIER_PIN_DRV_2BIT, 160, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(49, "SDDAT3", UNIPHIER_PIN_IECTRL_NONE, - 60, UNIPHIER_PIN_DRV_8_12_16_20, + 15, UNIPHIER_PIN_DRV_2BIT, 161, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(50, "SDCD", UNIPHIER_PIN_IECTRL_NONE, - 51, UNIPHIER_PIN_DRV_4_8, + 51, UNIPHIER_PIN_DRV_1BIT, 51, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(51, "SDWP", UNIPHIER_PIN_IECTRL_NONE, - 52, UNIPHIER_PIN_DRV_4_8, + 52, UNIPHIER_PIN_DRV_1BIT, 52, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(52, "SDVOLC", UNIPHIER_PIN_IECTRL_NONE, - 53, UNIPHIER_PIN_DRV_4_8, + 53, UNIPHIER_PIN_DRV_1BIT, 53, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(53, "USB0VBUS", 0, - 54, UNIPHIER_PIN_DRV_4_8, + 54, UNIPHIER_PIN_DRV_1BIT, 54, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(54, "USB0OD", 0, - 55, UNIPHIER_PIN_DRV_4_8, + 55, UNIPHIER_PIN_DRV_1BIT, 55, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(55, "USB1VBUS", 0, - 56, UNIPHIER_PIN_DRV_4_8, + 56, UNIPHIER_PIN_DRV_1BIT, 56, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(56, "USB1OD", 0, - 57, UNIPHIER_PIN_DRV_4_8, + 57, UNIPHIER_PIN_DRV_1BIT, 57, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(57, "PCRESET", 0, - 58, UNIPHIER_PIN_DRV_4_8, + 58, UNIPHIER_PIN_DRV_1BIT, 58, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(58, "PCREG", 0, - 59, UNIPHIER_PIN_DRV_4_8, + 59, UNIPHIER_PIN_DRV_1BIT, 59, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(59, "PCCE2", 0, - 60, UNIPHIER_PIN_DRV_4_8, + 60, UNIPHIER_PIN_DRV_1BIT, 60, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(60, "PCVS1", 0, - 61, UNIPHIER_PIN_DRV_4_8, + 61, UNIPHIER_PIN_DRV_1BIT, 61, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(61, "PCCD2", 0, - 62, UNIPHIER_PIN_DRV_4_8, + 62, UNIPHIER_PIN_DRV_1BIT, 62, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(62, "PCCD1", 0, - 63, UNIPHIER_PIN_DRV_4_8, + 63, UNIPHIER_PIN_DRV_1BIT, 63, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(63, "PCREADY", 0, - 64, UNIPHIER_PIN_DRV_4_8, + 64, UNIPHIER_PIN_DRV_1BIT, 64, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(64, "PCDOE", 0, - 65, UNIPHIER_PIN_DRV_4_8, + 65, UNIPHIER_PIN_DRV_1BIT, 65, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(65, "PCCE1", 0, - 66, UNIPHIER_PIN_DRV_4_8, + 66, UNIPHIER_PIN_DRV_1BIT, 66, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(66, "PCWE", 0, - 67, UNIPHIER_PIN_DRV_4_8, + 67, UNIPHIER_PIN_DRV_1BIT, 67, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(67, "PCOE", 0, - 68, UNIPHIER_PIN_DRV_4_8, + 68, UNIPHIER_PIN_DRV_1BIT, 68, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(68, "PCWAIT", 0, - 69, UNIPHIER_PIN_DRV_4_8, + 69, UNIPHIER_PIN_DRV_1BIT, 69, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(69, "PCIOWR", 0, - 70, UNIPHIER_PIN_DRV_4_8, + 70, UNIPHIER_PIN_DRV_1BIT, 70, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(70, "PCIORD", 0, - 71, UNIPHIER_PIN_DRV_4_8, + 71, UNIPHIER_PIN_DRV_1BIT, 71, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(71, "HS0DIN0", 0, - 72, UNIPHIER_PIN_DRV_4_8, + 72, UNIPHIER_PIN_DRV_1BIT, 72, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(72, "HS0DIN1", 0, - 73, UNIPHIER_PIN_DRV_4_8, + 73, UNIPHIER_PIN_DRV_1BIT, 73, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(73, "HS0DIN2", 0, - 74, UNIPHIER_PIN_DRV_4_8, + 74, UNIPHIER_PIN_DRV_1BIT, 74, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(74, "HS0DIN3", 0, - 75, UNIPHIER_PIN_DRV_4_8, + 75, UNIPHIER_PIN_DRV_1BIT, 75, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(75, "HS0DIN4", 0, - 76, UNIPHIER_PIN_DRV_4_8, + 76, UNIPHIER_PIN_DRV_1BIT, 76, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(76, "HS0DIN5", 0, - 77, UNIPHIER_PIN_DRV_4_8, + 77, UNIPHIER_PIN_DRV_1BIT, 77, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(77, "HS0DIN6", 0, - 78, UNIPHIER_PIN_DRV_4_8, + 78, UNIPHIER_PIN_DRV_1BIT, 78, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(78, "HS0DIN7", 0, - 79, UNIPHIER_PIN_DRV_4_8, + 79, UNIPHIER_PIN_DRV_1BIT, 79, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(79, "HS0BCLKIN", 0, - 80, UNIPHIER_PIN_DRV_4_8, + 80, UNIPHIER_PIN_DRV_1BIT, 80, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(80, "HS0VALIN", 0, - 81, UNIPHIER_PIN_DRV_4_8, + 81, UNIPHIER_PIN_DRV_1BIT, 81, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(81, "HS0SYNCIN", 0, - 82, UNIPHIER_PIN_DRV_4_8, + 82, UNIPHIER_PIN_DRV_1BIT, 82, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(82, "HSDOUT0", 0, - 83, UNIPHIER_PIN_DRV_4_8, + 83, UNIPHIER_PIN_DRV_1BIT, 83, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(83, "HSDOUT1", 0, - 84, UNIPHIER_PIN_DRV_4_8, + 84, UNIPHIER_PIN_DRV_1BIT, 84, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(84, "HSDOUT2", 0, - 85, UNIPHIER_PIN_DRV_4_8, + 85, UNIPHIER_PIN_DRV_1BIT, 85, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(85, "HSDOUT3", 0, - 86, UNIPHIER_PIN_DRV_4_8, + 86, UNIPHIER_PIN_DRV_1BIT, 86, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(86, "HSDOUT4", 0, - 87, UNIPHIER_PIN_DRV_4_8, + 87, UNIPHIER_PIN_DRV_1BIT, 87, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(87, "HSDOUT5", 0, - 88, UNIPHIER_PIN_DRV_4_8, + 88, UNIPHIER_PIN_DRV_1BIT, 88, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(88, "HSDOUT6", 0, - 89, UNIPHIER_PIN_DRV_4_8, + 89, UNIPHIER_PIN_DRV_1BIT, 89, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(89, "HSDOUT7", 0, - 90, UNIPHIER_PIN_DRV_4_8, + 90, UNIPHIER_PIN_DRV_1BIT, 90, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(90, "HSBCLKOUT", 0, - 91, UNIPHIER_PIN_DRV_4_8, + 91, UNIPHIER_PIN_DRV_1BIT, 91, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(91, "HSVALOUT", 0, - 92, UNIPHIER_PIN_DRV_4_8, + 92, UNIPHIER_PIN_DRV_1BIT, 92, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(92, "HSSYNCOUT", 0, - 93, UNIPHIER_PIN_DRV_4_8, + 93, UNIPHIER_PIN_DRV_1BIT, 93, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(93, "AGCI", 3, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 162, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(94, "AGCR", 4, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 163, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(95, "AGCBS", 5, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 164, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(96, "IECOUT", 0, - 94, UNIPHIER_PIN_DRV_4_8, + 94, UNIPHIER_PIN_DRV_1BIT, 94, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(97, "ASMCK", 0, - 95, UNIPHIER_PIN_DRV_4_8, + 95, UNIPHIER_PIN_DRV_1BIT, 95, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(98, "ABCKO", UNIPHIER_PIN_IECTRL_NONE, - 96, UNIPHIER_PIN_DRV_4_8, + 96, UNIPHIER_PIN_DRV_1BIT, 96, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(99, "ALRCKO", UNIPHIER_PIN_IECTRL_NONE, - 97, UNIPHIER_PIN_DRV_4_8, + 97, UNIPHIER_PIN_DRV_1BIT, 97, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(100, "ASDOUT0", UNIPHIER_PIN_IECTRL_NONE, - 98, UNIPHIER_PIN_DRV_4_8, + 98, UNIPHIER_PIN_DRV_1BIT, 98, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(101, "ARCOUT", 0, - 99, UNIPHIER_PIN_DRV_4_8, + 99, UNIPHIER_PIN_DRV_1BIT, 99, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(102, "SDA0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(103, "SCL0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(104, "SDA1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(105, "SCL1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(106, "DMDSDA0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(107, "DMDSCL0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(108, "DMDSDA1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(109, "DMDSCL1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(110, "SBO0", UNIPHIER_PIN_IECTRL_NONE, - 100, UNIPHIER_PIN_DRV_4_8, + 100, UNIPHIER_PIN_DRV_1BIT, 100, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(111, "SBI0", UNIPHIER_PIN_IECTRL_NONE, - 101, UNIPHIER_PIN_DRV_4_8, + 101, UNIPHIER_PIN_DRV_1BIT, 101, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(112, "HIN", 1, - -1, UNIPHIER_PIN_DRV_FIXED_5, + -1, UNIPHIER_PIN_DRV_FIXED5, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(113, "VIN", 2, - -1, UNIPHIER_PIN_DRV_FIXED_5, + -1, UNIPHIER_PIN_DRV_FIXED5, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(114, "TCON0", UNIPHIER_PIN_IECTRL_NONE, - 102, UNIPHIER_PIN_DRV_4_8, + 102, UNIPHIER_PIN_DRV_1BIT, 102, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(115, "TCON1", UNIPHIER_PIN_IECTRL_NONE, - 103, UNIPHIER_PIN_DRV_4_8, + 103, UNIPHIER_PIN_DRV_1BIT, 103, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(116, "TCON2", UNIPHIER_PIN_IECTRL_NONE, - 104, UNIPHIER_PIN_DRV_4_8, + 104, UNIPHIER_PIN_DRV_1BIT, 104, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(117, "TCON3", UNIPHIER_PIN_IECTRL_NONE, - 105, UNIPHIER_PIN_DRV_4_8, + 105, UNIPHIER_PIN_DRV_1BIT, 105, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(118, "TCON4", UNIPHIER_PIN_IECTRL_NONE, - 106, UNIPHIER_PIN_DRV_4_8, + 106, UNIPHIER_PIN_DRV_1BIT, 106, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(119, "TCON5", UNIPHIER_PIN_IECTRL_NONE, - 107, UNIPHIER_PIN_DRV_4_8, + 107, UNIPHIER_PIN_DRV_1BIT, 107, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(120, "TCON6", 0, - 108, UNIPHIER_PIN_DRV_4_8, + 108, UNIPHIER_PIN_DRV_1BIT, 108, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(121, "TCON7", 0, - 109, UNIPHIER_PIN_DRV_4_8, + 109, UNIPHIER_PIN_DRV_1BIT, 109, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(122, "PWMA", 0, - 110, UNIPHIER_PIN_DRV_4_8, + 110, UNIPHIER_PIN_DRV_1BIT, 110, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(123, "XIRQ1", 0, - 111, UNIPHIER_PIN_DRV_4_8, + 111, UNIPHIER_PIN_DRV_1BIT, 111, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(124, "XIRQ2", 0, - 112, UNIPHIER_PIN_DRV_4_8, + 112, UNIPHIER_PIN_DRV_1BIT, 112, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(125, "XIRQ3", 0, - 113, UNIPHIER_PIN_DRV_4_8, + 113, UNIPHIER_PIN_DRV_1BIT, 113, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(126, "XIRQ4", 0, - 114, UNIPHIER_PIN_DRV_4_8, + 114, UNIPHIER_PIN_DRV_1BIT, 114, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(127, "XIRQ5", 0, - 115, UNIPHIER_PIN_DRV_4_8, + 115, UNIPHIER_PIN_DRV_1BIT, 115, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(128, "XIRQ6", 0, - 116, UNIPHIER_PIN_DRV_4_8, + 116, UNIPHIER_PIN_DRV_1BIT, 116, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(129, "XIRQ7", 0, - 117, UNIPHIER_PIN_DRV_4_8, + 117, UNIPHIER_PIN_DRV_1BIT, 117, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(130, "XIRQ8", 0, - 118, UNIPHIER_PIN_DRV_4_8, + 118, UNIPHIER_PIN_DRV_1BIT, 118, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(131, "XIRQ9", 0, - 119, UNIPHIER_PIN_DRV_4_8, + 119, UNIPHIER_PIN_DRV_1BIT, 119, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(132, "XIRQ10", 0, - 120, UNIPHIER_PIN_DRV_4_8, + 120, UNIPHIER_PIN_DRV_1BIT, 120, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(133, "XIRQ11", 0, - 121, UNIPHIER_PIN_DRV_4_8, + 121, UNIPHIER_PIN_DRV_1BIT, 121, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(134, "XIRQ14", 0, - 122, UNIPHIER_PIN_DRV_4_8, + 122, UNIPHIER_PIN_DRV_1BIT, 122, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(135, "PORT00", 0, - 123, UNIPHIER_PIN_DRV_4_8, + 123, UNIPHIER_PIN_DRV_1BIT, 123, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(136, "PORT01", 0, - 124, UNIPHIER_PIN_DRV_4_8, + 124, UNIPHIER_PIN_DRV_1BIT, 124, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(137, "PORT02", 0, - 125, UNIPHIER_PIN_DRV_4_8, + 125, UNIPHIER_PIN_DRV_1BIT, 125, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(138, "PORT03", 0, - 126, UNIPHIER_PIN_DRV_4_8, + 126, UNIPHIER_PIN_DRV_1BIT, 126, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(139, "PORT04", 0, - 127, UNIPHIER_PIN_DRV_4_8, + 127, UNIPHIER_PIN_DRV_1BIT, 127, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(140, "PORT05", 0, - 128, UNIPHIER_PIN_DRV_4_8, + 128, UNIPHIER_PIN_DRV_1BIT, 128, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(141, "PORT06", 0, - 129, UNIPHIER_PIN_DRV_4_8, + 129, UNIPHIER_PIN_DRV_1BIT, 129, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(142, "PORT07", 0, - 130, UNIPHIER_PIN_DRV_4_8, + 130, UNIPHIER_PIN_DRV_1BIT, 130, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(143, "PORT10", 0, - 131, UNIPHIER_PIN_DRV_4_8, + 131, UNIPHIER_PIN_DRV_1BIT, 131, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(144, "PORT11", 0, - 132, UNIPHIER_PIN_DRV_4_8, + 132, UNIPHIER_PIN_DRV_1BIT, 132, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(145, "PORT12", 0, - 133, UNIPHIER_PIN_DRV_4_8, + 133, UNIPHIER_PIN_DRV_1BIT, 133, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(146, "PORT13", 0, - 134, UNIPHIER_PIN_DRV_4_8, + 134, UNIPHIER_PIN_DRV_1BIT, 134, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(147, "PORT14", 0, - 135, UNIPHIER_PIN_DRV_4_8, + 135, UNIPHIER_PIN_DRV_1BIT, 135, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(148, "PORT15", 0, - 136, UNIPHIER_PIN_DRV_4_8, + 136, UNIPHIER_PIN_DRV_1BIT, 136, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(149, "PORT16", 0, - 137, UNIPHIER_PIN_DRV_4_8, + 137, UNIPHIER_PIN_DRV_1BIT, 137, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(150, "PORT17", UNIPHIER_PIN_IECTRL_NONE, - 138, UNIPHIER_PIN_DRV_4_8, + 138, UNIPHIER_PIN_DRV_1BIT, 138, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(151, "PORT20", 0, - 139, UNIPHIER_PIN_DRV_4_8, + 139, UNIPHIER_PIN_DRV_1BIT, 139, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(152, "PORT21", 0, - 140, UNIPHIER_PIN_DRV_4_8, + 140, UNIPHIER_PIN_DRV_1BIT, 140, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(153, "PORT22", 0, - 141, UNIPHIER_PIN_DRV_4_8, + 141, UNIPHIER_PIN_DRV_1BIT, 141, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(154, "PORT23", 0, - 142, UNIPHIER_PIN_DRV_4_8, + 142, UNIPHIER_PIN_DRV_1BIT, 142, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(155, "PORT24", UNIPHIER_PIN_IECTRL_NONE, - 143, UNIPHIER_PIN_DRV_4_8, + 143, UNIPHIER_PIN_DRV_1BIT, 143, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(156, "PORT25", 0, - 144, UNIPHIER_PIN_DRV_4_8, + 144, UNIPHIER_PIN_DRV_1BIT, 144, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(157, "PORT26", 0, - 145, UNIPHIER_PIN_DRV_4_8, + 145, UNIPHIER_PIN_DRV_1BIT, 145, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(158, "XNFRE", UNIPHIER_PIN_IECTRL_NONE, - 31, UNIPHIER_PIN_DRV_4_8, + 31, UNIPHIER_PIN_DRV_1BIT, 31, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(159, "XNFWE", UNIPHIER_PIN_IECTRL_NONE, - 32, UNIPHIER_PIN_DRV_4_8, + 32, UNIPHIER_PIN_DRV_1BIT, 32, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(160, "NFALE", UNIPHIER_PIN_IECTRL_NONE, - 33, UNIPHIER_PIN_DRV_4_8, + 33, UNIPHIER_PIN_DRV_1BIT, 33, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(161, "NFCLE", UNIPHIER_PIN_IECTRL_NONE, - 34, UNIPHIER_PIN_DRV_4_8, + 34, UNIPHIER_PIN_DRV_1BIT, 34, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(162, "XNFWP", UNIPHIER_PIN_IECTRL_NONE, - 35, UNIPHIER_PIN_DRV_4_8, + 35, UNIPHIER_PIN_DRV_1BIT, 35, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(163, "XNFCE0", UNIPHIER_PIN_IECTRL_NONE, - 36, UNIPHIER_PIN_DRV_4_8, + 36, UNIPHIER_PIN_DRV_1BIT, 36, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(164, "NANDRYBY0", UNIPHIER_PIN_IECTRL_NONE, - 37, UNIPHIER_PIN_DRV_4_8, + 37, UNIPHIER_PIN_DRV_1BIT, 37, UNIPHIER_PIN_PULL_UP), + /* dedicated pins */ + UNIPHIER_PINCTRL_PIN(165, "ED0", -1, + 0, UNIPHIER_PIN_DRV_1BIT, + 0, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(166, "ED1", -1, + 1, UNIPHIER_PIN_DRV_1BIT, + 1, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(167, "ED2", -1, + 2, UNIPHIER_PIN_DRV_1BIT, + 2, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(168, "ED3", -1, + 3, UNIPHIER_PIN_DRV_1BIT, + 3, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(169, "ED4", -1, + 4, UNIPHIER_PIN_DRV_1BIT, + 4, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(170, "ED5", -1, + 5, UNIPHIER_PIN_DRV_1BIT, + 5, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(171, "ED6", -1, + 6, UNIPHIER_PIN_DRV_1BIT, + 6, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(172, "ED7", -1, + 7, UNIPHIER_PIN_DRV_1BIT, + 7, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(173, "ERXW", -1, + 26, UNIPHIER_PIN_DRV_1BIT, + 26, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(174, "XECS1", -1, + 30, UNIPHIER_PIN_DRV_1BIT, + 30, UNIPHIER_PIN_PULL_UP), }; static const unsigned emmc_pins[] = {21, 22, 23, 24, 25, 26, 27}; -static const unsigned emmc_muxvals[] = {0, 1, 1, 1, 1, 1, 1}; +static const int emmc_muxvals[] = {0, 1, 1, 1, 1, 1, 1}; static const unsigned emmc_dat8_pins[] = {28, 29, 30, 31}; -static const unsigned emmc_dat8_muxvals[] = {1, 1, 1, 1}; +static const int emmc_dat8_muxvals[] = {1, 1, 1, 1}; static const unsigned i2c0_pins[] = {102, 103}; -static const unsigned i2c0_muxvals[] = {0, 0}; +static const int i2c0_muxvals[] = {0, 0}; static const unsigned i2c1_pins[] = {104, 105}; -static const unsigned i2c1_muxvals[] = {0, 0}; +static const int i2c1_muxvals[] = {0, 0}; static const unsigned i2c2_pins[] = {108, 109}; -static const unsigned i2c2_muxvals[] = {2, 2}; +static const int i2c2_muxvals[] = {2, 2}; static const unsigned i2c3_pins[] = {108, 109}; -static const unsigned i2c3_muxvals[] = {3, 3}; +static const int i2c3_muxvals[] = {3, 3}; static const unsigned nand_pins[] = {24, 25, 26, 27, 28, 29, 30, 31, 158, 159, 160, 161, 162, 163, 164}; -static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0}; +static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned nand_cs1_pins[] = {22, 23}; -static const unsigned nand_cs1_muxvals[] = {0, 0}; +static const int nand_cs1_muxvals[] = {0, 0}; static const unsigned sd_pins[] = {44, 45, 46, 47, 48, 49, 50, 51, 52}; -static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned system_bus_pins[] = {16, 17, 18, 19, 20, 165, 166, 167, + 168, 169, 170, 171, 172, 173}; +static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, -1, -1, -1, -1, -1, -1, + -1, -1, -1}; +static const unsigned system_bus_cs0_pins[] = {155}; +static const int system_bus_cs0_muxvals[] = {1}; +static const unsigned system_bus_cs1_pins[] = {174}; +static const int system_bus_cs1_muxvals[] = {-1}; +static const unsigned system_bus_cs2_pins[] = {64}; +static const int system_bus_cs2_muxvals[] = {1}; +static const unsigned system_bus_cs3_pins[] = {156}; +static const int system_bus_cs3_muxvals[] = {1}; static const unsigned uart0_pins[] = {85, 88}; -static const unsigned uart0_muxvals[] = {1, 1}; +static const int uart0_muxvals[] = {1, 1}; static const unsigned uart1_pins[] = {155, 156}; -static const unsigned uart1_muxvals[] = {13, 13}; +static const int uart1_muxvals[] = {13, 13}; static const unsigned uart1b_pins[] = {69, 70}; -static const unsigned uart1b_muxvals[] = {23, 23}; +static const int uart1b_muxvals[] = {23, 23}; static const unsigned uart2_pins[] = {128, 129}; -static const unsigned uart2_muxvals[] = {13, 13}; +static const int uart2_muxvals[] = {13, 13}; static const unsigned uart3_pins[] = {110, 111}; -static const unsigned uart3_muxvals[] = {1, 1}; +static const int uart3_muxvals[] = {1, 1}; static const unsigned usb0_pins[] = {53, 54}; -static const unsigned usb0_muxvals[] = {0, 0}; +static const int usb0_muxvals[] = {0, 0}; static const unsigned usb1_pins[] = {55, 56}; -static const unsigned usb1_muxvals[] = {0, 0}; +static const int usb1_muxvals[] = {0, 0}; static const unsigned usb2_pins[] = {155, 156}; -static const unsigned usb2_muxvals[] = {4, 4}; +static const int usb2_muxvals[] = {4, 4}; static const unsigned usb2b_pins[] = {67, 68}; -static const unsigned usb2b_muxvals[] = {23, 23}; +static const int usb2b_muxvals[] = {23, 23}; static const unsigned port_range0_pins[] = { 135, 136, 137, 138, 139, 140, 141, 142, /* PORT0x */ 143, 144, 145, 146, 147, 148, 149, 150, /* PORT1x */ @@ -574,7 +614,7 @@ static const unsigned port_range0_pins[] = { 98, 99, 100, 6, 101, 114, 115, 116, /* PORT13x */ 103, 108, 21, 22, 23, 117, 118, 119, /* PORT14x */ }; -static const unsigned port_range0_muxvals[] = { +static const int port_range0_muxvals[] = { 0, 0, 0, 0, 0, 0, 0, 0, /* PORT0x */ 0, 0, 0, 0, 0, 0, 0, 0, /* PORT1x */ 0, 0, 0, 0, 0, 0, 0, 15, /* PORT2x */ @@ -594,25 +634,25 @@ static const unsigned port_range0_muxvals[] = { static const unsigned port_range1_pins[] = { 7, /* PORT166 */ }; -static const unsigned port_range1_muxvals[] = { +static const int port_range1_muxvals[] = { 15, /* PORT166 */ }; static const unsigned xirq_range0_pins[] = { 151, 123, 124, 125, 126, 127, 128, 129, /* XIRQ0-7 */ 130, 131, 132, 133, 62, /* XIRQ8-12 */ }; -static const unsigned xirq_range0_muxvals[] = { +static const int xirq_range0_muxvals[] = { 14, 0, 0, 0, 0, 0, 0, 0, /* XIRQ0-7 */ 0, 0, 0, 0, 14, /* XIRQ8-12 */ }; static const unsigned xirq_range1_pins[] = { 134, 63, /* XIRQ14-15 */ }; -static const unsigned xirq_range1_muxvals[] = { +static const int xirq_range1_muxvals[] = { 0, 14, /* XIRQ14-15 */ }; -static const struct uniphier_pinctrl_group ph1_ld4_groups[] = { +static const struct uniphier_pinctrl_group uniphier_ld4_groups[] = { UNIPHIER_PINCTRL_GROUP(emmc), UNIPHIER_PINCTRL_GROUP(emmc_dat8), UNIPHIER_PINCTRL_GROUP(i2c0), @@ -622,6 +662,11 @@ static const struct uniphier_pinctrl_group ph1_ld4_groups[] = { UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(system_bus), + UNIPHIER_PINCTRL_GROUP(system_bus_cs0), + UNIPHIER_PINCTRL_GROUP(system_bus_cs1), + UNIPHIER_PINCTRL_GROUP(system_bus_cs2), + UNIPHIER_PINCTRL_GROUP(system_bus_cs3), UNIPHIER_PINCTRL_GROUP(uart0), UNIPHIER_PINCTRL_GROUP(uart1), UNIPHIER_PINCTRL_GROUP(uart1b), @@ -780,6 +825,11 @@ static const char * const i2c2_groups[] = {"i2c2"}; static const char * const i2c3_groups[] = {"i2c3"}; static const char * const nand_groups[] = {"nand", "nand_cs1"}; static const char * const sd_groups[] = {"sd"}; +static const char * const system_bus_groups[] = {"system_bus", + "system_bus_cs0", + "system_bus_cs1", + "system_bus_cs2", + "system_bus_cs3"}; static const char * const uart0_groups[] = {"uart0"}; static const char * const uart1_groups[] = {"uart1", "uart1b"}; static const char * const uart2_groups[] = {"uart2"}; @@ -828,7 +878,7 @@ static const char * const xirq_groups[] = { "xirq12", /* none*/ "xirq14", "xirq15", }; -static const struct uniphier_pinmux_function ph1_ld4_functions[] = { +static const struct uniphier_pinmux_function uniphier_ld4_functions[] = { UNIPHIER_PINMUX_FUNCTION(emmc), UNIPHIER_PINMUX_FUNCTION(i2c0), UNIPHIER_PINMUX_FUNCTION(i2c1), @@ -836,6 +886,7 @@ static const struct uniphier_pinmux_function ph1_ld4_functions[] = { UNIPHIER_PINMUX_FUNCTION(i2c3), UNIPHIER_PINMUX_FUNCTION(nand), UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION(system_bus), UNIPHIER_PINMUX_FUNCTION(uart0), UNIPHIER_PINMUX_FUNCTION(uart1), UNIPHIER_PINMUX_FUNCTION(uart2), @@ -847,43 +898,36 @@ static const struct uniphier_pinmux_function ph1_ld4_functions[] = { UNIPHIER_PINMUX_FUNCTION(xirq), }; -static struct uniphier_pinctrl_socdata ph1_ld4_pindata = { - .groups = ph1_ld4_groups, - .groups_count = ARRAY_SIZE(ph1_ld4_groups), - .functions = ph1_ld4_functions, - .functions_count = ARRAY_SIZE(ph1_ld4_functions), - .mux_bits = 8, - .reg_stride = 4, - .load_pinctrl = false, -}; - -static struct pinctrl_desc ph1_ld4_pinctrl_desc = { - .name = DRIVER_NAME, - .pins = ph1_ld4_pins, - .npins = ARRAY_SIZE(ph1_ld4_pins), - .owner = THIS_MODULE, +static struct uniphier_pinctrl_socdata uniphier_ld4_pindata = { + .pins = uniphier_ld4_pins, + .npins = ARRAY_SIZE(uniphier_ld4_pins), + .groups = uniphier_ld4_groups, + .groups_count = ARRAY_SIZE(uniphier_ld4_groups), + .functions = uniphier_ld4_functions, + .functions_count = ARRAY_SIZE(uniphier_ld4_functions), + .caps = 0, }; -static int ph1_ld4_pinctrl_probe(struct platform_device *pdev) +static int uniphier_ld4_pinctrl_probe(struct platform_device *pdev) { - return uniphier_pinctrl_probe(pdev, &ph1_ld4_pinctrl_desc, - &ph1_ld4_pindata); + return uniphier_pinctrl_probe(pdev, &uniphier_ld4_pindata); } -static const struct of_device_id ph1_ld4_pinctrl_match[] = { +static const struct of_device_id uniphier_ld4_pinctrl_match[] = { + { .compatible = "socionext,uniphier-ld4-pinctrl" }, { .compatible = "socionext,ph1-ld4-pinctrl" }, { /* sentinel */ } }; -MODULE_DEVICE_TABLE(of, ph1_ld4_pinctrl_match); +MODULE_DEVICE_TABLE(of, uniphier_ld4_pinctrl_match); -static struct platform_driver ph1_ld4_pinctrl_driver = { - .probe = ph1_ld4_pinctrl_probe, +static struct platform_driver uniphier_ld4_pinctrl_driver = { + .probe = uniphier_ld4_pinctrl_probe, .driver = { - .name = DRIVER_NAME, - .of_match_table = ph1_ld4_pinctrl_match, + .name = "uniphier-ld4-pinctrl", + .of_match_table = uniphier_ld4_pinctrl_match, }, }; -module_platform_driver(ph1_ld4_pinctrl_driver); +module_platform_driver(uniphier_ld4_pinctrl_driver); MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>"); MODULE_DESCRIPTION("UniPhier PH1-LD4 pinctrl driver"); diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c index 150d33928df2..6c0d66c23632 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c @@ -19,713 +19,711 @@ #include "pinctrl-uniphier.h" -#define DRIVER_NAME "ph1-ld6b-pinctrl" - -static const struct pinctrl_pin_desc ph1_ld6b_pins[] = { +static const struct pinctrl_pin_desc uniphier_ld6b_pins[] = { UNIPHIER_PINCTRL_PIN(0, "ED0", UNIPHIER_PIN_IECTRL_NONE, - 0, UNIPHIER_PIN_DRV_4_8, + 0, UNIPHIER_PIN_DRV_1BIT, 0, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(1, "ED1", UNIPHIER_PIN_IECTRL_NONE, - 1, UNIPHIER_PIN_DRV_4_8, + 1, UNIPHIER_PIN_DRV_1BIT, 1, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(2, "ED2", UNIPHIER_PIN_IECTRL_NONE, - 2, UNIPHIER_PIN_DRV_4_8, + 2, UNIPHIER_PIN_DRV_1BIT, 2, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(3, "ED3", UNIPHIER_PIN_IECTRL_NONE, - 3, UNIPHIER_PIN_DRV_4_8, + 3, UNIPHIER_PIN_DRV_1BIT, 3, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(4, "ED4", UNIPHIER_PIN_IECTRL_NONE, - 4, UNIPHIER_PIN_DRV_4_8, + 4, UNIPHIER_PIN_DRV_1BIT, 4, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(5, "ED5", UNIPHIER_PIN_IECTRL_NONE, - 5, UNIPHIER_PIN_DRV_4_8, + 5, UNIPHIER_PIN_DRV_1BIT, 5, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(6, "ED6", UNIPHIER_PIN_IECTRL_NONE, - 6, UNIPHIER_PIN_DRV_4_8, + 6, UNIPHIER_PIN_DRV_1BIT, 6, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(7, "ED7", UNIPHIER_PIN_IECTRL_NONE, - 7, UNIPHIER_PIN_DRV_4_8, + 7, UNIPHIER_PIN_DRV_1BIT, 7, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(8, "XERWE0", UNIPHIER_PIN_IECTRL_NONE, - 8, UNIPHIER_PIN_DRV_4_8, + 8, UNIPHIER_PIN_DRV_1BIT, 8, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(9, "XERWE1", UNIPHIER_PIN_IECTRL_NONE, - 9, UNIPHIER_PIN_DRV_4_8, + 9, UNIPHIER_PIN_DRV_1BIT, 9, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(10, "ERXW", UNIPHIER_PIN_IECTRL_NONE, - 10, UNIPHIER_PIN_DRV_4_8, + 10, UNIPHIER_PIN_DRV_1BIT, 10, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(11, "ES0", UNIPHIER_PIN_IECTRL_NONE, - 11, UNIPHIER_PIN_DRV_4_8, + 11, UNIPHIER_PIN_DRV_1BIT, 11, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(12, "ES1", UNIPHIER_PIN_IECTRL_NONE, - 12, UNIPHIER_PIN_DRV_4_8, + 12, UNIPHIER_PIN_DRV_1BIT, 12, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(13, "ES2", UNIPHIER_PIN_IECTRL_NONE, - 13, UNIPHIER_PIN_DRV_4_8, + 13, UNIPHIER_PIN_DRV_1BIT, 13, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(14, "XECS1", UNIPHIER_PIN_IECTRL_NONE, - 14, UNIPHIER_PIN_DRV_4_8, + 14, UNIPHIER_PIN_DRV_1BIT, 14, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(15, "PCA00", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 15, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(16, "PCA01", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 16, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(17, "PCA02", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 17, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(18, "PCA03", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 18, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(19, "PCA04", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 19, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(20, "PCA05", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 20, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(21, "PCA06", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 21, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(22, "PCA07", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 22, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(23, "PCA08", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 23, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(24, "PCA09", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 24, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(25, "PCA10", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 25, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(26, "PCA11", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 26, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(27, "PCA12", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 27, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(28, "PCA13", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 28, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(29, "PCA14", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 29, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(30, "XNFRE", UNIPHIER_PIN_IECTRL_NONE, - 30, UNIPHIER_PIN_DRV_4_8, + 30, UNIPHIER_PIN_DRV_1BIT, 30, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(31, "XNFWE", UNIPHIER_PIN_IECTRL_NONE, - 31, UNIPHIER_PIN_DRV_4_8, + 31, UNIPHIER_PIN_DRV_1BIT, 31, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(32, "NFALE", UNIPHIER_PIN_IECTRL_NONE, - 32, UNIPHIER_PIN_DRV_4_8, + 32, UNIPHIER_PIN_DRV_1BIT, 32, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(33, "NFCLE", UNIPHIER_PIN_IECTRL_NONE, - 33, UNIPHIER_PIN_DRV_4_8, + 33, UNIPHIER_PIN_DRV_1BIT, 33, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(34, "XNFWP", UNIPHIER_PIN_IECTRL_NONE, - 34, UNIPHIER_PIN_DRV_4_8, + 34, UNIPHIER_PIN_DRV_1BIT, 34, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(35, "XNFCE0", UNIPHIER_PIN_IECTRL_NONE, - 35, UNIPHIER_PIN_DRV_4_8, + 35, UNIPHIER_PIN_DRV_1BIT, 35, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(36, "NFRYBY0", UNIPHIER_PIN_IECTRL_NONE, - 36, UNIPHIER_PIN_DRV_4_8, + 36, UNIPHIER_PIN_DRV_1BIT, 36, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(37, "XNFCE1", UNIPHIER_PIN_IECTRL_NONE, - 37, UNIPHIER_PIN_DRV_4_8, + 37, UNIPHIER_PIN_DRV_1BIT, 37, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(38, "NFRYBY1", UNIPHIER_PIN_IECTRL_NONE, - 38, UNIPHIER_PIN_DRV_4_8, + 38, UNIPHIER_PIN_DRV_1BIT, 38, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(39, "NFD0", UNIPHIER_PIN_IECTRL_NONE, - 39, UNIPHIER_PIN_DRV_4_8, + 39, UNIPHIER_PIN_DRV_1BIT, 39, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(40, "NFD1", UNIPHIER_PIN_IECTRL_NONE, - 40, UNIPHIER_PIN_DRV_4_8, + 40, UNIPHIER_PIN_DRV_1BIT, 40, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(41, "NFD2", UNIPHIER_PIN_IECTRL_NONE, - 41, UNIPHIER_PIN_DRV_4_8, + 41, UNIPHIER_PIN_DRV_1BIT, 41, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(42, "NFD3", UNIPHIER_PIN_IECTRL_NONE, - 42, UNIPHIER_PIN_DRV_4_8, + 42, UNIPHIER_PIN_DRV_1BIT, 42, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(43, "NFD4", UNIPHIER_PIN_IECTRL_NONE, - 43, UNIPHIER_PIN_DRV_4_8, + 43, UNIPHIER_PIN_DRV_1BIT, 43, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(44, "NFD5", UNIPHIER_PIN_IECTRL_NONE, - 44, UNIPHIER_PIN_DRV_4_8, + 44, UNIPHIER_PIN_DRV_1BIT, 44, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(45, "NFD6", UNIPHIER_PIN_IECTRL_NONE, - 45, UNIPHIER_PIN_DRV_4_8, + 45, UNIPHIER_PIN_DRV_1BIT, 45, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(46, "NFD7", UNIPHIER_PIN_IECTRL_NONE, - 46, UNIPHIER_PIN_DRV_4_8, + 46, UNIPHIER_PIN_DRV_1BIT, 46, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(47, "SDCLK", UNIPHIER_PIN_IECTRL_NONE, - 0, UNIPHIER_PIN_DRV_8_12_16_20, + 0, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(48, "SDCMD", UNIPHIER_PIN_IECTRL_NONE, - 4, UNIPHIER_PIN_DRV_8_12_16_20, + 1, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(49, "SDDAT0", UNIPHIER_PIN_IECTRL_NONE, - 8, UNIPHIER_PIN_DRV_8_12_16_20, + 2, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(50, "SDDAT1", UNIPHIER_PIN_IECTRL_NONE, - 12, UNIPHIER_PIN_DRV_8_12_16_20, + 3, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(51, "SDDAT2", UNIPHIER_PIN_IECTRL_NONE, - 16, UNIPHIER_PIN_DRV_8_12_16_20, + 4, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(52, "SDDAT3", UNIPHIER_PIN_IECTRL_NONE, - 20, UNIPHIER_PIN_DRV_8_12_16_20, + 5, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(53, "SDCD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 53, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(54, "SDWP", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 54, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(55, "SDVOLC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 55, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(56, "USB0VBUS", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 56, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(57, "USB0OD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 57, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(58, "USB1VBUS", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 58, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(59, "USB1OD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 59, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(60, "USB2VBUS", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 60, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(61, "USB2OD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 61, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(62, "USB3VBUS", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 62, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(63, "USB3OD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 63, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(64, "HS0BCLKOUT", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 64, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(65, "HS0SYNCOUT", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 65, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(66, "HS0VALOUT", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 66, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(67, "HS0DOUT0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 67, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(68, "HS0DOUT1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 68, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(69, "HS0DOUT2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 69, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(70, "HS0DOUT3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 70, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(71, "HS0DOUT4", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 71, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(72, "HS0DOUT5", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 72, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(73, "HS0DOUT6", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 73, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(74, "HS0DOUT7", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 74, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(75, "HS1BCLKIN", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 75, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(76, "HS1SYNCIN", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 76, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(77, "HS1VALIN", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 77, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(78, "HS1DIN0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 78, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(79, "HS1DIN1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 79, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(80, "HS1DIN2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 80, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(81, "HS1DIN3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 81, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(82, "HS1DIN4", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 82, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(83, "HS1DIN5", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 83, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(84, "HS1DIN6", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 84, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(85, "HS1DIN7", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 85, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(86, "HS2BCLKIN", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 86, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(87, "HS2SYNCIN", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 87, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(88, "HS2VALIN", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 88, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(89, "HS2DIN0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 89, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(90, "HS2DIN1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 90, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(91, "HS2DIN2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 91, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(92, "HS2DIN3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 92, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(93, "HS2DIN4", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 93, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(94, "HS2DIN5", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 94, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(95, "HS2DIN6", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 95, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(96, "HS2DIN7", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 96, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(97, "AO1IEC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 97, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(98, "AO1DACCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 98, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(99, "AO1BCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 99, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(100, "AO1LRCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 100, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(101, "AO1D0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 101, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(102, "AO1D1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 102, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(103, "AO1D2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 103, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(104, "AO1D3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 104, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(105, "AO2DACCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 105, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(106, "AO2BCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 106, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(107, "AO2LRCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 107, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(108, "AO2D0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 108, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(109, "SDA0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 109, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(110, "SCL0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 110, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(111, "SDA1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 111, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(112, "SCL1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 112, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(113, "SBO0", 0, - 113, UNIPHIER_PIN_DRV_4_8, + 113, UNIPHIER_PIN_DRV_1BIT, 113, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(114, "SBI0", 0, - 114, UNIPHIER_PIN_DRV_4_8, + 114, UNIPHIER_PIN_DRV_1BIT, 114, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(115, "TXD1", 0, - 115, UNIPHIER_PIN_DRV_4_8, + 115, UNIPHIER_PIN_DRV_1BIT, 115, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(116, "RXD1", 0, - 116, UNIPHIER_PIN_DRV_4_8, + 116, UNIPHIER_PIN_DRV_1BIT, 116, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(117, "PWSRA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 117, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(118, "XIRQ0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 118, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(119, "XIRQ1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 119, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(120, "XIRQ2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 120, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(121, "XIRQ3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 121, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(122, "XIRQ4", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 122, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(123, "XIRQ5", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 123, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(124, "XIRQ6", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 124, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(125, "XIRQ7", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 125, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(126, "XIRQ8", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 126, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(127, "PORT00", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 127, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(128, "PORT01", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 128, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(129, "PORT02", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 129, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(130, "PORT03", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 130, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(131, "PORT04", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 131, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(132, "PORT05", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 132, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(133, "PORT06", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 133, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(134, "PORT07", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 134, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(135, "PORT10", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 135, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(136, "PORT11", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 136, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(137, "PORT12", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 137, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(138, "PORT13", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 138, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(139, "PORT14", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 139, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(140, "PORT15", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 140, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(141, "PORT16", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 141, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(142, "LPST", UNIPHIER_PIN_IECTRL_NONE, - 142, UNIPHIER_PIN_DRV_4_8, + 142, UNIPHIER_PIN_DRV_1BIT, 142, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(143, "MDC", 0, - 143, UNIPHIER_PIN_DRV_4_8, + 143, UNIPHIER_PIN_DRV_1BIT, 143, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(144, "MDIO", 0, - 144, UNIPHIER_PIN_DRV_4_8, + 144, UNIPHIER_PIN_DRV_1BIT, 144, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(145, "MDIO_INTL", 0, - 145, UNIPHIER_PIN_DRV_4_8, + 145, UNIPHIER_PIN_DRV_1BIT, 145, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(146, "PHYRSTL", 0, - 146, UNIPHIER_PIN_DRV_4_8, + 146, UNIPHIER_PIN_DRV_1BIT, 146, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(147, "RGMII_RXCLK", 0, - 147, UNIPHIER_PIN_DRV_4_8, + 147, UNIPHIER_PIN_DRV_1BIT, 147, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(148, "RGMII_RXD0", 0, - 148, UNIPHIER_PIN_DRV_4_8, + 148, UNIPHIER_PIN_DRV_1BIT, 148, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(149, "RGMII_RXD1", 0, - 149, UNIPHIER_PIN_DRV_4_8, + 149, UNIPHIER_PIN_DRV_1BIT, 149, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(150, "RGMII_RXD2", 0, - 150, UNIPHIER_PIN_DRV_4_8, + 150, UNIPHIER_PIN_DRV_1BIT, 150, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(151, "RGMII_RXD3", 0, - 151, UNIPHIER_PIN_DRV_4_8, + 151, UNIPHIER_PIN_DRV_1BIT, 151, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(152, "RGMII_RXCTL", 0, - 152, UNIPHIER_PIN_DRV_4_8, + 152, UNIPHIER_PIN_DRV_1BIT, 152, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(153, "RGMII_TXCLK", 0, - 153, UNIPHIER_PIN_DRV_4_8, + 153, UNIPHIER_PIN_DRV_1BIT, 153, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(154, "RGMII_TXD0", 0, - 154, UNIPHIER_PIN_DRV_4_8, + 154, UNIPHIER_PIN_DRV_1BIT, 154, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(155, "RGMII_TXD1", 0, - 155, UNIPHIER_PIN_DRV_4_8, + 155, UNIPHIER_PIN_DRV_1BIT, 155, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(156, "RGMII_TXD2", 0, - 156, UNIPHIER_PIN_DRV_4_8, + 156, UNIPHIER_PIN_DRV_1BIT, 156, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(157, "RGMII_TXD3", 0, - 157, UNIPHIER_PIN_DRV_4_8, + 157, UNIPHIER_PIN_DRV_1BIT, 157, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(158, "RGMII_TXCTL", 0, - 158, UNIPHIER_PIN_DRV_4_8, + 158, UNIPHIER_PIN_DRV_1BIT, 158, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(159, "A_D_PCD00OUT", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 159, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(160, "A_D_PCD01OUT", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 160, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(161, "A_D_PCD02OUT", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 161, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(162, "A_D_PCD03OUT", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 162, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(163, "A_D_PCD04OUT", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 163, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(164, "A_D_PCD05OUT", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 164, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(165, "A_D_PCD06OUT", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 165, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(166, "A_D_PCD07OUT", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 166, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(167, "A_D_PCD00IN", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 167, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(168, "A_D_PCD01IN", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 168, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(169, "A_D_PCD02IN", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 169, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(170, "A_D_PCD03IN", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 170, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(171, "A_D_PCD04IN", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 171, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(172, "A_D_PCD05IN", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 172, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(173, "A_D_PCD06IN", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 173, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(174, "A_D_PCD07IN", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 174, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(175, "A_D_PCDNOE", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 175, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(176, "A_D_PC0READY", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 176, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(177, "A_D_PC0CD1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 177, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(178, "A_D_PC0CD2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 178, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(179, "A_D_PC0WAIT", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 179, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(180, "A_D_PC0RESET", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 180, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(181, "A_D_PC0CE1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 181, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(182, "A_D_PC0WE", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 182, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(183, "A_D_PC0OE", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 183, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(184, "A_D_PC0IOWR", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 184, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(185, "A_D_PC0IORD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 185, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(186, "A_D_PC0NOE", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 186, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(187, "A_D_HS0BCLKIN", 0, - 187, UNIPHIER_PIN_DRV_4_8, + 187, UNIPHIER_PIN_DRV_1BIT, 187, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(188, "A_D_HS0SYNCIN", 0, - 188, UNIPHIER_PIN_DRV_4_8, + 188, UNIPHIER_PIN_DRV_1BIT, 188, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(189, "A_D_HS0VALIN", 0, - 189, UNIPHIER_PIN_DRV_4_8, + 189, UNIPHIER_PIN_DRV_1BIT, 189, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(190, "A_D_HS0DIN0", 0, - 190, UNIPHIER_PIN_DRV_4_8, + 190, UNIPHIER_PIN_DRV_1BIT, 190, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(191, "A_D_HS0DIN1", 0, - 191, UNIPHIER_PIN_DRV_4_8, + 191, UNIPHIER_PIN_DRV_1BIT, 191, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(192, "A_D_HS0DIN2", 0, - 192, UNIPHIER_PIN_DRV_4_8, + 192, UNIPHIER_PIN_DRV_1BIT, 192, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(193, "A_D_HS0DIN3", 0, - 193, UNIPHIER_PIN_DRV_4_8, + 193, UNIPHIER_PIN_DRV_1BIT, 193, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(194, "A_D_HS0DIN4", 0, - 194, UNIPHIER_PIN_DRV_4_8, + 194, UNIPHIER_PIN_DRV_1BIT, 194, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(195, "A_D_HS0DIN5", 0, - 195, UNIPHIER_PIN_DRV_4_8, + 195, UNIPHIER_PIN_DRV_1BIT, 195, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(196, "A_D_HS0DIN6", 0, - 196, UNIPHIER_PIN_DRV_4_8, + 196, UNIPHIER_PIN_DRV_1BIT, 196, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(197, "A_D_HS0DIN7", 0, - 197, UNIPHIER_PIN_DRV_4_8, + 197, UNIPHIER_PIN_DRV_1BIT, 197, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(198, "A_D_AO1ARC", 0, - 198, UNIPHIER_PIN_DRV_4_8, + 198, UNIPHIER_PIN_DRV_1BIT, 198, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(199, "A_D_SPIXRST", UNIPHIER_PIN_IECTRL_NONE, - 199, UNIPHIER_PIN_DRV_4_8, + 199, UNIPHIER_PIN_DRV_1BIT, 199, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(200, "A_D_SPISCLK0", UNIPHIER_PIN_IECTRL_NONE, - 200, UNIPHIER_PIN_DRV_4_8, + 200, UNIPHIER_PIN_DRV_1BIT, 200, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(201, "A_D_SPITXD0", UNIPHIER_PIN_IECTRL_NONE, - 201, UNIPHIER_PIN_DRV_4_8, + 201, UNIPHIER_PIN_DRV_1BIT, 201, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(202, "A_D_SPIRXD0", UNIPHIER_PIN_IECTRL_NONE, - 202, UNIPHIER_PIN_DRV_4_8, + 202, UNIPHIER_PIN_DRV_1BIT, 202, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(203, "A_D_DMDCLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 203, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(204, "A_D_DMDPSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 204, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(205, "A_D_DMDVAL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 205, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(206, "A_D_DMDDATA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 206, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(207, "A_D_HDMIRXXIRQ", 0, - 207, UNIPHIER_PIN_DRV_4_8, + 207, UNIPHIER_PIN_DRV_1BIT, 207, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(208, "A_D_VBIXIRQ", 0, - 208, UNIPHIER_PIN_DRV_4_8, + 208, UNIPHIER_PIN_DRV_1BIT, 208, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(209, "A_D_HDMITXXIRQ", 0, - 209, UNIPHIER_PIN_DRV_4_8, + 209, UNIPHIER_PIN_DRV_1BIT, 209, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(210, "A_D_DMDIRQ", UNIPHIER_PIN_IECTRL_NONE, - 210, UNIPHIER_PIN_DRV_4_8, + 210, UNIPHIER_PIN_DRV_1BIT, 210, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(211, "A_D_SPICIRQ", UNIPHIER_PIN_IECTRL_NONE, - 211, UNIPHIER_PIN_DRV_4_8, + 211, UNIPHIER_PIN_DRV_1BIT, 211, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(212, "A_D_SPIBIRQ", UNIPHIER_PIN_IECTRL_NONE, - 212, UNIPHIER_PIN_DRV_4_8, + 212, UNIPHIER_PIN_DRV_1BIT, 212, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(213, "A_D_BESDAOUT", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 213, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(214, "A_D_BESDAIN", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 214, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(215, "A_D_BESCLOUT", UNIPHIER_PIN_IECTRL_NONE, - 215, UNIPHIER_PIN_DRV_4_8, + 215, UNIPHIER_PIN_DRV_1BIT, 215, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(216, "A_D_VDACCLKOUT", 0, - 216, UNIPHIER_PIN_DRV_4_8, + 216, UNIPHIER_PIN_DRV_1BIT, 216, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(217, "A_D_VDACDOUT5", 0, - 217, UNIPHIER_PIN_DRV_4_8, + 217, UNIPHIER_PIN_DRV_1BIT, 217, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(218, "A_D_VDACDOUT6", 0, - 218, UNIPHIER_PIN_DRV_4_8, + 218, UNIPHIER_PIN_DRV_1BIT, 218, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(219, "A_D_VDACDOUT7", 0, - 219, UNIPHIER_PIN_DRV_4_8, + 219, UNIPHIER_PIN_DRV_1BIT, 219, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(220, "A_D_VDACDOUT8", 0, - 220, UNIPHIER_PIN_DRV_4_8, + 220, UNIPHIER_PIN_DRV_1BIT, 220, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(221, "A_D_VDACDOUT9", 0, - 221, UNIPHIER_PIN_DRV_4_8, + 221, UNIPHIER_PIN_DRV_1BIT, 221, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(222, "A_D_SIFBCKIN", 0, - 222, UNIPHIER_PIN_DRV_4_8, + 222, UNIPHIER_PIN_DRV_1BIT, 222, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(223, "A_D_SIFLRCKIN", 0, - 223, UNIPHIER_PIN_DRV_4_8, + 223, UNIPHIER_PIN_DRV_1BIT, 223, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(224, "A_D_SIFDIN", 0, - 224, UNIPHIER_PIN_DRV_4_8, + 224, UNIPHIER_PIN_DRV_1BIT, 224, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(225, "A_D_LIBCKOUT", 0, - 225, UNIPHIER_PIN_DRV_4_8, + 225, UNIPHIER_PIN_DRV_1BIT, 225, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(226, "A_D_LILRCKOUT", 0, - 226, UNIPHIER_PIN_DRV_4_8, + 226, UNIPHIER_PIN_DRV_1BIT, 226, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(227, "A_D_LIDIN", 0, - 227, UNIPHIER_PIN_DRV_4_8, + 227, UNIPHIER_PIN_DRV_1BIT, 227, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(228, "A_D_LODOUT", 0, - 228, UNIPHIER_PIN_DRV_4_8, + 228, UNIPHIER_PIN_DRV_1BIT, 228, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(229, "A_D_HPDOUT", 0, - 229, UNIPHIER_PIN_DRV_4_8, + 229, UNIPHIER_PIN_DRV_1BIT, 229, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(230, "A_D_MCLK", 0, - 230, UNIPHIER_PIN_DRV_4_8, + 230, UNIPHIER_PIN_DRV_1BIT, 230, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(231, "A_D_A2PLLREFOUT", 0, - 231, UNIPHIER_PIN_DRV_4_8, + 231, UNIPHIER_PIN_DRV_1BIT, 231, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(232, "A_D_HDMI3DSDAOUT", 0, - 232, UNIPHIER_PIN_DRV_4_8, + 232, UNIPHIER_PIN_DRV_1BIT, 232, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(233, "A_D_HDMI3DSDAIN", 0, - 233, UNIPHIER_PIN_DRV_4_8, + 233, UNIPHIER_PIN_DRV_1BIT, 233, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(234, "A_D_HDMI3DSCLIN", 0, - 234, UNIPHIER_PIN_DRV_4_8, + 234, UNIPHIER_PIN_DRV_1BIT, 234, UNIPHIER_PIN_PULL_DOWN), }; @@ -737,52 +735,65 @@ static const unsigned adinter_pins[] = { 215, 216, 217, 218, 219, 220, 221, 222, 223, 224, 225, 226, 227, 228, 229, 230, 231, 232, 233, 234, }; -static const unsigned adinter_muxvals[] = { +static const int adinter_muxvals[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42}; -static const unsigned emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; +static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46}; -static const unsigned emmc_dat8_muxvals[] = {1, 1, 1, 1}; +static const int emmc_dat8_muxvals[] = {1, 1, 1, 1}; static const unsigned i2c0_pins[] = {109, 110}; -static const unsigned i2c0_muxvals[] = {0, 0}; +static const int i2c0_muxvals[] = {0, 0}; static const unsigned i2c1_pins[] = {111, 112}; -static const unsigned i2c1_muxvals[] = {0, 0}; +static const int i2c1_muxvals[] = {0, 0}; static const unsigned i2c2_pins[] = {115, 116}; -static const unsigned i2c2_muxvals[] = {1, 1}; +static const int i2c2_muxvals[] = {1, 1}; static const unsigned i2c3_pins[] = {118, 119}; -static const unsigned i2c3_muxvals[] = {1, 1}; +static const int i2c3_muxvals[] = {1, 1}; static const unsigned nand_pins[] = {30, 31, 32, 33, 34, 35, 36, 39, 40, 41, 42, 43, 44, 45, 46}; -static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0}; +static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned nand_cs1_pins[] = {37, 38}; -static const unsigned nand_cs1_muxvals[] = {0, 0}; +static const int nand_cs1_muxvals[] = {0, 0}; static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55}; -static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned system_bus_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, + 11, 12, 13}; +static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0}; +static const unsigned system_bus_cs1_pins[] = {14}; +static const int system_bus_cs1_muxvals[] = {0}; +static const unsigned system_bus_cs2_pins[] = {37}; +static const int system_bus_cs2_muxvals[] = {6}; +static const unsigned system_bus_cs3_pins[] = {38}; +static const int system_bus_cs3_muxvals[] = {6}; +static const unsigned system_bus_cs4_pins[] = {115}; +static const int system_bus_cs4_muxvals[] = {6}; +static const unsigned system_bus_cs5_pins[] = {55}; +static const int system_bus_cs5_muxvals[] = {6}; static const unsigned uart0_pins[] = {135, 136}; -static const unsigned uart0_muxvals[] = {3, 3}; +static const int uart0_muxvals[] = {3, 3}; static const unsigned uart0b_pins[] = {11, 12}; -static const unsigned uart0b_muxvals[] = {2, 2}; +static const int uart0b_muxvals[] = {2, 2}; static const unsigned uart1_pins[] = {115, 116}; -static const unsigned uart1_muxvals[] = {0, 0}; +static const int uart1_muxvals[] = {0, 0}; static const unsigned uart1b_pins[] = {113, 114}; -static const unsigned uart1b_muxvals[] = {1, 1}; +static const int uart1b_muxvals[] = {1, 1}; static const unsigned uart2_pins[] = {113, 114}; -static const unsigned uart2_muxvals[] = {2, 2}; +static const int uart2_muxvals[] = {2, 2}; static const unsigned uart2b_pins[] = {86, 87}; -static const unsigned uart2b_muxvals[] = {1, 1}; +static const int uart2b_muxvals[] = {1, 1}; static const unsigned usb0_pins[] = {56, 57}; -static const unsigned usb0_muxvals[] = {0, 0}; +static const int usb0_muxvals[] = {0, 0}; static const unsigned usb1_pins[] = {58, 59}; -static const unsigned usb1_muxvals[] = {0, 0}; +static const int usb1_muxvals[] = {0, 0}; static const unsigned usb2_pins[] = {60, 61}; -static const unsigned usb2_muxvals[] = {0, 0}; +static const int usb2_muxvals[] = {0, 0}; static const unsigned usb3_pins[] = {62, 63}; -static const unsigned usb3_muxvals[] = {0, 0}; +static const int usb3_muxvals[] = {0, 0}; static const unsigned port_range0_pins[] = { 127, 128, 129, 130, 131, 132, 133, 134, /* PORT0x */ 135, 136, 137, 138, 139, 140, 141, 142, /* PORT1x */ @@ -796,7 +807,7 @@ static const unsigned port_range0_pins[] = { 61, 62, 63, 64, 65, 66, 67, 68, /* PORT9x */ 69, 70, 71, 76, 77, 78, 79, 80, /* PORT10x */ }; -static const unsigned port_range0_muxvals[] = { +static const int port_range0_muxvals[] = { 15, 15, 15, 15, 15, 15, 15, 15, /* PORT0x */ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT1x */ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT2x */ @@ -828,7 +839,7 @@ static const unsigned port_range1_pins[] = { 218, 219, 220, 221, 223, 224, 225, 226, /* PORT27x */ 227, 228, 229, 230, 231, 232, 233, 234, /* PORT28x */ }; -static const unsigned port_range1_muxvals[] = { +static const int port_range1_muxvals[] = { 15, 15, 15, 15, 15, 15, 15, 15, /* PORT12x */ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT13x */ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT14x */ @@ -852,13 +863,13 @@ static const unsigned xirq_pins[] = { 126, 72, 73, 92, 177, 93, 94, 176, /* XIRQ8-15 */ 74, 91, 27, 28, 29, 75, 20, 26, /* XIRQ16-23 */ }; -static const unsigned xirq_muxvals[] = { +static const int xirq_muxvals[] = { 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ0-7 */ 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ8-15 */ 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ16-23 */ }; -static const struct uniphier_pinctrl_group ph1_ld6b_groups[] = { +static const struct uniphier_pinctrl_group uniphier_ld6b_groups[] = { UNIPHIER_PINCTRL_GROUP(adinter), UNIPHIER_PINCTRL_GROUP(emmc), UNIPHIER_PINCTRL_GROUP(emmc_dat8), @@ -869,6 +880,12 @@ static const struct uniphier_pinctrl_group ph1_ld6b_groups[] = { UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(system_bus), + UNIPHIER_PINCTRL_GROUP(system_bus_cs1), + UNIPHIER_PINCTRL_GROUP(system_bus_cs2), + UNIPHIER_PINCTRL_GROUP(system_bus_cs3), + UNIPHIER_PINCTRL_GROUP(system_bus_cs4), + UNIPHIER_PINCTRL_GROUP(system_bus_cs5), UNIPHIER_PINCTRL_GROUP(uart0), UNIPHIER_PINCTRL_GROUP(uart0b), UNIPHIER_PINCTRL_GROUP(uart1), @@ -1140,6 +1157,12 @@ static const char * const i2c2_groups[] = {"i2c2"}; static const char * const i2c3_groups[] = {"i2c3"}; static const char * const nand_groups[] = {"nand", "nand_cs1"}; static const char * const sd_groups[] = {"sd"}; +static const char * const system_bus_groups[] = {"system_bus", + "system_bus_cs1", + "system_bus_cs2", + "system_bus_cs3", + "system_bus_cs4", + "system_bus_cs5"}; static const char * const uart0_groups[] = {"uart0", "uart0b"}; static const char * const uart1_groups[] = {"uart1", "uart1b"}; static const char * const uart2_groups[] = {"uart2", "uart2b"}; @@ -1215,7 +1238,7 @@ static const char * const xirq_groups[] = { "xirq20", "xirq21", "xirq22", "xirq23", }; -static const struct uniphier_pinmux_function ph1_ld6b_functions[] = { +static const struct uniphier_pinmux_function uniphier_ld6b_functions[] = { UNIPHIER_PINMUX_FUNCTION(adinter), /* Achip-Dchip interconnect */ UNIPHIER_PINMUX_FUNCTION(emmc), UNIPHIER_PINMUX_FUNCTION(i2c0), @@ -1224,6 +1247,7 @@ static const struct uniphier_pinmux_function ph1_ld6b_functions[] = { UNIPHIER_PINMUX_FUNCTION(i2c3), UNIPHIER_PINMUX_FUNCTION(nand), UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION(system_bus), UNIPHIER_PINMUX_FUNCTION(uart0), UNIPHIER_PINMUX_FUNCTION(uart1), UNIPHIER_PINMUX_FUNCTION(uart2), @@ -1235,43 +1259,36 @@ static const struct uniphier_pinmux_function ph1_ld6b_functions[] = { UNIPHIER_PINMUX_FUNCTION(xirq), }; -static struct uniphier_pinctrl_socdata ph1_ld6b_pindata = { - .groups = ph1_ld6b_groups, - .groups_count = ARRAY_SIZE(ph1_ld6b_groups), - .functions = ph1_ld6b_functions, - .functions_count = ARRAY_SIZE(ph1_ld6b_functions), - .mux_bits = 8, - .reg_stride = 4, - .load_pinctrl = false, -}; - -static struct pinctrl_desc ph1_ld6b_pinctrl_desc = { - .name = DRIVER_NAME, - .pins = ph1_ld6b_pins, - .npins = ARRAY_SIZE(ph1_ld6b_pins), - .owner = THIS_MODULE, +static struct uniphier_pinctrl_socdata uniphier_ld6b_pindata = { + .pins = uniphier_ld6b_pins, + .npins = ARRAY_SIZE(uniphier_ld6b_pins), + .groups = uniphier_ld6b_groups, + .groups_count = ARRAY_SIZE(uniphier_ld6b_groups), + .functions = uniphier_ld6b_functions, + .functions_count = ARRAY_SIZE(uniphier_ld6b_functions), + .caps = 0, }; -static int ph1_ld6b_pinctrl_probe(struct platform_device *pdev) +static int uniphier_ld6b_pinctrl_probe(struct platform_device *pdev) { - return uniphier_pinctrl_probe(pdev, &ph1_ld6b_pinctrl_desc, - &ph1_ld6b_pindata); + return uniphier_pinctrl_probe(pdev, &uniphier_ld6b_pindata); } -static const struct of_device_id ph1_ld6b_pinctrl_match[] = { +static const struct of_device_id uniphier_ld6b_pinctrl_match[] = { + { .compatible = "socionext,uniphier-ld6b-pinctrl" }, { .compatible = "socionext,ph1-ld6b-pinctrl" }, { /* sentinel */ } }; -MODULE_DEVICE_TABLE(of, ph1_ld6b_pinctrl_match); +MODULE_DEVICE_TABLE(of, uniphier_ld6b_pinctrl_match); -static struct platform_driver ph1_ld6b_pinctrl_driver = { - .probe = ph1_ld6b_pinctrl_probe, +static struct platform_driver uniphier_ld6b_pinctrl_driver = { + .probe = uniphier_ld6b_pinctrl_probe, .driver = { - .name = DRIVER_NAME, - .of_match_table = ph1_ld6b_pinctrl_match, + .name = "uniphier-ld6b-pinctrl", + .of_match_table = uniphier_ld6b_pinctrl_match, }, }; -module_platform_driver(ph1_ld6b_pinctrl_driver); +module_platform_driver(uniphier_ld6b_pinctrl_driver); MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>"); MODULE_DESCRIPTION("UniPhier PH1-LD6b pinctrl driver"); diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c index b1f09e68f90e..002bd6e60b9a 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c @@ -19,1039 +19,1056 @@ #include "pinctrl-uniphier.h" -#define DRIVER_NAME "ph1-pro4-pinctrl" - -static const struct pinctrl_pin_desc ph1_pro4_pins[] = { +static const struct pinctrl_pin_desc uniphier_pro4_pins[] = { UNIPHIER_PINCTRL_PIN(0, "CK24O", UNIPHIER_PIN_IECTRL_NONE, - 0, UNIPHIER_PIN_DRV_4_8, + 0, UNIPHIER_PIN_DRV_1BIT, 0, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(1, "VC27A", UNIPHIER_PIN_IECTRL_NONE, - 1, UNIPHIER_PIN_DRV_4_8, + 1, UNIPHIER_PIN_DRV_1BIT, 1, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(2, "CK27AI", UNIPHIER_PIN_IECTRL_NONE, - 2, UNIPHIER_PIN_DRV_4_8, + 2, UNIPHIER_PIN_DRV_1BIT, 2, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(3, "CK27AO", UNIPHIER_PIN_IECTRL_NONE, - 3, UNIPHIER_PIN_DRV_4_8, + 3, UNIPHIER_PIN_DRV_1BIT, 3, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(4, "CKSEL", UNIPHIER_PIN_IECTRL_NONE, - 4, UNIPHIER_PIN_DRV_4_8, + 4, UNIPHIER_PIN_DRV_1BIT, 4, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(5, "CK27AV", UNIPHIER_PIN_IECTRL_NONE, - 5, UNIPHIER_PIN_DRV_4_8, + 5, UNIPHIER_PIN_DRV_1BIT, 5, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(6, "AEXCKA", UNIPHIER_PIN_IECTRL_NONE, - 6, UNIPHIER_PIN_DRV_4_8, + 6, UNIPHIER_PIN_DRV_1BIT, 6, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(7, "ASEL", UNIPHIER_PIN_IECTRL_NONE, - 7, UNIPHIER_PIN_DRV_4_8, + 7, UNIPHIER_PIN_DRV_1BIT, 7, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(8, "ARCRESET", UNIPHIER_PIN_IECTRL_NONE, - 8, UNIPHIER_PIN_DRV_4_8, + 8, UNIPHIER_PIN_DRV_1BIT, 8, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(9, "ARCUNLOCK", UNIPHIER_PIN_IECTRL_NONE, - 9, UNIPHIER_PIN_DRV_4_8, + 9, UNIPHIER_PIN_DRV_1BIT, 9, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(10, "XSRST", UNIPHIER_PIN_IECTRL_NONE, - 10, UNIPHIER_PIN_DRV_4_8, + 10, UNIPHIER_PIN_DRV_1BIT, 10, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(11, "XNMIRQ", UNIPHIER_PIN_IECTRL_NONE, - 11, UNIPHIER_PIN_DRV_4_8, + 11, UNIPHIER_PIN_DRV_1BIT, 11, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(12, "XSCIRQ", UNIPHIER_PIN_IECTRL_NONE, - 12, UNIPHIER_PIN_DRV_4_8, + 12, UNIPHIER_PIN_DRV_1BIT, 12, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(13, "EXTRG", UNIPHIER_PIN_IECTRL_NONE, - 13, UNIPHIER_PIN_DRV_4_8, + 13, UNIPHIER_PIN_DRV_1BIT, 13, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(14, "TRCCLK", UNIPHIER_PIN_IECTRL_NONE, - 14, UNIPHIER_PIN_DRV_4_8, + 14, UNIPHIER_PIN_DRV_1BIT, 14, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(15, "TRCCTL", UNIPHIER_PIN_IECTRL_NONE, - 15, UNIPHIER_PIN_DRV_4_8, + 15, UNIPHIER_PIN_DRV_1BIT, 15, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(16, "TRCD0", UNIPHIER_PIN_IECTRL_NONE, - 16, UNIPHIER_PIN_DRV_4_8, + 16, UNIPHIER_PIN_DRV_1BIT, 16, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(17, "TRCD1", UNIPHIER_PIN_IECTRL_NONE, - 17, UNIPHIER_PIN_DRV_4_8, + 17, UNIPHIER_PIN_DRV_1BIT, 17, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(18, "TRCD2", UNIPHIER_PIN_IECTRL_NONE, - 18, UNIPHIER_PIN_DRV_4_8, + 18, UNIPHIER_PIN_DRV_1BIT, 18, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(19, "TRCD3", UNIPHIER_PIN_IECTRL_NONE, - 19, UNIPHIER_PIN_DRV_4_8, + 19, UNIPHIER_PIN_DRV_1BIT, 19, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(20, "TRCD4", UNIPHIER_PIN_IECTRL_NONE, - 20, UNIPHIER_PIN_DRV_4_8, + 20, UNIPHIER_PIN_DRV_1BIT, 20, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(21, "TRCD5", UNIPHIER_PIN_IECTRL_NONE, - 21, UNIPHIER_PIN_DRV_4_8, + 21, UNIPHIER_PIN_DRV_1BIT, 21, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(22, "TRCD6", UNIPHIER_PIN_IECTRL_NONE, - 22, UNIPHIER_PIN_DRV_4_8, + 22, UNIPHIER_PIN_DRV_1BIT, 22, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(23, "TRCD7", UNIPHIER_PIN_IECTRL_NONE, - 23, UNIPHIER_PIN_DRV_4_8, + 23, UNIPHIER_PIN_DRV_1BIT, 23, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(24, "XECS1", UNIPHIER_PIN_IECTRL_NONE, - 24, UNIPHIER_PIN_DRV_4_8, + 24, UNIPHIER_PIN_DRV_1BIT, 24, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(25, "ERXW", UNIPHIER_PIN_IECTRL_NONE, - 25, UNIPHIER_PIN_DRV_4_8, + 25, UNIPHIER_PIN_DRV_1BIT, 25, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(26, "XERWE0", UNIPHIER_PIN_IECTRL_NONE, - 26, UNIPHIER_PIN_DRV_4_8, + 26, UNIPHIER_PIN_DRV_1BIT, 26, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(27, "XERWE1", UNIPHIER_PIN_IECTRL_NONE, - 27, UNIPHIER_PIN_DRV_4_8, + 27, UNIPHIER_PIN_DRV_1BIT, 27, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(28, "ES0", UNIPHIER_PIN_IECTRL_NONE, - 28, UNIPHIER_PIN_DRV_4_8, + 28, UNIPHIER_PIN_DRV_1BIT, 28, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(29, "ES1", UNIPHIER_PIN_IECTRL_NONE, - 29, UNIPHIER_PIN_DRV_4_8, + 29, UNIPHIER_PIN_DRV_1BIT, 29, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(30, "ES2", UNIPHIER_PIN_IECTRL_NONE, - 30, UNIPHIER_PIN_DRV_4_8, + 30, UNIPHIER_PIN_DRV_1BIT, 30, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(31, "ED0", UNIPHIER_PIN_IECTRL_NONE, - 31, UNIPHIER_PIN_DRV_4_8, + 31, UNIPHIER_PIN_DRV_1BIT, 31, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(32, "ED1", UNIPHIER_PIN_IECTRL_NONE, - 32, UNIPHIER_PIN_DRV_4_8, + 32, UNIPHIER_PIN_DRV_1BIT, 32, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(33, "ED2", UNIPHIER_PIN_IECTRL_NONE, - 33, UNIPHIER_PIN_DRV_4_8, + 33, UNIPHIER_PIN_DRV_1BIT, 33, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(34, "ED3", UNIPHIER_PIN_IECTRL_NONE, - 34, UNIPHIER_PIN_DRV_4_8, + 34, UNIPHIER_PIN_DRV_1BIT, 34, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(35, "ED4", UNIPHIER_PIN_IECTRL_NONE, - 35, UNIPHIER_PIN_DRV_4_8, + 35, UNIPHIER_PIN_DRV_1BIT, 35, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(36, "ED5", UNIPHIER_PIN_IECTRL_NONE, - 36, UNIPHIER_PIN_DRV_4_8, + 36, UNIPHIER_PIN_DRV_1BIT, 36, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(37, "ED6", UNIPHIER_PIN_IECTRL_NONE, - 37, UNIPHIER_PIN_DRV_4_8, + 37, UNIPHIER_PIN_DRV_1BIT, 37, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(38, "ED7", UNIPHIER_PIN_IECTRL_NONE, - 38, UNIPHIER_PIN_DRV_4_8, + 38, UNIPHIER_PIN_DRV_1BIT, 38, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(39, "BOOTSWAP", UNIPHIER_PIN_IECTRL_NONE, - 39, UNIPHIER_PIN_DRV_NONE, + -1, UNIPHIER_PIN_DRV_NONE, 39, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(40, "NFD0", UNIPHIER_PIN_IECTRL_NONE, - 2, UNIPHIER_PIN_DRV_8_12_16_20, + 2, UNIPHIER_PIN_DRV_2BIT, 40, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(41, "NFD1", UNIPHIER_PIN_IECTRL_NONE, - 3, UNIPHIER_PIN_DRV_8_12_16_20, + 3, UNIPHIER_PIN_DRV_2BIT, 41, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(42, "NFD2", UNIPHIER_PIN_IECTRL_NONE, - 4, UNIPHIER_PIN_DRV_8_12_16_20, + 4, UNIPHIER_PIN_DRV_2BIT, 42, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(43, "NFD3", UNIPHIER_PIN_IECTRL_NONE, - 5, UNIPHIER_PIN_DRV_8_12_16_20, + 5, UNIPHIER_PIN_DRV_2BIT, 43, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(44, "NFD4", UNIPHIER_PIN_IECTRL_NONE, - 6, UNIPHIER_PIN_DRV_8_12_16_20, + 6, UNIPHIER_PIN_DRV_2BIT, 44, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(45, "NFD5", UNIPHIER_PIN_IECTRL_NONE, - 7, UNIPHIER_PIN_DRV_8_12_16_20, + 7, UNIPHIER_PIN_DRV_2BIT, 45, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(46, "NFD6", UNIPHIER_PIN_IECTRL_NONE, - 8, UNIPHIER_PIN_DRV_8_12_16_20, + 8, UNIPHIER_PIN_DRV_2BIT, 46, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(47, "NFD7", UNIPHIER_PIN_IECTRL_NONE, - 9, UNIPHIER_PIN_DRV_8_12_16_20, + 9, UNIPHIER_PIN_DRV_2BIT, 47, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(48, "NFALE", UNIPHIER_PIN_IECTRL_NONE, - 48, UNIPHIER_PIN_DRV_4_8, + 48, UNIPHIER_PIN_DRV_1BIT, 48, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(49, "NFCLE", UNIPHIER_PIN_IECTRL_NONE, - 49, UNIPHIER_PIN_DRV_4_8, + 49, UNIPHIER_PIN_DRV_1BIT, 49, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(50, "XNFRE", UNIPHIER_PIN_IECTRL_NONE, - 50, UNIPHIER_PIN_DRV_4_8, + 50, UNIPHIER_PIN_DRV_1BIT, 50, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(51, "XNFWE", UNIPHIER_PIN_IECTRL_NONE, - 0, UNIPHIER_PIN_DRV_8_12_16_20, + 0, UNIPHIER_PIN_DRV_2BIT, 51, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(52, "XNFWP", UNIPHIER_PIN_IECTRL_NONE, - 52, UNIPHIER_PIN_DRV_4_8, + 52, UNIPHIER_PIN_DRV_1BIT, 52, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(53, "XNFCE0", UNIPHIER_PIN_IECTRL_NONE, - 1, UNIPHIER_PIN_DRV_8_12_16_20, + 1, UNIPHIER_PIN_DRV_2BIT, 53, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(54, "NRYBY0", UNIPHIER_PIN_IECTRL_NONE, - 54, UNIPHIER_PIN_DRV_4_8, + 54, UNIPHIER_PIN_DRV_1BIT, 54, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(55, "DMDSCLTST", UNIPHIER_PIN_IECTRL_NONE, -1, UNIPHIER_PIN_DRV_NONE, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(56, "DMDSDATST", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(57, "AGCI0", 3, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 55, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(58, "DMDSCL0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(59, "DMDSDA0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(60, "AGCBS0", 5, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 56, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(61, "DMDSCL1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(62, "DMDSDA1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(63, "ANTSHORT", UNIPHIER_PIN_IECTRL_NONE, - 57, UNIPHIER_PIN_DRV_4_8, + 57, UNIPHIER_PIN_DRV_1BIT, 57, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(64, "CH0CLK", UNIPHIER_PIN_IECTRL_NONE, - 58, UNIPHIER_PIN_DRV_4_8, + 58, UNIPHIER_PIN_DRV_1BIT, 58, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(65, "CH0VAL", UNIPHIER_PIN_IECTRL_NONE, - 59, UNIPHIER_PIN_DRV_4_8, + 59, UNIPHIER_PIN_DRV_1BIT, 59, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(66, "CH0PSYNC", UNIPHIER_PIN_IECTRL_NONE, - 60, UNIPHIER_PIN_DRV_4_8, + 60, UNIPHIER_PIN_DRV_1BIT, 60, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(67, "CH0DATA", UNIPHIER_PIN_IECTRL_NONE, - 61, UNIPHIER_PIN_DRV_4_8, + 61, UNIPHIER_PIN_DRV_1BIT, 61, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(68, "CH1CLK", UNIPHIER_PIN_IECTRL_NONE, - 62, UNIPHIER_PIN_DRV_4_8, + 62, UNIPHIER_PIN_DRV_1BIT, 62, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(69, "CH1VAL", UNIPHIER_PIN_IECTRL_NONE, - 63, UNIPHIER_PIN_DRV_4_8, + 63, UNIPHIER_PIN_DRV_1BIT, 63, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(70, "CH1PSYNC", UNIPHIER_PIN_IECTRL_NONE, - 64, UNIPHIER_PIN_DRV_4_8, + 64, UNIPHIER_PIN_DRV_1BIT, 64, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(71, "CH1DATA", UNIPHIER_PIN_IECTRL_NONE, - 65, UNIPHIER_PIN_DRV_4_8, + 65, UNIPHIER_PIN_DRV_1BIT, 65, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(72, "CH2CLK", UNIPHIER_PIN_IECTRL_NONE, - 66, UNIPHIER_PIN_DRV_4_8, + 66, UNIPHIER_PIN_DRV_1BIT, 66, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(73, "CH2VAL", UNIPHIER_PIN_IECTRL_NONE, - 67, UNIPHIER_PIN_DRV_4_8, + 67, UNIPHIER_PIN_DRV_1BIT, 67, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(74, "CH2PSYNC", UNIPHIER_PIN_IECTRL_NONE, - 68, UNIPHIER_PIN_DRV_4_8, + 68, UNIPHIER_PIN_DRV_1BIT, 68, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(75, "CH2DATA", UNIPHIER_PIN_IECTRL_NONE, - 69, UNIPHIER_PIN_DRV_4_8, + 69, UNIPHIER_PIN_DRV_1BIT, 69, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(76, "CH3CLK", UNIPHIER_PIN_IECTRL_NONE, - 70, UNIPHIER_PIN_DRV_4_8, + 70, UNIPHIER_PIN_DRV_1BIT, 70, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(77, "CH3VAL", UNIPHIER_PIN_IECTRL_NONE, - 71, UNIPHIER_PIN_DRV_4_8, + 71, UNIPHIER_PIN_DRV_1BIT, 71, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(78, "CH3PSYNC", UNIPHIER_PIN_IECTRL_NONE, - 72, UNIPHIER_PIN_DRV_4_8, + 72, UNIPHIER_PIN_DRV_1BIT, 72, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(79, "CH3DATA", UNIPHIER_PIN_IECTRL_NONE, - 73, UNIPHIER_PIN_DRV_4_8, + 73, UNIPHIER_PIN_DRV_1BIT, 73, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(80, "CH4CLK", UNIPHIER_PIN_IECTRL_NONE, - 74, UNIPHIER_PIN_DRV_4_8, + 74, UNIPHIER_PIN_DRV_1BIT, 74, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(81, "CH4VAL", UNIPHIER_PIN_IECTRL_NONE, - 75, UNIPHIER_PIN_DRV_4_8, + 75, UNIPHIER_PIN_DRV_1BIT, 75, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(82, "CH4PSYNC", UNIPHIER_PIN_IECTRL_NONE, - 76, UNIPHIER_PIN_DRV_4_8, + 76, UNIPHIER_PIN_DRV_1BIT, 76, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(83, "CH4DATA", UNIPHIER_PIN_IECTRL_NONE, - 77, UNIPHIER_PIN_DRV_4_8, + 77, UNIPHIER_PIN_DRV_1BIT, 77, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(84, "CH5CLK", UNIPHIER_PIN_IECTRL_NONE, - 78, UNIPHIER_PIN_DRV_4_8, + 78, UNIPHIER_PIN_DRV_1BIT, 78, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(85, "CH5VAL", UNIPHIER_PIN_IECTRL_NONE, - 79, UNIPHIER_PIN_DRV_4_8, + 79, UNIPHIER_PIN_DRV_1BIT, 79, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(86, "CH5PSYNC", UNIPHIER_PIN_IECTRL_NONE, - 80, UNIPHIER_PIN_DRV_4_8, + 80, UNIPHIER_PIN_DRV_1BIT, 80, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(87, "CH5DATA", UNIPHIER_PIN_IECTRL_NONE, - 81, UNIPHIER_PIN_DRV_4_8, + 81, UNIPHIER_PIN_DRV_1BIT, 81, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(88, "CH6CLK", UNIPHIER_PIN_IECTRL_NONE, - 82, UNIPHIER_PIN_DRV_4_8, + 82, UNIPHIER_PIN_DRV_1BIT, 82, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(89, "CH6VAL", UNIPHIER_PIN_IECTRL_NONE, - 83, UNIPHIER_PIN_DRV_4_8, + 83, UNIPHIER_PIN_DRV_1BIT, 83, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(90, "CH6PSYNC", UNIPHIER_PIN_IECTRL_NONE, - 84, UNIPHIER_PIN_DRV_4_8, + 84, UNIPHIER_PIN_DRV_1BIT, 84, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(91, "CH6DATA", UNIPHIER_PIN_IECTRL_NONE, - 85, UNIPHIER_PIN_DRV_4_8, + 85, UNIPHIER_PIN_DRV_1BIT, 85, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(92, "CKFEO", UNIPHIER_PIN_IECTRL_NONE, - 86, UNIPHIER_PIN_DRV_4_8, + 86, UNIPHIER_PIN_DRV_1BIT, 86, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(93, "XFERST", UNIPHIER_PIN_IECTRL_NONE, - 87, UNIPHIER_PIN_DRV_4_8, + 87, UNIPHIER_PIN_DRV_1BIT, 87, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(94, "P_FE_ON", UNIPHIER_PIN_IECTRL_NONE, - 88, UNIPHIER_PIN_DRV_4_8, + 88, UNIPHIER_PIN_DRV_1BIT, 88, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(95, "P_TU0_ON", UNIPHIER_PIN_IECTRL_NONE, - 89, UNIPHIER_PIN_DRV_4_8, + 89, UNIPHIER_PIN_DRV_1BIT, 89, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(96, "XFEIRQ0", UNIPHIER_PIN_IECTRL_NONE, - 90, UNIPHIER_PIN_DRV_4_8, + 90, UNIPHIER_PIN_DRV_1BIT, 90, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(97, "XFEIRQ1", UNIPHIER_PIN_IECTRL_NONE, - 91, UNIPHIER_PIN_DRV_4_8, + 91, UNIPHIER_PIN_DRV_1BIT, 91, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(98, "XFEIRQ2", UNIPHIER_PIN_IECTRL_NONE, - 92, UNIPHIER_PIN_DRV_4_8, + 92, UNIPHIER_PIN_DRV_1BIT, 92, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(99, "XFEIRQ3", UNIPHIER_PIN_IECTRL_NONE, - 93, UNIPHIER_PIN_DRV_4_8, + 93, UNIPHIER_PIN_DRV_1BIT, 93, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(100, "XFEIRQ4", UNIPHIER_PIN_IECTRL_NONE, - 94, UNIPHIER_PIN_DRV_4_8, + 94, UNIPHIER_PIN_DRV_1BIT, 94, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(101, "XFEIRQ5", UNIPHIER_PIN_IECTRL_NONE, - 95, UNIPHIER_PIN_DRV_4_8, + 95, UNIPHIER_PIN_DRV_1BIT, 95, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(102, "XFEIRQ6", UNIPHIER_PIN_IECTRL_NONE, - 96, UNIPHIER_PIN_DRV_4_8, + 96, UNIPHIER_PIN_DRV_1BIT, 96, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(103, "SMTCLK0", UNIPHIER_PIN_IECTRL_NONE, - 97, UNIPHIER_PIN_DRV_4_8, + 97, UNIPHIER_PIN_DRV_1BIT, 97, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(104, "SMTRST0", UNIPHIER_PIN_IECTRL_NONE, - 98, UNIPHIER_PIN_DRV_4_8, + 98, UNIPHIER_PIN_DRV_1BIT, 98, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(105, "SMTCMD0", UNIPHIER_PIN_IECTRL_NONE, - 99, UNIPHIER_PIN_DRV_4_8, + 99, UNIPHIER_PIN_DRV_1BIT, 99, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(106, "SMTD0", UNIPHIER_PIN_IECTRL_NONE, - 100, UNIPHIER_PIN_DRV_4_8, + 100, UNIPHIER_PIN_DRV_1BIT, 100, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(107, "SMTSEL0", UNIPHIER_PIN_IECTRL_NONE, - 101, UNIPHIER_PIN_DRV_4_8, + 101, UNIPHIER_PIN_DRV_1BIT, 101, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(108, "SMTDET0", UNIPHIER_PIN_IECTRL_NONE, - 102, UNIPHIER_PIN_DRV_4_8, + 102, UNIPHIER_PIN_DRV_1BIT, 102, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(109, "SMTCLK1", UNIPHIER_PIN_IECTRL_NONE, - 103, UNIPHIER_PIN_DRV_4_8, + 103, UNIPHIER_PIN_DRV_1BIT, 103, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(110, "SMTRST1", UNIPHIER_PIN_IECTRL_NONE, - 104, UNIPHIER_PIN_DRV_4_8, + 104, UNIPHIER_PIN_DRV_1BIT, 104, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(111, "SMTCMD1", UNIPHIER_PIN_IECTRL_NONE, - 105, UNIPHIER_PIN_DRV_4_8, + 105, UNIPHIER_PIN_DRV_1BIT, 105, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(112, "SMTD1", UNIPHIER_PIN_IECTRL_NONE, - 106, UNIPHIER_PIN_DRV_4_8, + 106, UNIPHIER_PIN_DRV_1BIT, 106, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(113, "SMTSEL1", UNIPHIER_PIN_IECTRL_NONE, - 107, UNIPHIER_PIN_DRV_4_8, + 107, UNIPHIER_PIN_DRV_1BIT, 107, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(114, "SMTDET1", UNIPHIER_PIN_IECTRL_NONE, - 108, UNIPHIER_PIN_DRV_4_8, + 108, UNIPHIER_PIN_DRV_1BIT, 108, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(115, "XINTM", UNIPHIER_PIN_IECTRL_NONE, - 109, UNIPHIER_PIN_DRV_4_8, + 109, UNIPHIER_PIN_DRV_1BIT, 109, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(116, "SCLKM", UNIPHIER_PIN_IECTRL_NONE, - 110, UNIPHIER_PIN_DRV_4_8, + 110, UNIPHIER_PIN_DRV_1BIT, 110, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(117, "SBMTP", UNIPHIER_PIN_IECTRL_NONE, - 111, UNIPHIER_PIN_DRV_4_8, + 111, UNIPHIER_PIN_DRV_1BIT, 111, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(118, "SBPTM", UNIPHIER_PIN_IECTRL_NONE, - 112, UNIPHIER_PIN_DRV_4_8, + 112, UNIPHIER_PIN_DRV_1BIT, 112, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(119, "XMPREQ", UNIPHIER_PIN_IECTRL_NONE, - 113, UNIPHIER_PIN_DRV_4_8, + 113, UNIPHIER_PIN_DRV_1BIT, 113, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(120, "XINTP", UNIPHIER_PIN_IECTRL_NONE, - 114, UNIPHIER_PIN_DRV_4_8, + 114, UNIPHIER_PIN_DRV_1BIT, 114, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(121, "LPST", UNIPHIER_PIN_IECTRL_NONE, - 115, UNIPHIER_PIN_DRV_4_8, + 115, UNIPHIER_PIN_DRV_1BIT, 115, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(122, "SDBOOT", UNIPHIER_PIN_IECTRL_NONE, - 116, UNIPHIER_PIN_DRV_4_8, + 116, UNIPHIER_PIN_DRV_1BIT, 116, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(123, "BFAIL", UNIPHIER_PIN_IECTRL_NONE, - 117, UNIPHIER_PIN_DRV_4_8, + 117, UNIPHIER_PIN_DRV_1BIT, 117, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(124, "XFWE", UNIPHIER_PIN_IECTRL_NONE, - 118, UNIPHIER_PIN_DRV_4_8, + 118, UNIPHIER_PIN_DRV_1BIT, 118, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(125, "RF_COM_RDY", UNIPHIER_PIN_IECTRL_NONE, - 119, UNIPHIER_PIN_DRV_4_8, + 119, UNIPHIER_PIN_DRV_1BIT, 119, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(126, "XDIAG0", UNIPHIER_PIN_IECTRL_NONE, - 120, UNIPHIER_PIN_DRV_4_8, + 120, UNIPHIER_PIN_DRV_1BIT, 120, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(127, "RXD0", UNIPHIER_PIN_IECTRL_NONE, - 121, UNIPHIER_PIN_DRV_4_8, + 121, UNIPHIER_PIN_DRV_1BIT, 121, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(128, "TXD0", UNIPHIER_PIN_IECTRL_NONE, - 122, UNIPHIER_PIN_DRV_4_8, + 122, UNIPHIER_PIN_DRV_1BIT, 122, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(129, "RXD1", UNIPHIER_PIN_IECTRL_NONE, - 123, UNIPHIER_PIN_DRV_4_8, + 123, UNIPHIER_PIN_DRV_1BIT, 123, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(130, "TXD1", UNIPHIER_PIN_IECTRL_NONE, - 124, UNIPHIER_PIN_DRV_4_8, + 124, UNIPHIER_PIN_DRV_1BIT, 124, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(131, "RXD2", UNIPHIER_PIN_IECTRL_NONE, - 125, UNIPHIER_PIN_DRV_4_8, + 125, UNIPHIER_PIN_DRV_1BIT, 125, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(132, "TXD2", UNIPHIER_PIN_IECTRL_NONE, - 126, UNIPHIER_PIN_DRV_4_8, + 126, UNIPHIER_PIN_DRV_1BIT, 126, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(133, "SS0CS", UNIPHIER_PIN_IECTRL_NONE, - 127, UNIPHIER_PIN_DRV_4_8, + 127, UNIPHIER_PIN_DRV_1BIT, 127, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(134, "SS0CLK", UNIPHIER_PIN_IECTRL_NONE, - 128, UNIPHIER_PIN_DRV_4_8, + 128, UNIPHIER_PIN_DRV_1BIT, 128, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(135, "SS0DO", UNIPHIER_PIN_IECTRL_NONE, - 129, UNIPHIER_PIN_DRV_4_8, + 129, UNIPHIER_PIN_DRV_1BIT, 129, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(136, "SS0DI", UNIPHIER_PIN_IECTRL_NONE, - 130, UNIPHIER_PIN_DRV_4_8, + 130, UNIPHIER_PIN_DRV_1BIT, 130, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(137, "MS0CS0", UNIPHIER_PIN_IECTRL_NONE, - 131, UNIPHIER_PIN_DRV_4_8, + 131, UNIPHIER_PIN_DRV_1BIT, 131, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(138, "MS0CLK", UNIPHIER_PIN_IECTRL_NONE, - 132, UNIPHIER_PIN_DRV_4_8, + 132, UNIPHIER_PIN_DRV_1BIT, 132, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(139, "MS0DI", UNIPHIER_PIN_IECTRL_NONE, - 133, UNIPHIER_PIN_DRV_4_8, + 133, UNIPHIER_PIN_DRV_1BIT, 133, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(140, "MS0DO", UNIPHIER_PIN_IECTRL_NONE, - 134, UNIPHIER_PIN_DRV_4_8, + 134, UNIPHIER_PIN_DRV_1BIT, 134, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(141, "XMDMRST", UNIPHIER_PIN_IECTRL_NONE, - 135, UNIPHIER_PIN_DRV_4_8, + 135, UNIPHIER_PIN_DRV_1BIT, 135, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(142, "SCL0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(143, "SDA0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(144, "SCL1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(145, "SDA1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(146, "SCL2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(147, "SDA2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(148, "SCL3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(149, "SDA3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(150, "SD0DAT0", UNIPHIER_PIN_IECTRL_NONE, - 12, UNIPHIER_PIN_DRV_8_12_16_20, + 12, UNIPHIER_PIN_DRV_2BIT, 136, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(151, "SD0DAT1", UNIPHIER_PIN_IECTRL_NONE, - 13, UNIPHIER_PIN_DRV_8_12_16_20, + 13, UNIPHIER_PIN_DRV_2BIT, 137, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(152, "SD0DAT2", UNIPHIER_PIN_IECTRL_NONE, - 14, UNIPHIER_PIN_DRV_8_12_16_20, + 14, UNIPHIER_PIN_DRV_2BIT, 138, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(153, "SD0DAT3", UNIPHIER_PIN_IECTRL_NONE, - 15, UNIPHIER_PIN_DRV_8_12_16_20, + 15, UNIPHIER_PIN_DRV_2BIT, 139, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(154, "SD0CMD", UNIPHIER_PIN_IECTRL_NONE, - 11, UNIPHIER_PIN_DRV_8_12_16_20, + 11, UNIPHIER_PIN_DRV_2BIT, 141, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(155, "SD0CLK", UNIPHIER_PIN_IECTRL_NONE, - 10, UNIPHIER_PIN_DRV_8_12_16_20, + 10, UNIPHIER_PIN_DRV_2BIT, 140, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(156, "SD0CD", UNIPHIER_PIN_IECTRL_NONE, - 142, UNIPHIER_PIN_DRV_4_8, + 142, UNIPHIER_PIN_DRV_1BIT, 142, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(157, "SD0WP", UNIPHIER_PIN_IECTRL_NONE, - 143, UNIPHIER_PIN_DRV_4_8, + 143, UNIPHIER_PIN_DRV_1BIT, 143, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(158, "SD0VTCG", UNIPHIER_PIN_IECTRL_NONE, - 144, UNIPHIER_PIN_DRV_4_8, + 144, UNIPHIER_PIN_DRV_1BIT, 144, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(159, "CK25O", UNIPHIER_PIN_IECTRL_NONE, - 145, UNIPHIER_PIN_DRV_4_8, + 145, UNIPHIER_PIN_DRV_1BIT, 145, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(160, "RGMII_TXCLK", 6, - 146, UNIPHIER_PIN_DRV_4_8, + 146, UNIPHIER_PIN_DRV_1BIT, 146, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(161, "RGMII_TXD0", 6, - 147, UNIPHIER_PIN_DRV_4_8, + 147, UNIPHIER_PIN_DRV_1BIT, 147, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(162, "RGMII_TXD1", 6, - 148, UNIPHIER_PIN_DRV_4_8, + 148, UNIPHIER_PIN_DRV_1BIT, 148, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(163, "RGMII_TXD2", 6, - 149, UNIPHIER_PIN_DRV_4_8, + 149, UNIPHIER_PIN_DRV_1BIT, 149, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(164, "RGMII_TXD3", 6, - 150, UNIPHIER_PIN_DRV_4_8, + 150, UNIPHIER_PIN_DRV_1BIT, 150, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(165, "RGMII_TXCTL", 6, - 151, UNIPHIER_PIN_DRV_4_8, + 151, UNIPHIER_PIN_DRV_1BIT, 151, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(166, "MII_TXER", UNIPHIER_PIN_IECTRL_NONE, - 152, UNIPHIER_PIN_DRV_4_8, + 152, UNIPHIER_PIN_DRV_1BIT, 152, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(167, "RGMII_RXCLK", 6, - 153, UNIPHIER_PIN_DRV_4_8, + 153, UNIPHIER_PIN_DRV_1BIT, 153, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(168, "RGMII_RXD0", 6, - 154, UNIPHIER_PIN_DRV_4_8, + 154, UNIPHIER_PIN_DRV_1BIT, 154, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(169, "RGMII_RXD1", 6, - 155, UNIPHIER_PIN_DRV_4_8, + 155, UNIPHIER_PIN_DRV_1BIT, 155, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(170, "RGMII_RXD2", 6, - 156, UNIPHIER_PIN_DRV_4_8, + 156, UNIPHIER_PIN_DRV_1BIT, 156, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(171, "RGMII_RXD3", 6, - 157, UNIPHIER_PIN_DRV_4_8, + 157, UNIPHIER_PIN_DRV_1BIT, 157, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(172, "RGMII_RXCTL", 6, - 158, UNIPHIER_PIN_DRV_4_8, + 158, UNIPHIER_PIN_DRV_1BIT, 158, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(173, "MII_RXER", 6, - 159, UNIPHIER_PIN_DRV_4_8, + 159, UNIPHIER_PIN_DRV_1BIT, 159, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(174, "MII_CRS", 6, - 160, UNIPHIER_PIN_DRV_4_8, + 160, UNIPHIER_PIN_DRV_1BIT, 160, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(175, "MII_COL", 6, - 161, UNIPHIER_PIN_DRV_4_8, + 161, UNIPHIER_PIN_DRV_1BIT, 161, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(176, "MDC", 6, - 162, UNIPHIER_PIN_DRV_4_8, + 162, UNIPHIER_PIN_DRV_1BIT, 162, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(177, "MDIO", 6, - 163, UNIPHIER_PIN_DRV_4_8, + 163, UNIPHIER_PIN_DRV_1BIT, 163, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(178, "MDIO_INTL", 6, - 164, UNIPHIER_PIN_DRV_4_8, + 164, UNIPHIER_PIN_DRV_1BIT, 164, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(179, "XETH_RST", 6, - 165, UNIPHIER_PIN_DRV_4_8, + 165, UNIPHIER_PIN_DRV_1BIT, 165, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(180, "USB0VBUS", UNIPHIER_PIN_IECTRL_NONE, - 166, UNIPHIER_PIN_DRV_4_8, + 166, UNIPHIER_PIN_DRV_1BIT, 166, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(181, "USB0OD", UNIPHIER_PIN_IECTRL_NONE, - 167, UNIPHIER_PIN_DRV_4_8, + 167, UNIPHIER_PIN_DRV_1BIT, 167, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(182, "USB1VBUS", UNIPHIER_PIN_IECTRL_NONE, - 168, UNIPHIER_PIN_DRV_4_8, + 168, UNIPHIER_PIN_DRV_1BIT, 168, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(183, "USB1OD", UNIPHIER_PIN_IECTRL_NONE, - 169, UNIPHIER_PIN_DRV_4_8, + 169, UNIPHIER_PIN_DRV_1BIT, 169, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(184, "USB2VBUS", UNIPHIER_PIN_IECTRL_NONE, - 170, UNIPHIER_PIN_DRV_4_8, + 170, UNIPHIER_PIN_DRV_1BIT, 170, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(185, "USB2OD", UNIPHIER_PIN_IECTRL_NONE, - 171, UNIPHIER_PIN_DRV_4_8, + 171, UNIPHIER_PIN_DRV_1BIT, 171, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(186, "USB2ID", UNIPHIER_PIN_IECTRL_NONE, - 172, UNIPHIER_PIN_DRV_4_8, + 172, UNIPHIER_PIN_DRV_1BIT, 172, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(187, "USB3VBUS", UNIPHIER_PIN_IECTRL_NONE, - 173, UNIPHIER_PIN_DRV_4_8, + 173, UNIPHIER_PIN_DRV_1BIT, 173, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(188, "USB3OD", UNIPHIER_PIN_IECTRL_NONE, - 174, UNIPHIER_PIN_DRV_4_8, + 174, UNIPHIER_PIN_DRV_1BIT, 174, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(189, "LINKCLK", UNIPHIER_PIN_IECTRL_NONE, - 175, UNIPHIER_PIN_DRV_4_8, + 175, UNIPHIER_PIN_DRV_1BIT, 175, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(190, "LINKREQ", UNIPHIER_PIN_IECTRL_NONE, - 176, UNIPHIER_PIN_DRV_4_8, + 176, UNIPHIER_PIN_DRV_1BIT, 176, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(191, "LINKCTL0", UNIPHIER_PIN_IECTRL_NONE, - 177, UNIPHIER_PIN_DRV_4_8, + 177, UNIPHIER_PIN_DRV_1BIT, 177, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(192, "LINKCTL1", UNIPHIER_PIN_IECTRL_NONE, - 178, UNIPHIER_PIN_DRV_4_8, + 178, UNIPHIER_PIN_DRV_1BIT, 178, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(193, "LINKDT0", UNIPHIER_PIN_IECTRL_NONE, - 179, UNIPHIER_PIN_DRV_4_8, + 179, UNIPHIER_PIN_DRV_1BIT, 179, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(194, "LINKDT1", UNIPHIER_PIN_IECTRL_NONE, - 180, UNIPHIER_PIN_DRV_4_8, + 180, UNIPHIER_PIN_DRV_1BIT, 180, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(195, "LINKDT2", UNIPHIER_PIN_IECTRL_NONE, - 181, UNIPHIER_PIN_DRV_4_8, + 181, UNIPHIER_PIN_DRV_1BIT, 181, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(196, "LINKDT3", UNIPHIER_PIN_IECTRL_NONE, - 182, UNIPHIER_PIN_DRV_4_8, + 182, UNIPHIER_PIN_DRV_1BIT, 182, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(197, "LINKDT4", UNIPHIER_PIN_IECTRL_NONE, - 183, UNIPHIER_PIN_DRV_4_8, + 183, UNIPHIER_PIN_DRV_1BIT, 183, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(198, "LINKDT5", UNIPHIER_PIN_IECTRL_NONE, - 184, UNIPHIER_PIN_DRV_4_8, + 184, UNIPHIER_PIN_DRV_1BIT, 184, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(199, "LINKDT6", UNIPHIER_PIN_IECTRL_NONE, - 185, UNIPHIER_PIN_DRV_4_8, + 185, UNIPHIER_PIN_DRV_1BIT, 185, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(200, "LINKDT7", UNIPHIER_PIN_IECTRL_NONE, - 186, UNIPHIER_PIN_DRV_4_8, + 186, UNIPHIER_PIN_DRV_1BIT, 186, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(201, "CKDVO", UNIPHIER_PIN_IECTRL_NONE, - 187, UNIPHIER_PIN_DRV_4_8, + 187, UNIPHIER_PIN_DRV_1BIT, 187, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(202, "PHY_PD", UNIPHIER_PIN_IECTRL_NONE, - 188, UNIPHIER_PIN_DRV_4_8, + 188, UNIPHIER_PIN_DRV_1BIT, 188, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(203, "X1394_RST", UNIPHIER_PIN_IECTRL_NONE, - 189, UNIPHIER_PIN_DRV_4_8, + 189, UNIPHIER_PIN_DRV_1BIT, 189, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(204, "VOUT_MUTE_L", UNIPHIER_PIN_IECTRL_NONE, - 190, UNIPHIER_PIN_DRV_4_8, + 190, UNIPHIER_PIN_DRV_1BIT, 190, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(205, "CLK54O", UNIPHIER_PIN_IECTRL_NONE, - 191, UNIPHIER_PIN_DRV_4_8, + 191, UNIPHIER_PIN_DRV_1BIT, 191, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(206, "CLK54I", UNIPHIER_PIN_IECTRL_NONE, - 192, UNIPHIER_PIN_DRV_NONE, + -1, UNIPHIER_PIN_DRV_NONE, 192, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(207, "YIN0", UNIPHIER_PIN_IECTRL_NONE, - 193, UNIPHIER_PIN_DRV_4_8, + 193, UNIPHIER_PIN_DRV_1BIT, 193, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(208, "YIN1", UNIPHIER_PIN_IECTRL_NONE, - 194, UNIPHIER_PIN_DRV_4_8, + 194, UNIPHIER_PIN_DRV_1BIT, 194, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(209, "YIN2", UNIPHIER_PIN_IECTRL_NONE, - 195, UNIPHIER_PIN_DRV_4_8, + 195, UNIPHIER_PIN_DRV_1BIT, 195, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(210, "YIN3", UNIPHIER_PIN_IECTRL_NONE, - 196, UNIPHIER_PIN_DRV_4_8, + 196, UNIPHIER_PIN_DRV_1BIT, 196, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(211, "YIN4", UNIPHIER_PIN_IECTRL_NONE, - 197, UNIPHIER_PIN_DRV_4_8, + 197, UNIPHIER_PIN_DRV_1BIT, 197, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(212, "YIN5", UNIPHIER_PIN_IECTRL_NONE, - 198, UNIPHIER_PIN_DRV_4_8, + 198, UNIPHIER_PIN_DRV_1BIT, 198, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(213, "CIN0", UNIPHIER_PIN_IECTRL_NONE, - 199, UNIPHIER_PIN_DRV_4_8, + 199, UNIPHIER_PIN_DRV_1BIT, 199, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(214, "CIN1", UNIPHIER_PIN_IECTRL_NONE, - 200, UNIPHIER_PIN_DRV_4_8, + 200, UNIPHIER_PIN_DRV_1BIT, 200, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(215, "CIN2", UNIPHIER_PIN_IECTRL_NONE, - 201, UNIPHIER_PIN_DRV_4_8, + 201, UNIPHIER_PIN_DRV_1BIT, 201, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(216, "CIN3", UNIPHIER_PIN_IECTRL_NONE, - 202, UNIPHIER_PIN_DRV_4_8, + 202, UNIPHIER_PIN_DRV_1BIT, 202, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(217, "CIN4", UNIPHIER_PIN_IECTRL_NONE, - 203, UNIPHIER_PIN_DRV_4_8, + 203, UNIPHIER_PIN_DRV_1BIT, 203, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(218, "CIN5", UNIPHIER_PIN_IECTRL_NONE, - 204, UNIPHIER_PIN_DRV_4_8, + 204, UNIPHIER_PIN_DRV_1BIT, 204, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(219, "GCP", UNIPHIER_PIN_IECTRL_NONE, - 205, UNIPHIER_PIN_DRV_4_8, + 205, UNIPHIER_PIN_DRV_1BIT, 205, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(220, "ADFLG", UNIPHIER_PIN_IECTRL_NONE, - 206, UNIPHIER_PIN_DRV_4_8, + 206, UNIPHIER_PIN_DRV_1BIT, 206, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(221, "CK27AIOF", UNIPHIER_PIN_IECTRL_NONE, - 207, UNIPHIER_PIN_DRV_4_8, + 207, UNIPHIER_PIN_DRV_1BIT, 207, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(222, "DACOUT", UNIPHIER_PIN_IECTRL_NONE, - 208, UNIPHIER_PIN_DRV_4_8, + 208, UNIPHIER_PIN_DRV_1BIT, 208, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(223, "DAFLG", UNIPHIER_PIN_IECTRL_NONE, - 209, UNIPHIER_PIN_DRV_4_8, + 209, UNIPHIER_PIN_DRV_1BIT, 209, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(224, "VBIH", UNIPHIER_PIN_IECTRL_NONE, - 210, UNIPHIER_PIN_DRV_4_8, + 210, UNIPHIER_PIN_DRV_1BIT, 210, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(225, "VBIL", UNIPHIER_PIN_IECTRL_NONE, - 211, UNIPHIER_PIN_DRV_4_8, + 211, UNIPHIER_PIN_DRV_1BIT, 211, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(226, "XSUB_RST", UNIPHIER_PIN_IECTRL_NONE, - 212, UNIPHIER_PIN_DRV_4_8, + 212, UNIPHIER_PIN_DRV_1BIT, 212, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(227, "XADC_PD", UNIPHIER_PIN_IECTRL_NONE, - 213, UNIPHIER_PIN_DRV_4_8, + 213, UNIPHIER_PIN_DRV_1BIT, 213, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(228, "AI1ADCCK", UNIPHIER_PIN_IECTRL_NONE, - 214, UNIPHIER_PIN_DRV_4_8, + 214, UNIPHIER_PIN_DRV_1BIT, 214, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(229, "AI1BCK", UNIPHIER_PIN_IECTRL_NONE, - 215, UNIPHIER_PIN_DRV_4_8, + 215, UNIPHIER_PIN_DRV_1BIT, 215, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(230, "AI1LRCK", UNIPHIER_PIN_IECTRL_NONE, - 216, UNIPHIER_PIN_DRV_4_8, + 216, UNIPHIER_PIN_DRV_1BIT, 216, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(231, "AI1DMIX", UNIPHIER_PIN_IECTRL_NONE, - 217, UNIPHIER_PIN_DRV_4_8, + 217, UNIPHIER_PIN_DRV_1BIT, 217, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(232, "CK27HD", UNIPHIER_PIN_IECTRL_NONE, - 218, UNIPHIER_PIN_DRV_4_8, + 218, UNIPHIER_PIN_DRV_1BIT, 218, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(233, "XHD_RST", UNIPHIER_PIN_IECTRL_NONE, - 219, UNIPHIER_PIN_DRV_4_8, + 219, UNIPHIER_PIN_DRV_1BIT, 219, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(234, "INTHD", UNIPHIER_PIN_IECTRL_NONE, - 220, UNIPHIER_PIN_DRV_4_8, + 220, UNIPHIER_PIN_DRV_1BIT, 220, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(235, "VO1HDCK", UNIPHIER_PIN_IECTRL_NONE, - 221, UNIPHIER_PIN_DRV_4_8, + 221, UNIPHIER_PIN_DRV_1BIT, 221, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(236, "VO1HSYNC", UNIPHIER_PIN_IECTRL_NONE, - 222, UNIPHIER_PIN_DRV_4_8, + 222, UNIPHIER_PIN_DRV_1BIT, 222, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(237, "VO1VSYNC", UNIPHIER_PIN_IECTRL_NONE, - 223, UNIPHIER_PIN_DRV_4_8, + 223, UNIPHIER_PIN_DRV_1BIT, 223, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(238, "VO1DE", UNIPHIER_PIN_IECTRL_NONE, - 224, UNIPHIER_PIN_DRV_4_8, + 224, UNIPHIER_PIN_DRV_1BIT, 224, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(239, "VO1Y0", UNIPHIER_PIN_IECTRL_NONE, - 225, UNIPHIER_PIN_DRV_4_8, + 225, UNIPHIER_PIN_DRV_1BIT, 225, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(240, "VO1Y1", UNIPHIER_PIN_IECTRL_NONE, - 226, UNIPHIER_PIN_DRV_4_8, + 226, UNIPHIER_PIN_DRV_1BIT, 226, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(241, "VO1Y2", UNIPHIER_PIN_IECTRL_NONE, - 227, UNIPHIER_PIN_DRV_4_8, + 227, UNIPHIER_PIN_DRV_1BIT, 227, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(242, "VO1Y3", UNIPHIER_PIN_IECTRL_NONE, - 228, UNIPHIER_PIN_DRV_4_8, + 228, UNIPHIER_PIN_DRV_1BIT, 228, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(243, "VO1Y4", UNIPHIER_PIN_IECTRL_NONE, - 229, UNIPHIER_PIN_DRV_4_8, + 229, UNIPHIER_PIN_DRV_1BIT, 229, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(244, "VO1Y5", UNIPHIER_PIN_IECTRL_NONE, - 230, UNIPHIER_PIN_DRV_4_8, + 230, UNIPHIER_PIN_DRV_1BIT, 230, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(245, "VO1Y6", UNIPHIER_PIN_IECTRL_NONE, - 231, UNIPHIER_PIN_DRV_4_8, + 231, UNIPHIER_PIN_DRV_1BIT, 231, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(246, "VO1Y7", UNIPHIER_PIN_IECTRL_NONE, - 232, UNIPHIER_PIN_DRV_4_8, + 232, UNIPHIER_PIN_DRV_1BIT, 232, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(247, "VO1Y8", UNIPHIER_PIN_IECTRL_NONE, - 233, UNIPHIER_PIN_DRV_4_8, + 233, UNIPHIER_PIN_DRV_1BIT, 233, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(248, "VO1Y9", UNIPHIER_PIN_IECTRL_NONE, - 234, UNIPHIER_PIN_DRV_4_8, + 234, UNIPHIER_PIN_DRV_1BIT, 234, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(249, "VO1Y10", UNIPHIER_PIN_IECTRL_NONE, - 235, UNIPHIER_PIN_DRV_4_8, + 235, UNIPHIER_PIN_DRV_1BIT, 235, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(250, "VO1Y11", UNIPHIER_PIN_IECTRL_NONE, - 236, UNIPHIER_PIN_DRV_4_8, + 236, UNIPHIER_PIN_DRV_1BIT, 236, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(251, "VO1CB0", UNIPHIER_PIN_IECTRL_NONE, - 237, UNIPHIER_PIN_DRV_4_8, + 237, UNIPHIER_PIN_DRV_1BIT, 237, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(252, "VO1CB1", UNIPHIER_PIN_IECTRL_NONE, - 238, UNIPHIER_PIN_DRV_4_8, + 238, UNIPHIER_PIN_DRV_1BIT, 238, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(253, "VO1CB2", UNIPHIER_PIN_IECTRL_NONE, - 239, UNIPHIER_PIN_DRV_4_8, + 239, UNIPHIER_PIN_DRV_1BIT, 239, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(254, "VO1CB3", UNIPHIER_PIN_IECTRL_NONE, - 240, UNIPHIER_PIN_DRV_4_8, + 240, UNIPHIER_PIN_DRV_1BIT, 240, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(255, "VO1CB4", UNIPHIER_PIN_IECTRL_NONE, - 241, UNIPHIER_PIN_DRV_4_8, + 241, UNIPHIER_PIN_DRV_1BIT, 241, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(256, "VO1CB5", UNIPHIER_PIN_IECTRL_NONE, - 242, UNIPHIER_PIN_DRV_4_8, + 242, UNIPHIER_PIN_DRV_1BIT, 242, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(257, "VO1CB6", UNIPHIER_PIN_IECTRL_NONE, - 243, UNIPHIER_PIN_DRV_4_8, + 243, UNIPHIER_PIN_DRV_1BIT, 243, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(258, "VO1CB7", UNIPHIER_PIN_IECTRL_NONE, - 244, UNIPHIER_PIN_DRV_4_8, + 244, UNIPHIER_PIN_DRV_1BIT, 244, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(259, "VO1CB8", UNIPHIER_PIN_IECTRL_NONE, - 245, UNIPHIER_PIN_DRV_4_8, + 245, UNIPHIER_PIN_DRV_1BIT, 245, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(260, "VO1CB9", UNIPHIER_PIN_IECTRL_NONE, - 246, UNIPHIER_PIN_DRV_4_8, + 246, UNIPHIER_PIN_DRV_1BIT, 246, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(261, "VO1CB10", UNIPHIER_PIN_IECTRL_NONE, - 247, UNIPHIER_PIN_DRV_4_8, + 247, UNIPHIER_PIN_DRV_1BIT, 247, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(262, "VO1CB11", UNIPHIER_PIN_IECTRL_NONE, - 248, UNIPHIER_PIN_DRV_4_8, + 248, UNIPHIER_PIN_DRV_1BIT, 248, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(263, "VO1CR0", UNIPHIER_PIN_IECTRL_NONE, - 249, UNIPHIER_PIN_DRV_4_8, + 249, UNIPHIER_PIN_DRV_1BIT, 249, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(264, "VO1CR1", UNIPHIER_PIN_IECTRL_NONE, - 250, UNIPHIER_PIN_DRV_4_8, + 250, UNIPHIER_PIN_DRV_1BIT, 250, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(265, "VO1CR2", UNIPHIER_PIN_IECTRL_NONE, - 251, UNIPHIER_PIN_DRV_4_8, + 251, UNIPHIER_PIN_DRV_1BIT, 251, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(266, "VO1CR3", UNIPHIER_PIN_IECTRL_NONE, - 252, UNIPHIER_PIN_DRV_4_8, + 252, UNIPHIER_PIN_DRV_1BIT, 252, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(267, "VO1CR4", UNIPHIER_PIN_IECTRL_NONE, - 253, UNIPHIER_PIN_DRV_4_8, + 253, UNIPHIER_PIN_DRV_1BIT, 253, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(268, "VO1CR5", UNIPHIER_PIN_IECTRL_NONE, - 254, UNIPHIER_PIN_DRV_4_8, + 254, UNIPHIER_PIN_DRV_1BIT, 254, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(269, "VO1CR6", UNIPHIER_PIN_IECTRL_NONE, - 255, UNIPHIER_PIN_DRV_4_8, + 255, UNIPHIER_PIN_DRV_1BIT, 255, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(270, "VO1CR7", UNIPHIER_PIN_IECTRL_NONE, - 256, UNIPHIER_PIN_DRV_4_8, + 256, UNIPHIER_PIN_DRV_1BIT, 256, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(271, "VO1CR8", UNIPHIER_PIN_IECTRL_NONE, - 257, UNIPHIER_PIN_DRV_4_8, + 257, UNIPHIER_PIN_DRV_1BIT, 257, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(272, "VO1CR9", UNIPHIER_PIN_IECTRL_NONE, - 258, UNIPHIER_PIN_DRV_4_8, + 258, UNIPHIER_PIN_DRV_1BIT, 258, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(273, "VO1CR10", UNIPHIER_PIN_IECTRL_NONE, - 259, UNIPHIER_PIN_DRV_4_8, + 259, UNIPHIER_PIN_DRV_1BIT, 259, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(274, "VO1CR11", UNIPHIER_PIN_IECTRL_NONE, - 260, UNIPHIER_PIN_DRV_4_8, + 260, UNIPHIER_PIN_DRV_1BIT, 260, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(275, "VO1EX0", UNIPHIER_PIN_IECTRL_NONE, - 261, UNIPHIER_PIN_DRV_4_8, + 261, UNIPHIER_PIN_DRV_1BIT, 261, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(276, "VO1EX1", UNIPHIER_PIN_IECTRL_NONE, - 262, UNIPHIER_PIN_DRV_4_8, + 262, UNIPHIER_PIN_DRV_1BIT, 262, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(277, "VO1EX2", UNIPHIER_PIN_IECTRL_NONE, - 263, UNIPHIER_PIN_DRV_4_8, + 263, UNIPHIER_PIN_DRV_1BIT, 263, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(278, "VO1EX3", UNIPHIER_PIN_IECTRL_NONE, - 264, UNIPHIER_PIN_DRV_4_8, + 264, UNIPHIER_PIN_DRV_1BIT, 264, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(279, "VEXCKA", UNIPHIER_PIN_IECTRL_NONE, - 265, UNIPHIER_PIN_DRV_4_8, + 265, UNIPHIER_PIN_DRV_1BIT, 265, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(280, "VSEL0", UNIPHIER_PIN_IECTRL_NONE, - 266, UNIPHIER_PIN_DRV_4_8, + 266, UNIPHIER_PIN_DRV_1BIT, 266, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(281, "VSEL1", UNIPHIER_PIN_IECTRL_NONE, - 267, UNIPHIER_PIN_DRV_4_8, + 267, UNIPHIER_PIN_DRV_1BIT, 267, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(282, "AO1DACCK", UNIPHIER_PIN_IECTRL_NONE, - 268, UNIPHIER_PIN_DRV_4_8, + 268, UNIPHIER_PIN_DRV_1BIT, 268, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(283, "AO1BCK", UNIPHIER_PIN_IECTRL_NONE, - 269, UNIPHIER_PIN_DRV_4_8, + 269, UNIPHIER_PIN_DRV_1BIT, 269, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(284, "AO1LRCK", UNIPHIER_PIN_IECTRL_NONE, - 270, UNIPHIER_PIN_DRV_4_8, + 270, UNIPHIER_PIN_DRV_1BIT, 270, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(285, "AO1D0", UNIPHIER_PIN_IECTRL_NONE, - 271, UNIPHIER_PIN_DRV_4_8, + 271, UNIPHIER_PIN_DRV_1BIT, 271, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(286, "AO1D1", UNIPHIER_PIN_IECTRL_NONE, - 272, UNIPHIER_PIN_DRV_4_8, + 272, UNIPHIER_PIN_DRV_1BIT, 272, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(287, "AO1D2", UNIPHIER_PIN_IECTRL_NONE, - 273, UNIPHIER_PIN_DRV_4_8, + 273, UNIPHIER_PIN_DRV_1BIT, 273, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(288, "AO1D3", UNIPHIER_PIN_IECTRL_NONE, - 274, UNIPHIER_PIN_DRV_4_8, + 274, UNIPHIER_PIN_DRV_1BIT, 274, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(289, "AO1IEC", UNIPHIER_PIN_IECTRL_NONE, - 275, UNIPHIER_PIN_DRV_4_8, + 275, UNIPHIER_PIN_DRV_1BIT, 275, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(290, "XDAC_PD", UNIPHIER_PIN_IECTRL_NONE, - 276, UNIPHIER_PIN_DRV_4_8, + 276, UNIPHIER_PIN_DRV_1BIT, 276, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(291, "EX_A_MUTE", UNIPHIER_PIN_IECTRL_NONE, - 277, UNIPHIER_PIN_DRV_4_8, + 277, UNIPHIER_PIN_DRV_1BIT, 277, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(292, "AO2DACCK", UNIPHIER_PIN_IECTRL_NONE, - 278, UNIPHIER_PIN_DRV_4_8, + 278, UNIPHIER_PIN_DRV_1BIT, 278, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(293, "AO2BCK", UNIPHIER_PIN_IECTRL_NONE, - 279, UNIPHIER_PIN_DRV_4_8, + 279, UNIPHIER_PIN_DRV_1BIT, 279, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(294, "AO2LRCK", UNIPHIER_PIN_IECTRL_NONE, - 280, UNIPHIER_PIN_DRV_4_8, + 280, UNIPHIER_PIN_DRV_1BIT, 280, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(295, "AO2DMIX", UNIPHIER_PIN_IECTRL_NONE, - 281, UNIPHIER_PIN_DRV_4_8, + 281, UNIPHIER_PIN_DRV_1BIT, 281, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(296, "AO2IEC", UNIPHIER_PIN_IECTRL_NONE, - 282, UNIPHIER_PIN_DRV_4_8, + 282, UNIPHIER_PIN_DRV_1BIT, 282, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(297, "HTHPD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_5, + -1, UNIPHIER_PIN_DRV_FIXED5, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(298, "HTSCL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_5, + -1, UNIPHIER_PIN_DRV_FIXED5, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(299, "HTSDA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_5, + -1, UNIPHIER_PIN_DRV_FIXED5, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(300, "PORT00", UNIPHIER_PIN_IECTRL_NONE, - 284, UNIPHIER_PIN_DRV_4_8, + 284, UNIPHIER_PIN_DRV_1BIT, 284, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(301, "PORT01", UNIPHIER_PIN_IECTRL_NONE, - 285, UNIPHIER_PIN_DRV_4_8, + 285, UNIPHIER_PIN_DRV_1BIT, 285, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(302, "PORT02", UNIPHIER_PIN_IECTRL_NONE, - 286, UNIPHIER_PIN_DRV_4_8, + 286, UNIPHIER_PIN_DRV_1BIT, 286, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(303, "PORT03", UNIPHIER_PIN_IECTRL_NONE, - 287, UNIPHIER_PIN_DRV_4_8, + 287, UNIPHIER_PIN_DRV_1BIT, 287, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(304, "PORT04", UNIPHIER_PIN_IECTRL_NONE, - 288, UNIPHIER_PIN_DRV_4_8, + 288, UNIPHIER_PIN_DRV_1BIT, 288, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(305, "PORT05", UNIPHIER_PIN_IECTRL_NONE, - 289, UNIPHIER_PIN_DRV_4_8, + 289, UNIPHIER_PIN_DRV_1BIT, 289, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(306, "PORT06", UNIPHIER_PIN_IECTRL_NONE, - 290, UNIPHIER_PIN_DRV_4_8, + 290, UNIPHIER_PIN_DRV_1BIT, 290, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(307, "PORT07", UNIPHIER_PIN_IECTRL_NONE, - 291, UNIPHIER_PIN_DRV_4_8, + 291, UNIPHIER_PIN_DRV_1BIT, 291, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(308, "PORT10", UNIPHIER_PIN_IECTRL_NONE, - 292, UNIPHIER_PIN_DRV_4_8, + 292, UNIPHIER_PIN_DRV_1BIT, 292, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(309, "PORT11", UNIPHIER_PIN_IECTRL_NONE, - 293, UNIPHIER_PIN_DRV_4_8, + 293, UNIPHIER_PIN_DRV_1BIT, 293, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(310, "PORT12", UNIPHIER_PIN_IECTRL_NONE, - 294, UNIPHIER_PIN_DRV_4_8, + 294, UNIPHIER_PIN_DRV_1BIT, 294, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(311, "PORT13", UNIPHIER_PIN_IECTRL_NONE, - 295, UNIPHIER_PIN_DRV_4_8, + 295, UNIPHIER_PIN_DRV_1BIT, 295, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(312, "PORT14", UNIPHIER_PIN_IECTRL_NONE, - 296, UNIPHIER_PIN_DRV_4_8, + 296, UNIPHIER_PIN_DRV_1BIT, 296, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(313, "PORT15", UNIPHIER_PIN_IECTRL_NONE, - 297, UNIPHIER_PIN_DRV_4_8, + 297, UNIPHIER_PIN_DRV_1BIT, 297, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(314, "PORT16", UNIPHIER_PIN_IECTRL_NONE, - 298, UNIPHIER_PIN_DRV_4_8, + 298, UNIPHIER_PIN_DRV_1BIT, 298, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(315, "PORT17", UNIPHIER_PIN_IECTRL_NONE, - 299, UNIPHIER_PIN_DRV_4_8, + 299, UNIPHIER_PIN_DRV_1BIT, 299, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(316, "PORT20", UNIPHIER_PIN_IECTRL_NONE, - 300, UNIPHIER_PIN_DRV_4_8, + 300, UNIPHIER_PIN_DRV_1BIT, 300, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(317, "PORT21", UNIPHIER_PIN_IECTRL_NONE, - 301, UNIPHIER_PIN_DRV_4_8, + 301, UNIPHIER_PIN_DRV_1BIT, 301, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(318, "PORT22", UNIPHIER_PIN_IECTRL_NONE, - 302, UNIPHIER_PIN_DRV_4_8, + 302, UNIPHIER_PIN_DRV_1BIT, 302, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(319, "SD1DAT0", UNIPHIER_PIN_IECTRL_NONE, - 303, UNIPHIER_PIN_DRV_4_8, + 303, UNIPHIER_PIN_DRV_1BIT, 303, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(320, "SD1DAT1", UNIPHIER_PIN_IECTRL_NONE, - 304, UNIPHIER_PIN_DRV_4_8, + 304, UNIPHIER_PIN_DRV_1BIT, 304, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(321, "SD1DAT2", UNIPHIER_PIN_IECTRL_NONE, - 305, UNIPHIER_PIN_DRV_4_8, + 305, UNIPHIER_PIN_DRV_1BIT, 305, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(322, "SD1DAT3", UNIPHIER_PIN_IECTRL_NONE, - 306, UNIPHIER_PIN_DRV_4_8, + 306, UNIPHIER_PIN_DRV_1BIT, 306, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(323, "SD1CMD", UNIPHIER_PIN_IECTRL_NONE, - 307, UNIPHIER_PIN_DRV_4_8, + 307, UNIPHIER_PIN_DRV_1BIT, 307, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(324, "SD1CLK", UNIPHIER_PIN_IECTRL_NONE, - 308, UNIPHIER_PIN_DRV_4_8, + 308, UNIPHIER_PIN_DRV_1BIT, 308, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(325, "SD1CD", UNIPHIER_PIN_IECTRL_NONE, - 309, UNIPHIER_PIN_DRV_4_8, + 309, UNIPHIER_PIN_DRV_1BIT, 309, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(326, "SD1WP", UNIPHIER_PIN_IECTRL_NONE, - 310, UNIPHIER_PIN_DRV_4_8, + 310, UNIPHIER_PIN_DRV_1BIT, 310, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(327, "SD1VTCG", UNIPHIER_PIN_IECTRL_NONE, - 311, UNIPHIER_PIN_DRV_4_8, + 311, UNIPHIER_PIN_DRV_1BIT, 311, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(328, "DMDISO", UNIPHIER_PIN_IECTRL_NONE, - 312, UNIPHIER_PIN_DRV_NONE, + -1, UNIPHIER_PIN_DRV_NONE, 312, UNIPHIER_PIN_PULL_DOWN), }; static const unsigned emmc_pins[] = {40, 41, 42, 43, 51, 52, 53}; -static const unsigned emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; +static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; static const unsigned emmc_dat8_pins[] = {44, 45, 46, 47}; -static const unsigned emmc_dat8_muxvals[] = {1, 1, 1, 1}; +static const int emmc_dat8_muxvals[] = {1, 1, 1, 1}; static const unsigned i2c0_pins[] = {142, 143}; -static const unsigned i2c0_muxvals[] = {0, 0}; +static const int i2c0_muxvals[] = {0, 0}; static const unsigned i2c1_pins[] = {144, 145}; -static const unsigned i2c1_muxvals[] = {0, 0}; +static const int i2c1_muxvals[] = {0, 0}; static const unsigned i2c2_pins[] = {146, 147}; -static const unsigned i2c2_muxvals[] = {0, 0}; +static const int i2c2_muxvals[] = {0, 0}; static const unsigned i2c3_pins[] = {148, 149}; -static const unsigned i2c3_muxvals[] = {0, 0}; +static const int i2c3_muxvals[] = {0, 0}; static const unsigned i2c6_pins[] = {308, 309}; -static const unsigned i2c6_muxvals[] = {6, 6}; +static const int i2c6_muxvals[] = {6, 6}; static const unsigned nand_pins[] = {40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54}; -static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0}; +static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned nand_cs1_pins[] = {131, 132}; -static const unsigned nand_cs1_muxvals[] = {1, 1}; +static const int nand_cs1_muxvals[] = {1, 1}; static const unsigned sd_pins[] = {150, 151, 152, 153, 154, 155, 156, 157, 158}; -static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned sd1_pins[] = {319, 320, 321, 322, 323, 324, 325, 326, 327}; -static const unsigned sd1_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const int sd1_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned system_bus_pins[] = {25, 26, 27, 28, 29, 30, 31, 32, 33, + 34, 35, 36, 37, 38}; +static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0}; +static const unsigned system_bus_cs0_pins[] = {318}; +static const int system_bus_cs0_muxvals[] = {5}; +static const unsigned system_bus_cs1_pins[] = {24}; +static const int system_bus_cs1_muxvals[] = {0}; +static const unsigned system_bus_cs2_pins[] = {315}; +static const int system_bus_cs2_muxvals[] = {5}; +static const unsigned system_bus_cs3_pins[] = {313}; +static const int system_bus_cs3_muxvals[] = {5}; +static const unsigned system_bus_cs4_pins[] = {305}; +static const int system_bus_cs4_muxvals[] = {5}; +static const unsigned system_bus_cs5_pins[] = {303}; +static const int system_bus_cs5_muxvals[] = {6}; +static const unsigned system_bus_cs6_pins[] = {307}; +static const int system_bus_cs6_muxvals[] = {6}; +static const unsigned system_bus_cs7_pins[] = {312}; +static const int system_bus_cs7_muxvals[] = {6}; static const unsigned uart0_pins[] = {127, 128}; -static const unsigned uart0_muxvals[] = {0, 0}; +static const int uart0_muxvals[] = {0, 0}; static const unsigned uart1_pins[] = {129, 130}; -static const unsigned uart1_muxvals[] = {0, 0}; +static const int uart1_muxvals[] = {0, 0}; static const unsigned uart2_pins[] = {131, 132}; -static const unsigned uart2_muxvals[] = {0, 0}; +static const int uart2_muxvals[] = {0, 0}; static const unsigned uart3_pins[] = {88, 89}; -static const unsigned uart3_muxvals[] = {2, 2}; +static const int uart3_muxvals[] = {2, 2}; static const unsigned usb0_pins[] = {180, 181}; -static const unsigned usb0_muxvals[] = {0, 0}; +static const int usb0_muxvals[] = {0, 0}; static const unsigned usb1_pins[] = {182, 183}; -static const unsigned usb1_muxvals[] = {0, 0}; +static const int usb1_muxvals[] = {0, 0}; static const unsigned usb2_pins[] = {184, 185}; -static const unsigned usb2_muxvals[] = {0, 0}; +static const int usb2_muxvals[] = {0, 0}; static const unsigned usb3_pins[] = {186, 187}; -static const unsigned usb3_muxvals[] = {0, 0}; +static const int usb3_muxvals[] = {0, 0}; static const unsigned port_range0_pins[] = { 300, 301, 302, 303, 304, 305, 306, 307, /* PORT0x */ 308, 309, 310, 311, 312, 313, 314, 315, /* PORT1x */ @@ -1069,7 +1086,7 @@ static const unsigned port_range0_pins[] = { 76, 77, 78, 79, 80, 81, 82, 83, /* PORT13x */ 84, 85, 86, 87, 88, 89, 90, 91, /* PORT14x */ }; -static const unsigned port_range0_muxvals[] = { +static const int port_range0_muxvals[] = { 7, 7, 7, 7, 7, 7, 7, 7, /* PORT0x */ 7, 7, 7, 7, 7, 7, 7, 7, /* PORT1x */ 7, 7, 7, 7, 7, 7, 7, 7, /* PORT2x */ @@ -1102,7 +1119,7 @@ static const unsigned port_range1_pins[] = { 251, 252, 261, 262, 263, 264, 273, 274, /* PORT29x */ 31, 32, 33, 34, 35, 36, 37, 38, /* PORT30x */ }; -static const unsigned port_range1_muxvals[] = { +static const int port_range1_muxvals[] = { 7, 7, 7, /* PORT175-177 */ 7, 7, 7, 7, 7, 7, 7, 7, /* PORT18x */ 7, 7, 7, 7, 7, 7, 7, 7, /* PORT19x */ @@ -1123,7 +1140,7 @@ static const unsigned xirq_pins[] = { 234, 186, 99, 100, 101, 102, 184, 301, /* XIRQ8-15 */ 302, 303, 304, 305, 306, /* XIRQ16-20 */ }; -static const unsigned xirq_muxvals[] = { +static const int xirq_muxvals[] = { 7, 7, 7, 7, 7, 7, 7, 7, /* XIRQ0-7 */ 7, 7, 7, 7, 7, 7, 2, 2, /* XIRQ8-15 */ 2, 2, 2, 2, 2, /* XIRQ16-20 */ @@ -1131,11 +1148,11 @@ static const unsigned xirq_muxvals[] = { static const unsigned xirq_alternatives_pins[] = { 184, 310, 316, }; -static const unsigned xirq_alternatives_muxvals[] = { +static const int xirq_alternatives_muxvals[] = { 2, 2, 2, }; -static const struct uniphier_pinctrl_group ph1_pro4_groups[] = { +static const struct uniphier_pinctrl_group uniphier_pro4_groups[] = { UNIPHIER_PINCTRL_GROUP(emmc), UNIPHIER_PINCTRL_GROUP(emmc_dat8), UNIPHIER_PINCTRL_GROUP(i2c0), @@ -1147,6 +1164,15 @@ static const struct uniphier_pinctrl_group ph1_pro4_groups[] = { UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), UNIPHIER_PINCTRL_GROUP(sd1), + UNIPHIER_PINCTRL_GROUP(system_bus), + UNIPHIER_PINCTRL_GROUP(system_bus_cs0), + UNIPHIER_PINCTRL_GROUP(system_bus_cs1), + UNIPHIER_PINCTRL_GROUP(system_bus_cs2), + UNIPHIER_PINCTRL_GROUP(system_bus_cs3), + UNIPHIER_PINCTRL_GROUP(system_bus_cs4), + UNIPHIER_PINCTRL_GROUP(system_bus_cs5), + UNIPHIER_PINCTRL_GROUP(system_bus_cs6), + UNIPHIER_PINCTRL_GROUP(system_bus_cs7), UNIPHIER_PINCTRL_GROUP(uart0), UNIPHIER_PINCTRL_GROUP(uart1), UNIPHIER_PINCTRL_GROUP(uart2), @@ -1421,6 +1447,15 @@ static const char * const i2c6_groups[] = {"i2c6"}; static const char * const nand_groups[] = {"nand", "nand_cs1"}; static const char * const sd_groups[] = {"sd"}; static const char * const sd1_groups[] = {"sd1"}; +static const char * const system_bus_groups[] = {"system_bus", + "system_bus_cs0", + "system_bus_cs1", + "system_bus_cs2", + "system_bus_cs3", + "system_bus_cs4", + "system_bus_cs5", + "system_bus_cs6", + "system_bus_cs7"}; static const char * const uart0_groups[] = {"uart0"}; static const char * const uart1_groups[] = {"uart1"}; static const char * const uart2_groups[] = {"uart2"}; @@ -1499,7 +1534,7 @@ static const char * const xirq_groups[] = { "xirq14b", "xirq17b", "xirq18b", }; -static const struct uniphier_pinmux_function ph1_pro4_functions[] = { +static const struct uniphier_pinmux_function uniphier_pro4_functions[] = { UNIPHIER_PINMUX_FUNCTION(emmc), UNIPHIER_PINMUX_FUNCTION(i2c0), UNIPHIER_PINMUX_FUNCTION(i2c1), @@ -1509,6 +1544,7 @@ static const struct uniphier_pinmux_function ph1_pro4_functions[] = { UNIPHIER_PINMUX_FUNCTION(nand), UNIPHIER_PINMUX_FUNCTION(sd), UNIPHIER_PINMUX_FUNCTION(sd1), + UNIPHIER_PINMUX_FUNCTION(system_bus), UNIPHIER_PINMUX_FUNCTION(uart0), UNIPHIER_PINMUX_FUNCTION(uart1), UNIPHIER_PINMUX_FUNCTION(uart2), @@ -1521,43 +1557,36 @@ static const struct uniphier_pinmux_function ph1_pro4_functions[] = { UNIPHIER_PINMUX_FUNCTION(xirq), }; -static struct uniphier_pinctrl_socdata ph1_pro4_pindata = { - .groups = ph1_pro4_groups, - .groups_count = ARRAY_SIZE(ph1_pro4_groups), - .functions = ph1_pro4_functions, - .functions_count = ARRAY_SIZE(ph1_pro4_functions), - .mux_bits = 4, - .reg_stride = 8, - .load_pinctrl = true, -}; - -static struct pinctrl_desc ph1_pro4_pinctrl_desc = { - .name = DRIVER_NAME, - .pins = ph1_pro4_pins, - .npins = ARRAY_SIZE(ph1_pro4_pins), - .owner = THIS_MODULE, +static struct uniphier_pinctrl_socdata uniphier_pro4_pindata = { + .pins = uniphier_pro4_pins, + .npins = ARRAY_SIZE(uniphier_pro4_pins), + .groups = uniphier_pro4_groups, + .groups_count = ARRAY_SIZE(uniphier_pro4_groups), + .functions = uniphier_pro4_functions, + .functions_count = ARRAY_SIZE(uniphier_pro4_functions), + .caps = UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE, }; -static int ph1_pro4_pinctrl_probe(struct platform_device *pdev) +static int uniphier_pro4_pinctrl_probe(struct platform_device *pdev) { - return uniphier_pinctrl_probe(pdev, &ph1_pro4_pinctrl_desc, - &ph1_pro4_pindata); + return uniphier_pinctrl_probe(pdev, &uniphier_pro4_pindata); } -static const struct of_device_id ph1_pro4_pinctrl_match[] = { +static const struct of_device_id uniphier_pro4_pinctrl_match[] = { + { .compatible = "socionext,uniphier-pro4-pinctrl" }, { .compatible = "socionext,ph1-pro4-pinctrl" }, { /* sentinel */ } }; -MODULE_DEVICE_TABLE(of, ph1_pro4_pinctrl_match); +MODULE_DEVICE_TABLE(of, uniphier_pro4_pinctrl_match); -static struct platform_driver ph1_pro4_pinctrl_driver = { - .probe = ph1_pro4_pinctrl_probe, +static struct platform_driver uniphier_pro4_pinctrl_driver = { + .probe = uniphier_pro4_pinctrl_probe, .driver = { - .name = DRIVER_NAME, - .of_match_table = ph1_pro4_pinctrl_match, + .name = "uniphier-pro4-pinctrl", + .of_match_table = uniphier_pro4_pinctrl_match, }, }; -module_platform_driver(ph1_pro4_pinctrl_driver); +module_platform_driver(uniphier_pro4_pinctrl_driver); MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>"); MODULE_DESCRIPTION("UniPhier PH1-Pro4 pinctrl driver"); diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c index 3087f76752a6..55d4a12282a0 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c @@ -19,823 +19,840 @@ #include "pinctrl-uniphier.h" -#define DRIVER_NAME "ph1-pro5-pinctrl" - -static const struct pinctrl_pin_desc ph1_pro5_pins[] = { +static const struct pinctrl_pin_desc uniphier_pro5_pins[] = { UNIPHIER_PINCTRL_PIN(0, "AEXCKA1", 0, - 0, UNIPHIER_PIN_DRV_4_8, + 0, UNIPHIER_PIN_DRV_1BIT, 0, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(1, "AEXCKA2", 0, - 1, UNIPHIER_PIN_DRV_4_8, + 1, UNIPHIER_PIN_DRV_1BIT, 1, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(2, "CK27EXI", 0, - 2, UNIPHIER_PIN_DRV_4_8, + 2, UNIPHIER_PIN_DRV_1BIT, 2, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(3, "CK54EXI", 0, - 3, UNIPHIER_PIN_DRV_4_8, + 3, UNIPHIER_PIN_DRV_1BIT, 3, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(4, "ED0", UNIPHIER_PIN_IECTRL_NONE, - 4, UNIPHIER_PIN_DRV_4_8, + 4, UNIPHIER_PIN_DRV_1BIT, 4, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(5, "ED1", UNIPHIER_PIN_IECTRL_NONE, - 5, UNIPHIER_PIN_DRV_4_8, + 5, UNIPHIER_PIN_DRV_1BIT, 5, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(6, "ED2", UNIPHIER_PIN_IECTRL_NONE, - 6, UNIPHIER_PIN_DRV_4_8, + 6, UNIPHIER_PIN_DRV_1BIT, 6, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(7, "ED3", UNIPHIER_PIN_IECTRL_NONE, - 7, UNIPHIER_PIN_DRV_4_8, + 7, UNIPHIER_PIN_DRV_1BIT, 7, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(8, "ED4", UNIPHIER_PIN_IECTRL_NONE, - 8, UNIPHIER_PIN_DRV_4_8, + 8, UNIPHIER_PIN_DRV_1BIT, 8, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(9, "ED5", UNIPHIER_PIN_IECTRL_NONE, - 9, UNIPHIER_PIN_DRV_4_8, + 9, UNIPHIER_PIN_DRV_1BIT, 9, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(10, "ED6", UNIPHIER_PIN_IECTRL_NONE, - 10, UNIPHIER_PIN_DRV_4_8, + 10, UNIPHIER_PIN_DRV_1BIT, 10, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(11, "ED7", UNIPHIER_PIN_IECTRL_NONE, - 11, UNIPHIER_PIN_DRV_4_8, + 11, UNIPHIER_PIN_DRV_1BIT, 11, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(12, "XERWE0", UNIPHIER_PIN_IECTRL_NONE, - 12, UNIPHIER_PIN_DRV_4_8, + 12, UNIPHIER_PIN_DRV_1BIT, 12, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(13, "XERWE1", UNIPHIER_PIN_IECTRL_NONE, - 13, UNIPHIER_PIN_DRV_4_8, + 13, UNIPHIER_PIN_DRV_1BIT, 13, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(14, "ERXW", UNIPHIER_PIN_IECTRL_NONE, - 14, UNIPHIER_PIN_DRV_4_8, + 14, UNIPHIER_PIN_DRV_1BIT, 14, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(15, "ES0", UNIPHIER_PIN_IECTRL_NONE, - 15, UNIPHIER_PIN_DRV_4_8, + 15, UNIPHIER_PIN_DRV_1BIT, 15, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(16, "ES1", UNIPHIER_PIN_IECTRL_NONE, - 16, UNIPHIER_PIN_DRV_4_8, + 16, UNIPHIER_PIN_DRV_1BIT, 16, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(17, "ES2", UNIPHIER_PIN_IECTRL_NONE, - 17, UNIPHIER_PIN_DRV_4_8, + 17, UNIPHIER_PIN_DRV_1BIT, 17, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(18, "XECS1", UNIPHIER_PIN_IECTRL_NONE, - 18, UNIPHIER_PIN_DRV_4_8, + 18, UNIPHIER_PIN_DRV_1BIT, 18, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(19, "XNFRE", UNIPHIER_PIN_IECTRL_NONE, - 19, UNIPHIER_PIN_DRV_4_8, + 19, UNIPHIER_PIN_DRV_1BIT, 19, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(20, "XNFWE", UNIPHIER_PIN_IECTRL_NONE, - 20, UNIPHIER_PIN_DRV_4_8, + 20, UNIPHIER_PIN_DRV_1BIT, 20, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(21, "NFALE", UNIPHIER_PIN_IECTRL_NONE, - 21, UNIPHIER_PIN_DRV_4_8, + 21, UNIPHIER_PIN_DRV_1BIT, 21, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(22, "NFCLE", UNIPHIER_PIN_IECTRL_NONE, - 22, UNIPHIER_PIN_DRV_4_8, + 22, UNIPHIER_PIN_DRV_1BIT, 22, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(23, "XNFWP", UNIPHIER_PIN_IECTRL_NONE, - 23, UNIPHIER_PIN_DRV_4_8, + 23, UNIPHIER_PIN_DRV_1BIT, 23, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(24, "XNFCE0", UNIPHIER_PIN_IECTRL_NONE, - 24, UNIPHIER_PIN_DRV_4_8, + 24, UNIPHIER_PIN_DRV_1BIT, 24, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(25, "NFRYBY0", UNIPHIER_PIN_IECTRL_NONE, - 25, UNIPHIER_PIN_DRV_4_8, + 25, UNIPHIER_PIN_DRV_1BIT, 25, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(26, "XNFCE1", UNIPHIER_PIN_IECTRL_NONE, - 26, UNIPHIER_PIN_DRV_4_8, + 26, UNIPHIER_PIN_DRV_1BIT, 26, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(27, "NFRYBY1", UNIPHIER_PIN_IECTRL_NONE, - 27, UNIPHIER_PIN_DRV_4_8, + 27, UNIPHIER_PIN_DRV_1BIT, 27, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(28, "NFD0", UNIPHIER_PIN_IECTRL_NONE, - 28, UNIPHIER_PIN_DRV_4_8, + 28, UNIPHIER_PIN_DRV_1BIT, 28, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(29, "NFD1", UNIPHIER_PIN_IECTRL_NONE, - 29, UNIPHIER_PIN_DRV_4_8, + 29, UNIPHIER_PIN_DRV_1BIT, 29, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(30, "NFD2", UNIPHIER_PIN_IECTRL_NONE, - 30, UNIPHIER_PIN_DRV_4_8, + 30, UNIPHIER_PIN_DRV_1BIT, 30, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(31, "NFD3", UNIPHIER_PIN_IECTRL_NONE, - 31, UNIPHIER_PIN_DRV_4_8, + 31, UNIPHIER_PIN_DRV_1BIT, 31, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(32, "NFD4", UNIPHIER_PIN_IECTRL_NONE, - 32, UNIPHIER_PIN_DRV_4_8, + 32, UNIPHIER_PIN_DRV_1BIT, 32, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(33, "NFD5", UNIPHIER_PIN_IECTRL_NONE, - 33, UNIPHIER_PIN_DRV_4_8, + 33, UNIPHIER_PIN_DRV_1BIT, 33, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(34, "NFD6", UNIPHIER_PIN_IECTRL_NONE, - 34, UNIPHIER_PIN_DRV_4_8, + 34, UNIPHIER_PIN_DRV_1BIT, 34, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(35, "NFD7", UNIPHIER_PIN_IECTRL_NONE, - 35, UNIPHIER_PIN_DRV_4_8, + 35, UNIPHIER_PIN_DRV_1BIT, 35, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(36, "XERST", UNIPHIER_PIN_IECTRL_NONE, - 36, UNIPHIER_PIN_DRV_4_8, + 36, UNIPHIER_PIN_DRV_1BIT, 36, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(37, "MMCCLK", UNIPHIER_PIN_IECTRL_NONE, - 37, UNIPHIER_PIN_DRV_4_8, + 37, UNIPHIER_PIN_DRV_1BIT, 37, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(38, "MMCCMD", UNIPHIER_PIN_IECTRL_NONE, - 38, UNIPHIER_PIN_DRV_4_8, + 38, UNIPHIER_PIN_DRV_1BIT, 38, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(39, "MMCDAT0", UNIPHIER_PIN_IECTRL_NONE, - 39, UNIPHIER_PIN_DRV_4_8, + 39, UNIPHIER_PIN_DRV_1BIT, 39, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(40, "MMCDAT1", UNIPHIER_PIN_IECTRL_NONE, - 40, UNIPHIER_PIN_DRV_4_8, + 40, UNIPHIER_PIN_DRV_1BIT, 40, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(41, "MMCDAT2", UNIPHIER_PIN_IECTRL_NONE, - 41, UNIPHIER_PIN_DRV_4_8, + 41, UNIPHIER_PIN_DRV_1BIT, 41, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(42, "MMCDAT3", UNIPHIER_PIN_IECTRL_NONE, - 42, UNIPHIER_PIN_DRV_4_8, + 42, UNIPHIER_PIN_DRV_1BIT, 42, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(43, "MMCDAT4", UNIPHIER_PIN_IECTRL_NONE, - 43, UNIPHIER_PIN_DRV_4_8, + 43, UNIPHIER_PIN_DRV_1BIT, 43, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(44, "MMCDAT5", UNIPHIER_PIN_IECTRL_NONE, - 44, UNIPHIER_PIN_DRV_4_8, + 44, UNIPHIER_PIN_DRV_1BIT, 44, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(45, "MMCDAT6", UNIPHIER_PIN_IECTRL_NONE, - 45, UNIPHIER_PIN_DRV_4_8, + 45, UNIPHIER_PIN_DRV_1BIT, 45, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(46, "MMCDAT7", UNIPHIER_PIN_IECTRL_NONE, - 46, UNIPHIER_PIN_DRV_4_8, + 46, UNIPHIER_PIN_DRV_1BIT, 46, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(47, "TXD0", 0, - 47, UNIPHIER_PIN_DRV_4_8, + 47, UNIPHIER_PIN_DRV_1BIT, 47, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(48, "RXD0", 0, - 48, UNIPHIER_PIN_DRV_4_8, + 48, UNIPHIER_PIN_DRV_1BIT, 48, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(49, "TXD1", 0, - 49, UNIPHIER_PIN_DRV_4_8, + 49, UNIPHIER_PIN_DRV_1BIT, 49, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(50, "RXD1", 0, - 50, UNIPHIER_PIN_DRV_4_8, + 50, UNIPHIER_PIN_DRV_1BIT, 50, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(51, "TXD2", UNIPHIER_PIN_IECTRL_NONE, - 51, UNIPHIER_PIN_DRV_4_8, + 51, UNIPHIER_PIN_DRV_1BIT, 51, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(52, "RXD2", UNIPHIER_PIN_IECTRL_NONE, - 52, UNIPHIER_PIN_DRV_4_8, + 52, UNIPHIER_PIN_DRV_1BIT, 52, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(53, "TXD3", 0, - 53, UNIPHIER_PIN_DRV_4_8, + 53, UNIPHIER_PIN_DRV_1BIT, 53, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(54, "RXD3", 0, - 54, UNIPHIER_PIN_DRV_4_8, + 54, UNIPHIER_PIN_DRV_1BIT, 54, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(55, "MS0CS0", 0, - 55, UNIPHIER_PIN_DRV_4_8, + 55, UNIPHIER_PIN_DRV_1BIT, 55, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(56, "MS0DO", 0, - 56, UNIPHIER_PIN_DRV_4_8, + 56, UNIPHIER_PIN_DRV_1BIT, 56, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(57, "MS0DI", 0, - 57, UNIPHIER_PIN_DRV_4_8, + 57, UNIPHIER_PIN_DRV_1BIT, 57, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(58, "MS0CLK", 0, - 58, UNIPHIER_PIN_DRV_4_8, + 58, UNIPHIER_PIN_DRV_1BIT, 58, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(59, "CSCLK", 0, - 59, UNIPHIER_PIN_DRV_4_8, + 59, UNIPHIER_PIN_DRV_1BIT, 59, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(60, "CSBPTM", 0, - 60, UNIPHIER_PIN_DRV_4_8, + 60, UNIPHIER_PIN_DRV_1BIT, 60, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(61, "CSBMTP", 0, - 61, UNIPHIER_PIN_DRV_4_8, + 61, UNIPHIER_PIN_DRV_1BIT, 61, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(62, "XCINTP", 0, - 62, UNIPHIER_PIN_DRV_4_8, + 62, UNIPHIER_PIN_DRV_1BIT, 62, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(63, "XCINTM", 0, - 63, UNIPHIER_PIN_DRV_4_8, + 63, UNIPHIER_PIN_DRV_1BIT, 63, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(64, "XCMPREQ", 0, - 64, UNIPHIER_PIN_DRV_4_8, + 64, UNIPHIER_PIN_DRV_1BIT, 64, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(65, "XSRST", 0, - 65, UNIPHIER_PIN_DRV_4_8, + 65, UNIPHIER_PIN_DRV_1BIT, 65, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(66, "LPST", UNIPHIER_PIN_IECTRL_NONE, - 66, UNIPHIER_PIN_DRV_4_8, + 66, UNIPHIER_PIN_DRV_1BIT, 66, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(67, "PWMA", 0, - 67, UNIPHIER_PIN_DRV_4_8, + 67, UNIPHIER_PIN_DRV_1BIT, 67, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(68, "XIRQ0", 0, - 68, UNIPHIER_PIN_DRV_4_8, + 68, UNIPHIER_PIN_DRV_1BIT, 68, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(69, "XIRQ1", 0, - 69, UNIPHIER_PIN_DRV_4_8, + 69, UNIPHIER_PIN_DRV_1BIT, 69, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(70, "XIRQ2", 0, - 70, UNIPHIER_PIN_DRV_4_8, + 70, UNIPHIER_PIN_DRV_1BIT, 70, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(71, "XIRQ3", 0, - 71, UNIPHIER_PIN_DRV_4_8, + 71, UNIPHIER_PIN_DRV_1BIT, 71, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(72, "XIRQ4", 0, - 72, UNIPHIER_PIN_DRV_4_8, + 72, UNIPHIER_PIN_DRV_1BIT, 72, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(73, "XIRQ5", 0, - 73, UNIPHIER_PIN_DRV_4_8, + 73, UNIPHIER_PIN_DRV_1BIT, 73, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(74, "XIRQ6", 0, - 74, UNIPHIER_PIN_DRV_4_8, + 74, UNIPHIER_PIN_DRV_1BIT, 74, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(75, "XIRQ7", 0, - 75, UNIPHIER_PIN_DRV_4_8, + 75, UNIPHIER_PIN_DRV_1BIT, 75, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(76, "XIRQ8", 0, - 76, UNIPHIER_PIN_DRV_4_8, + 76, UNIPHIER_PIN_DRV_1BIT, 76, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(77, "XIRQ9", 0, - 77, UNIPHIER_PIN_DRV_4_8, + 77, UNIPHIER_PIN_DRV_1BIT, 77, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(78, "XIRQ10", 0, - 78, UNIPHIER_PIN_DRV_4_8, + 78, UNIPHIER_PIN_DRV_1BIT, 78, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(79, "XIRQ11", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 79, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(80, "XIRQ12", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 80, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(81, "XIRQ13", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 81, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(82, "XIRQ14", 0, - 82, UNIPHIER_PIN_DRV_4_8, + 82, UNIPHIER_PIN_DRV_1BIT, 82, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(83, "XIRQ15", 0, - 83, UNIPHIER_PIN_DRV_4_8, + 83, UNIPHIER_PIN_DRV_1BIT, 83, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(84, "XIRQ16", 0, - 84, UNIPHIER_PIN_DRV_4_8, + 84, UNIPHIER_PIN_DRV_1BIT, 84, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(85, "XIRQ17", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 85, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(86, "XIRQ18", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 86, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(87, "XIRQ19", 0, - 87, UNIPHIER_PIN_DRV_4_8, + 87, UNIPHIER_PIN_DRV_1BIT, 87, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(88, "XIRQ20", 0, - 88, UNIPHIER_PIN_DRV_4_8, + 88, UNIPHIER_PIN_DRV_1BIT, 88, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(89, "PORT00", 0, - 89, UNIPHIER_PIN_DRV_4_8, + 89, UNIPHIER_PIN_DRV_1BIT, 89, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(90, "PORT01", 0, - 90, UNIPHIER_PIN_DRV_4_8, + 90, UNIPHIER_PIN_DRV_1BIT, 90, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(91, "PORT02", 0, - 91, UNIPHIER_PIN_DRV_4_8, + 91, UNIPHIER_PIN_DRV_1BIT, 91, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(92, "PORT03", 0, - 92, UNIPHIER_PIN_DRV_4_8, + 92, UNIPHIER_PIN_DRV_1BIT, 92, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(93, "PORT04", 0, - 93, UNIPHIER_PIN_DRV_4_8, + 93, UNIPHIER_PIN_DRV_1BIT, 93, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(94, "PORT05", 0, - 94, UNIPHIER_PIN_DRV_4_8, + 94, UNIPHIER_PIN_DRV_1BIT, 94, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(95, "PORT06", 0, - 95, UNIPHIER_PIN_DRV_4_8, + 95, UNIPHIER_PIN_DRV_1BIT, 95, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(96, "PORT07", 0, - 96, UNIPHIER_PIN_DRV_4_8, + 96, UNIPHIER_PIN_DRV_1BIT, 96, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(97, "PORT10", 0, - 97, UNIPHIER_PIN_DRV_4_8, + 97, UNIPHIER_PIN_DRV_1BIT, 97, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(98, "PORT11", 0, - 98, UNIPHIER_PIN_DRV_4_8, + 98, UNIPHIER_PIN_DRV_1BIT, 98, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(99, "PORT12", 0, - 99, UNIPHIER_PIN_DRV_4_8, + 99, UNIPHIER_PIN_DRV_1BIT, 99, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(100, "PORT13", 0, - 100, UNIPHIER_PIN_DRV_4_8, + 100, UNIPHIER_PIN_DRV_1BIT, 100, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(101, "PORT14", 0, - 101, UNIPHIER_PIN_DRV_4_8, + 101, UNIPHIER_PIN_DRV_1BIT, 101, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(102, "PORT15", 0, - 102, UNIPHIER_PIN_DRV_4_8, + 102, UNIPHIER_PIN_DRV_1BIT, 102, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(103, "PORT16", 0, - 103, UNIPHIER_PIN_DRV_4_8, + 103, UNIPHIER_PIN_DRV_1BIT, 103, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(104, "PORT17", 0, - 104, UNIPHIER_PIN_DRV_4_8, + 104, UNIPHIER_PIN_DRV_1BIT, 104, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(105, "T0HPD", 0, - 105, UNIPHIER_PIN_DRV_4_8, + 105, UNIPHIER_PIN_DRV_1BIT, 105, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(106, "T1HPD", 0, - 106, UNIPHIER_PIN_DRV_4_8, + 106, UNIPHIER_PIN_DRV_1BIT, 106, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(107, "R0HPD", 0, - 107, UNIPHIER_PIN_DRV_4_8, + 107, UNIPHIER_PIN_DRV_1BIT, 107, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(108, "R1HPD", 0, - 108, UNIPHIER_PIN_DRV_4_8, + 108, UNIPHIER_PIN_DRV_1BIT, 108, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(109, "XPERST", 0, - 109, UNIPHIER_PIN_DRV_4_8, + 109, UNIPHIER_PIN_DRV_1BIT, 109, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(110, "XPEWAKE", 0, - 110, UNIPHIER_PIN_DRV_4_8, + 110, UNIPHIER_PIN_DRV_1BIT, 110, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(111, "XPECLKRQ", 0, - 111, UNIPHIER_PIN_DRV_4_8, + 111, UNIPHIER_PIN_DRV_1BIT, 111, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(112, "SDA0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 112, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(113, "SCL0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 113, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(114, "SDA1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 114, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(115, "SCL1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 115, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(116, "SDA2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 116, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(117, "SCL2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 117, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(118, "SDA3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 118, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(119, "SCL3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 119, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(120, "SPISYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 120, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(121, "SPISCLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 121, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(122, "SPITXD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 122, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(123, "SPIRXD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 123, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(124, "USB0VBUS", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 124, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(125, "USB0OD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 125, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(126, "USB1VBUS", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 126, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(127, "USB1OD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 127, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(128, "USB2VBUS", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 128, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(129, "USB2OD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 129, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(130, "SMTRST0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 130, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(131, "SMTCMD0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 131, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(132, "SMTD0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 132, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(133, "SMTSEL0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 133, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(134, "SMTCLK0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 134, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(135, "SMTRST1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 135, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(136, "SMTCMD1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 136, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(137, "SMTD1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 137, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(138, "SMTSEL1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 138, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(139, "SMTCLK1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 139, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(140, "CH0CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 140, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(141, "CH0PSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 141, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(142, "CH0VAL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 142, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(143, "CH0DATA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 143, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(144, "CH1CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 144, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(145, "CH1PSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 145, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(146, "CH1VAL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 146, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(147, "CH1DATA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 147, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(148, "CH2CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 148, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(149, "CH2PSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 149, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(150, "CH2VAL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 150, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(151, "CH2DATA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 151, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(152, "CH3CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 152, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(153, "CH3PSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 153, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(154, "CH3VAL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 154, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(155, "CH3DATA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 155, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(156, "CH4CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 156, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(157, "CH4PSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 157, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(158, "CH4VAL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 158, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(159, "CH4DATA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 159, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(160, "CH5CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 160, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(161, "CH5PSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 161, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(162, "CH5VAL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 162, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(163, "CH5DATA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 163, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(164, "CH6CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 164, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(165, "CH6PSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 165, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(166, "CH6VAL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 166, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(167, "CH6DATA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 167, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(168, "CH7CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 168, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(169, "CH7PSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 169, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(170, "CH7VAL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 170, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(171, "CH7DATA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 171, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(172, "AI1ADCCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 172, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(173, "AI1BCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 173, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(174, "AI1LRCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 174, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(175, "AI1D0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 175, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(176, "AI1D1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 176, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(177, "AI1D2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 177, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(178, "AI1D3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 178, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(179, "AI2ADCCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 179, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(180, "AI2BCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 180, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(181, "AI2LRCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 181, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(182, "AI2D0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 182, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(183, "AI2D1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 183, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(184, "AI2D2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 184, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(185, "AI2D3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 185, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(186, "AI3ADCCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 186, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(187, "AI3BCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 187, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(188, "AI3LRCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 188, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(189, "AI3D0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 189, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(190, "AO1IEC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 190, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(191, "AO1DACCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 191, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(192, "AO1BCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 192, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(193, "AO1LRCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 193, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(194, "AO1D0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 194, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(195, "AO1D1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 195, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(196, "AO1D2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 196, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(197, "AO1D3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 197, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(198, "AO2IEC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 198, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(199, "AO2DACCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 199, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(200, "AO2BCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 200, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(201, "AO2LRCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 201, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(202, "AO2D0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 202, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(203, "AO2D1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 203, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(204, "AO2D2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 204, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(205, "AO2D3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 205, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(206, "AO3DACCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 206, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(207, "AO3BCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 207, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(208, "AO3LRCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 208, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(209, "AO3DMIX", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 209, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(210, "AO4DACCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 210, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(211, "AO4BCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 211, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(212, "AO4LRCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 212, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(213, "AO4DMIX", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 213, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(214, "VI1CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 214, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(215, "VI1C0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 215, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(216, "VI1C1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 216, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(217, "VI1C2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 217, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(218, "VI1C3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 218, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(219, "VI1C4", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 219, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(220, "VI1C5", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 220, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(221, "VI1C6", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 221, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(222, "VI1C7", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 222, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(223, "VI1C8", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 223, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(224, "VI1C9", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 224, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(225, "VI1Y0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 225, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(226, "VI1Y1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 226, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(227, "VI1Y2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 227, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(228, "VI1Y3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 228, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(229, "VI1Y4", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 229, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(230, "VI1Y5", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 230, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(231, "VI1Y6", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 231, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(232, "VI1Y7", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 232, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(233, "VI1Y8", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 233, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(234, "VI1Y9", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 234, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(235, "VI1DE", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 235, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(236, "VI1HSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 236, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(237, "VI1VSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 237, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(238, "VO1CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 238, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(239, "VO1D0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 239, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(240, "VO1D1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 240, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(241, "VO1D2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 241, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(242, "VO1D3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 242, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(243, "VO1D4", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 243, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(244, "VO1D5", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 244, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(245, "VO1D6", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 245, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(246, "VO1D7", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 246, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(247, "SDCD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 247, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(248, "SDWP", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 248, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(249, "SDVOLC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 249, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(250, "SDCLK", UNIPHIER_PIN_IECTRL_NONE, - 40, UNIPHIER_PIN_DRV_8_12_16_20, + 10, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(251, "SDCMD", UNIPHIER_PIN_IECTRL_NONE, - 44, UNIPHIER_PIN_DRV_8_12_16_20, + 11, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(252, "SDDAT0", UNIPHIER_PIN_IECTRL_NONE, - 48, UNIPHIER_PIN_DRV_8_12_16_20, + 12, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(253, "SDDAT1", UNIPHIER_PIN_IECTRL_NONE, - 52, UNIPHIER_PIN_DRV_8_12_16_20, + 13, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(254, "SDDAT2", UNIPHIER_PIN_IECTRL_NONE, - 56, UNIPHIER_PIN_DRV_8_12_16_20, + 14, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(255, "SDDAT3", UNIPHIER_PIN_IECTRL_NONE, - 60, UNIPHIER_PIN_DRV_8_12_16_20, + 15, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), }; static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42}; -static const unsigned emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0}; +static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0}; static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46}; -static const unsigned emmc_dat8_muxvals[] = {0, 0, 0, 0}; +static const int emmc_dat8_muxvals[] = {0, 0, 0, 0}; static const unsigned i2c0_pins[] = {112, 113}; -static const unsigned i2c0_muxvals[] = {0, 0}; +static const int i2c0_muxvals[] = {0, 0}; static const unsigned i2c1_pins[] = {114, 115}; -static const unsigned i2c1_muxvals[] = {0, 0}; +static const int i2c1_muxvals[] = {0, 0}; static const unsigned i2c2_pins[] = {116, 117}; -static const unsigned i2c2_muxvals[] = {0, 0}; +static const int i2c2_muxvals[] = {0, 0}; static const unsigned i2c3_pins[] = {118, 119}; -static const unsigned i2c3_muxvals[] = {0, 0}; +static const int i2c3_muxvals[] = {0, 0}; static const unsigned i2c5_pins[] = {87, 88}; -static const unsigned i2c5_muxvals[] = {2, 2}; +static const int i2c5_muxvals[] = {2, 2}; static const unsigned i2c5b_pins[] = {196, 197}; -static const unsigned i2c5b_muxvals[] = {2, 2}; +static const int i2c5b_muxvals[] = {2, 2}; static const unsigned i2c5c_pins[] = {215, 216}; -static const unsigned i2c5c_muxvals[] = {2, 2}; +static const int i2c5c_muxvals[] = {2, 2}; static const unsigned i2c6_pins[] = {101, 102}; -static const unsigned i2c6_muxvals[] = {2, 2}; +static const int i2c6_muxvals[] = {2, 2}; static const unsigned nand_pins[] = {19, 20, 21, 22, 23, 24, 25, 28, 29, 30, 31, 32, 33, 34, 35}; -static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0}; +static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned nand_cs1_pins[] = {26, 27}; -static const unsigned nand_cs1_muxvals[] = {0, 0}; +static const int nand_cs1_muxvals[] = {0, 0}; static const unsigned sd_pins[] = {250, 251, 252, 253, 254, 255, 256, 257, 258}; -static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned system_bus_pins[] = {4, 5, 6, 7, 8, 9, 10, 11, 12, 13, + 14, 15, 16, 17}; +static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0}; +static const unsigned system_bus_cs0_pins[] = {105}; +static const int system_bus_cs0_muxvals[] = {1}; +static const unsigned system_bus_cs1_pins[] = {18}; +static const int system_bus_cs1_muxvals[] = {0}; +static const unsigned system_bus_cs2_pins[] = {106}; +static const int system_bus_cs2_muxvals[] = {1}; +static const unsigned system_bus_cs3_pins[] = {100}; +static const int system_bus_cs3_muxvals[] = {1}; +static const unsigned system_bus_cs4_pins[] = {101}; +static const int system_bus_cs4_muxvals[] = {1}; +static const unsigned system_bus_cs5_pins[] = {102}; +static const int system_bus_cs5_muxvals[] = {1}; +static const unsigned system_bus_cs6_pins[] = {69}; +static const int system_bus_cs6_muxvals[] = {5}; +static const unsigned system_bus_cs7_pins[] = {70}; +static const int system_bus_cs7_muxvals[] = {5}; static const unsigned uart0_pins[] = {47, 48}; -static const unsigned uart0_muxvals[] = {0, 0}; +static const int uart0_muxvals[] = {0, 0}; static const unsigned uart0b_pins[] = {227, 228}; -static const unsigned uart0b_muxvals[] = {3, 3}; +static const int uart0b_muxvals[] = {3, 3}; static const unsigned uart1_pins[] = {49, 50}; -static const unsigned uart1_muxvals[] = {0, 0}; +static const int uart1_muxvals[] = {0, 0}; static const unsigned uart2_pins[] = {51, 52}; -static const unsigned uart2_muxvals[] = {0, 0}; +static const int uart2_muxvals[] = {0, 0}; static const unsigned uart3_pins[] = {53, 54}; -static const unsigned uart3_muxvals[] = {0, 0}; +static const int uart3_muxvals[] = {0, 0}; static const unsigned usb0_pins[] = {124, 125}; -static const unsigned usb0_muxvals[] = {0, 0}; +static const int usb0_muxvals[] = {0, 0}; static const unsigned usb1_pins[] = {126, 127}; -static const unsigned usb1_muxvals[] = {0, 0}; +static const int usb1_muxvals[] = {0, 0}; static const unsigned usb2_pins[] = {128, 129}; -static const unsigned usb2_muxvals[] = {0, 0}; +static const int usb2_muxvals[] = {0, 0}; static const unsigned port_range0_pins[] = { 89, 90, 91, 92, 93, 94, 95, 96, /* PORT0x */ 97, 98, 99, 100, 101, 102, 103, 104, /* PORT1x */ @@ -853,7 +870,7 @@ static const unsigned port_range0_pins[] = { 179, 180, 181, 182, 186, 187, 188, 189, /* PORT13x */ 4, 5, 6, 7, 8, 9, 10, 11, /* PORT14x */ }; -static const unsigned port_range0_muxvals[] = { +static const int port_range0_muxvals[] = { 15, 15, 15, 15, 15, 15, 15, 15, /* PORT0x */ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT1x */ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT2x */ @@ -886,7 +903,7 @@ static const unsigned port_range1_pins[] = { 105, 106, 18, 27, 36, 128, 132, 137, /* PORT29x */ 183, 184, 185, 84, 47, 48, 51, 52, /* PORT30x */ }; -static const unsigned port_range1_muxvals[] = { +static const int port_range1_muxvals[] = { 15, 15, 15, /* PORT175-177 */ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT18x */ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT19x */ @@ -907,7 +924,7 @@ static const unsigned xirq_pins[] = { 76, 77, 78, 79, 80, 81, 82, 83, /* XIRQ8-15 */ 84, 85, 86, 87, 88, /* XIRQ16-20 */ }; -static const unsigned xirq_muxvals[] = { +static const int xirq_muxvals[] = { 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ0-7 */ 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ8-15 */ 14, 14, 14, 14, 14, /* XIRQ16-20 */ @@ -915,11 +932,11 @@ static const unsigned xirq_muxvals[] = { static const unsigned xirq_alternatives_pins[] = { 91, 92, 239, 144, 240, 156, 241, 106, 128, }; -static const unsigned xirq_alternatives_muxvals[] = { +static const int xirq_alternatives_muxvals[] = { 14, 14, 14, 14, 14, 14, 14, 14, 14, }; -static const struct uniphier_pinctrl_group ph1_pro5_groups[] = { +static const struct uniphier_pinctrl_group uniphier_pro5_groups[] = { UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(emmc), @@ -933,6 +950,15 @@ static const struct uniphier_pinctrl_group ph1_pro5_groups[] = { UNIPHIER_PINCTRL_GROUP(i2c5c), UNIPHIER_PINCTRL_GROUP(i2c6), UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(system_bus), + UNIPHIER_PINCTRL_GROUP(system_bus_cs0), + UNIPHIER_PINCTRL_GROUP(system_bus_cs1), + UNIPHIER_PINCTRL_GROUP(system_bus_cs2), + UNIPHIER_PINCTRL_GROUP(system_bus_cs3), + UNIPHIER_PINCTRL_GROUP(system_bus_cs4), + UNIPHIER_PINCTRL_GROUP(system_bus_cs5), + UNIPHIER_PINCTRL_GROUP(system_bus_cs6), + UNIPHIER_PINCTRL_GROUP(system_bus_cs7), UNIPHIER_PINCTRL_GROUP(uart0), UNIPHIER_PINCTRL_GROUP(uart0b), UNIPHIER_PINCTRL_GROUP(uart1), @@ -1213,6 +1239,15 @@ static const char * const i2c5_groups[] = {"i2c5", "i2c5b", "i2c5c"}; static const char * const i2c6_groups[] = {"i2c6"}; static const char * const nand_groups[] = {"nand", "nand_cs1"}; static const char * const sd_groups[] = {"sd"}; +static const char * const system_bus_groups[] = {"system_bus", + "system_bus_cs0", + "system_bus_cs1", + "system_bus_cs2", + "system_bus_cs3", + "system_bus_cs4", + "system_bus_cs5", + "system_bus_cs6", + "system_bus_cs7"}; static const char * const uart0_groups[] = {"uart0", "uart0b"}; static const char * const uart1_groups[] = {"uart1"}; static const char * const uart2_groups[] = {"uart2"}; @@ -1291,7 +1326,7 @@ static const char * const xirq_groups[] = { "xirq18b", "xirq18c", "xirq19b", "xirq20b", }; -static const struct uniphier_pinmux_function ph1_pro5_functions[] = { +static const struct uniphier_pinmux_function uniphier_pro5_functions[] = { UNIPHIER_PINMUX_FUNCTION(emmc), UNIPHIER_PINMUX_FUNCTION(i2c0), UNIPHIER_PINMUX_FUNCTION(i2c1), @@ -1301,6 +1336,7 @@ static const struct uniphier_pinmux_function ph1_pro5_functions[] = { UNIPHIER_PINMUX_FUNCTION(i2c6), UNIPHIER_PINMUX_FUNCTION(nand), UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION(system_bus), UNIPHIER_PINMUX_FUNCTION(uart0), UNIPHIER_PINMUX_FUNCTION(uart1), UNIPHIER_PINMUX_FUNCTION(uart2), @@ -1312,43 +1348,36 @@ static const struct uniphier_pinmux_function ph1_pro5_functions[] = { UNIPHIER_PINMUX_FUNCTION(xirq), }; -static struct uniphier_pinctrl_socdata ph1_pro5_pindata = { - .groups = ph1_pro5_groups, - .groups_count = ARRAY_SIZE(ph1_pro5_groups), - .functions = ph1_pro5_functions, - .functions_count = ARRAY_SIZE(ph1_pro5_functions), - .mux_bits = 4, - .reg_stride = 8, - .load_pinctrl = true, -}; - -static struct pinctrl_desc ph1_pro5_pinctrl_desc = { - .name = DRIVER_NAME, - .pins = ph1_pro5_pins, - .npins = ARRAY_SIZE(ph1_pro5_pins), - .owner = THIS_MODULE, +static struct uniphier_pinctrl_socdata uniphier_pro5_pindata = { + .pins = uniphier_pro5_pins, + .npins = ARRAY_SIZE(uniphier_pro5_pins), + .groups = uniphier_pro5_groups, + .groups_count = ARRAY_SIZE(uniphier_pro5_groups), + .functions = uniphier_pro5_functions, + .functions_count = ARRAY_SIZE(uniphier_pro5_functions), + .caps = UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE, }; -static int ph1_pro5_pinctrl_probe(struct platform_device *pdev) +static int uniphier_pro5_pinctrl_probe(struct platform_device *pdev) { - return uniphier_pinctrl_probe(pdev, &ph1_pro5_pinctrl_desc, - &ph1_pro5_pindata); + return uniphier_pinctrl_probe(pdev, &uniphier_pro5_pindata); } -static const struct of_device_id ph1_pro5_pinctrl_match[] = { +static const struct of_device_id uniphier_pro5_pinctrl_match[] = { + { .compatible = "socionext,uniphier-pro5-pinctrl" }, { .compatible = "socionext,ph1-pro5-pinctrl" }, { /* sentinel */ } }; -MODULE_DEVICE_TABLE(of, ph1_pro5_pinctrl_match); +MODULE_DEVICE_TABLE(of, uniphier_pro5_pinctrl_match); -static struct platform_driver ph1_pro5_pinctrl_driver = { - .probe = ph1_pro5_pinctrl_probe, +static struct platform_driver uniphier_pro5_pinctrl_driver = { + .probe = uniphier_pro5_pinctrl_probe, .driver = { - .name = DRIVER_NAME, - .of_match_table = ph1_pro5_pinctrl_match, + .name = "uniphier-pro5-pinctrl", + .of_match_table = uniphier_pro5_pinctrl_match, }, }; -module_platform_driver(ph1_pro5_pinctrl_driver); +module_platform_driver(uniphier_pro5_pinctrl_driver); MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>"); MODULE_DESCRIPTION("UniPhier PH1-Pro5 pinctrl driver"); diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c index e868030ff31c..8e1d73ea4ff0 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c @@ -19,760 +19,763 @@ #include "pinctrl-uniphier.h" -#define DRIVER_NAME "proxstream2-pinctrl" - -static const struct pinctrl_pin_desc proxstream2_pins[] = { +static const struct pinctrl_pin_desc uniphier_pxs2_pins[] = { UNIPHIER_PINCTRL_PIN(0, "ED0", UNIPHIER_PIN_IECTRL_NONE, - 0, UNIPHIER_PIN_DRV_4_8, + 0, UNIPHIER_PIN_DRV_1BIT, 0, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(1, "ED1", UNIPHIER_PIN_IECTRL_NONE, - 1, UNIPHIER_PIN_DRV_4_8, + 1, UNIPHIER_PIN_DRV_1BIT, 1, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(2, "ED2", UNIPHIER_PIN_IECTRL_NONE, - 2, UNIPHIER_PIN_DRV_4_8, + 2, UNIPHIER_PIN_DRV_1BIT, 2, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(3, "ED3", UNIPHIER_PIN_IECTRL_NONE, - 3, UNIPHIER_PIN_DRV_4_8, + 3, UNIPHIER_PIN_DRV_1BIT, 3, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(4, "ED4", UNIPHIER_PIN_IECTRL_NONE, - 4, UNIPHIER_PIN_DRV_4_8, + 4, UNIPHIER_PIN_DRV_1BIT, 4, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(5, "ED5", UNIPHIER_PIN_IECTRL_NONE, - 5, UNIPHIER_PIN_DRV_4_8, + 5, UNIPHIER_PIN_DRV_1BIT, 5, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(6, "ED6", UNIPHIER_PIN_IECTRL_NONE, - 6, UNIPHIER_PIN_DRV_4_8, + 6, UNIPHIER_PIN_DRV_1BIT, 6, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(7, "ED7", UNIPHIER_PIN_IECTRL_NONE, - 7, UNIPHIER_PIN_DRV_4_8, + 7, UNIPHIER_PIN_DRV_1BIT, 7, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(8, "XERWE0", UNIPHIER_PIN_IECTRL_NONE, - 8, UNIPHIER_PIN_DRV_4_8, + 8, UNIPHIER_PIN_DRV_1BIT, 8, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(9, "XERWE1", UNIPHIER_PIN_IECTRL_NONE, - 9, UNIPHIER_PIN_DRV_4_8, + 9, UNIPHIER_PIN_DRV_1BIT, 9, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(10, "ERXW", UNIPHIER_PIN_IECTRL_NONE, - 10, UNIPHIER_PIN_DRV_4_8, + 10, UNIPHIER_PIN_DRV_1BIT, 10, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(11, "ES0", UNIPHIER_PIN_IECTRL_NONE, - 11, UNIPHIER_PIN_DRV_4_8, + 11, UNIPHIER_PIN_DRV_1BIT, 11, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(12, "ES1", UNIPHIER_PIN_IECTRL_NONE, - 12, UNIPHIER_PIN_DRV_4_8, + 12, UNIPHIER_PIN_DRV_1BIT, 12, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(13, "ES2", UNIPHIER_PIN_IECTRL_NONE, - 13, UNIPHIER_PIN_DRV_4_8, + 13, UNIPHIER_PIN_DRV_1BIT, 13, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(14, "XECS1", UNIPHIER_PIN_IECTRL_NONE, - 14, UNIPHIER_PIN_DRV_4_8, + 14, UNIPHIER_PIN_DRV_1BIT, 14, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(15, "SMTRST0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 15, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(16, "SMTCMD0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 16, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(17, "SMTD0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 17, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(18, "SMTSEL0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 18, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(19, "SMTCLK0CG", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 19, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(20, "SMTDET0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 20, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(21, "SMTRST1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 21, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(22, "SMTCMD1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 22, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(23, "SMTD1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 23, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(24, "SMTSEL1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 24, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(25, "SMTCLK1CG", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 25, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(26, "SMTDET1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 26, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(27, "XIRQ18", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 27, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(28, "XIRQ19", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 28, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(29, "XIRQ20", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 29, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(30, "XNFRE", UNIPHIER_PIN_IECTRL_NONE, - 30, UNIPHIER_PIN_DRV_4_8, + 30, UNIPHIER_PIN_DRV_1BIT, 30, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(31, "XNFWE", UNIPHIER_PIN_IECTRL_NONE, - 31, UNIPHIER_PIN_DRV_4_8, + 31, UNIPHIER_PIN_DRV_1BIT, 31, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(32, "NFALE", UNIPHIER_PIN_IECTRL_NONE, - 32, UNIPHIER_PIN_DRV_4_8, + 32, UNIPHIER_PIN_DRV_1BIT, 32, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(33, "NFCLE", UNIPHIER_PIN_IECTRL_NONE, - 33, UNIPHIER_PIN_DRV_4_8, + 33, UNIPHIER_PIN_DRV_1BIT, 33, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(34, "XNFWP", UNIPHIER_PIN_IECTRL_NONE, - 34, UNIPHIER_PIN_DRV_4_8, + 34, UNIPHIER_PIN_DRV_1BIT, 34, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(35, "XNFCE0", UNIPHIER_PIN_IECTRL_NONE, - 35, UNIPHIER_PIN_DRV_4_8, + 35, UNIPHIER_PIN_DRV_1BIT, 35, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(36, "NFRYBY0", UNIPHIER_PIN_IECTRL_NONE, - 36, UNIPHIER_PIN_DRV_4_8, + 36, UNIPHIER_PIN_DRV_1BIT, 36, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(37, "XNFCE1", UNIPHIER_PIN_IECTRL_NONE, - 37, UNIPHIER_PIN_DRV_4_8, + 37, UNIPHIER_PIN_DRV_1BIT, 37, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(38, "NFRYBY1", UNIPHIER_PIN_IECTRL_NONE, - 38, UNIPHIER_PIN_DRV_4_8, + 38, UNIPHIER_PIN_DRV_1BIT, 38, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(39, "NFD0", UNIPHIER_PIN_IECTRL_NONE, - 39, UNIPHIER_PIN_DRV_4_8, + 39, UNIPHIER_PIN_DRV_1BIT, 39, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(40, "NFD1", UNIPHIER_PIN_IECTRL_NONE, - 40, UNIPHIER_PIN_DRV_4_8, + 40, UNIPHIER_PIN_DRV_1BIT, 40, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(41, "NFD2", UNIPHIER_PIN_IECTRL_NONE, - 41, UNIPHIER_PIN_DRV_4_8, + 41, UNIPHIER_PIN_DRV_1BIT, 41, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(42, "NFD3", UNIPHIER_PIN_IECTRL_NONE, - 42, UNIPHIER_PIN_DRV_4_8, + 42, UNIPHIER_PIN_DRV_1BIT, 42, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(43, "NFD4", UNIPHIER_PIN_IECTRL_NONE, - 43, UNIPHIER_PIN_DRV_4_8, + 43, UNIPHIER_PIN_DRV_1BIT, 43, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(44, "NFD5", UNIPHIER_PIN_IECTRL_NONE, - 44, UNIPHIER_PIN_DRV_4_8, + 44, UNIPHIER_PIN_DRV_1BIT, 44, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(45, "NFD6", UNIPHIER_PIN_IECTRL_NONE, - 45, UNIPHIER_PIN_DRV_4_8, + 45, UNIPHIER_PIN_DRV_1BIT, 45, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(46, "NFD7", UNIPHIER_PIN_IECTRL_NONE, - 46, UNIPHIER_PIN_DRV_4_8, + 46, UNIPHIER_PIN_DRV_1BIT, 46, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(47, "SDCLK", UNIPHIER_PIN_IECTRL_NONE, - 0, UNIPHIER_PIN_DRV_8_12_16_20, + 0, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(48, "SDCMD", UNIPHIER_PIN_IECTRL_NONE, - 4, UNIPHIER_PIN_DRV_8_12_16_20, + 1, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(49, "SDDAT0", UNIPHIER_PIN_IECTRL_NONE, - 8, UNIPHIER_PIN_DRV_8_12_16_20, + 2, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(50, "SDDAT1", UNIPHIER_PIN_IECTRL_NONE, - 12, UNIPHIER_PIN_DRV_8_12_16_20, + 3, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(51, "SDDAT2", UNIPHIER_PIN_IECTRL_NONE, - 16, UNIPHIER_PIN_DRV_8_12_16_20, + 4, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(52, "SDDAT3", UNIPHIER_PIN_IECTRL_NONE, - 20, UNIPHIER_PIN_DRV_8_12_16_20, + 5, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_UP_FIXED), UNIPHIER_PINCTRL_PIN(53, "SDCD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 53, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(54, "SDWP", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 54, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(55, "SDVOLC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 55, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(56, "USB0VBUS", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 56, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(57, "USB0OD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 57, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(58, "USB1VBUS", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 58, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(59, "USB1OD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 59, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(60, "USB2VBUS", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 60, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(61, "USB2OD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 61, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(62, "USB3VBUS", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 62, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(63, "USB3OD", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 63, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(64, "CH0CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 64, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(65, "CH0PSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 65, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(66, "CH0VAL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 66, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(67, "CH0DATA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 67, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(68, "CH1CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 68, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(69, "CH1PSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 69, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(70, "CH1VAL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 70, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(71, "CH1DATA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 71, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(72, "XIRQ9", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 72, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(73, "XIRQ10", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 73, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(74, "XIRQ16", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 74, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(75, "CH4CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 75, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(76, "CH4PSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 76, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(77, "CH4VAL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 77, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(78, "CH4DATA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 78, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(79, "CH5CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 79, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(80, "CH5PSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 80, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(81, "CH5VAL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 81, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(82, "CH5DATA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 82, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(83, "CH6CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 83, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(84, "CH6PSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 84, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(85, "CH6VAL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 85, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(86, "CH6DATA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 86, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(87, "STS0CLKO", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 87, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(88, "STS0SYNCO", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 88, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(89, "STS0VALO", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 89, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(90, "STS0DATAO", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 90, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(91, "XIRQ17", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 91, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(92, "PORT163", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 92, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(93, "PORT165", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 93, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(94, "PORT166", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 94, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(95, "PORT132", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 95, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(96, "PORT133", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 96, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(97, "AO2IEC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 97, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(98, "AI2ADCCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 98, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(99, "AI2BCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 99, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(100, "AI2LRCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 100, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(101, "AI2D0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 101, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(102, "AI2D1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 102, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(103, "AI2D2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 103, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(104, "AI2D3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 104, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(105, "AO3DACCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 105, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(106, "AO3BCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 106, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(107, "AO3LRCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 107, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(108, "AO3DMIX", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 108, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(109, "SDA0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 109, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(110, "SCL0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 110, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(111, "SDA1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 111, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(112, "SCL1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 112, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(113, "TXD2", 0, - 113, UNIPHIER_PIN_DRV_4_8, + 113, UNIPHIER_PIN_DRV_1BIT, 113, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(114, "RXD2", 0, - 114, UNIPHIER_PIN_DRV_4_8, + 114, UNIPHIER_PIN_DRV_1BIT, 114, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(115, "TXD1", 0, - 115, UNIPHIER_PIN_DRV_4_8, + 115, UNIPHIER_PIN_DRV_1BIT, 115, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(116, "RXD1", 0, - 116, UNIPHIER_PIN_DRV_4_8, + 116, UNIPHIER_PIN_DRV_1BIT, 116, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(117, "PORT190", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 117, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(118, "VI1HSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 118, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(119, "VI1VSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 119, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(120, "VI1DE", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 120, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(121, "XIRQ3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 121, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(122, "XIRQ4", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 122, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(123, "VI1G2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 123, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(124, "VI1G3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 124, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(125, "VI1G4", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 125, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(126, "VI1G5", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 126, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(127, "VI1G6", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 127, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(128, "VI1G7", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 128, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(129, "VI1G8", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 129, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(130, "VI1G9", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 130, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(131, "VI1CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 131, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(132, "PORT05", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 132, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(133, "PORT06", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 133, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(134, "VI1R2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 134, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(135, "VI1R3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 135, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(136, "VI1R4", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 136, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(137, "VI1R5", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 137, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(138, "VI1R6", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 138, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(139, "VI1R7", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 139, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(140, "VI1R8", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 140, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(141, "VI1R9", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 141, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(142, "LPST", UNIPHIER_PIN_IECTRL_NONE, - 142, UNIPHIER_PIN_DRV_4_8, + 142, UNIPHIER_PIN_DRV_1BIT, 142, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(143, "MDC", 0, - 143, UNIPHIER_PIN_DRV_4_8, + 143, UNIPHIER_PIN_DRV_1BIT, 143, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(144, "MDIO", 0, - 144, UNIPHIER_PIN_DRV_4_8, + 144, UNIPHIER_PIN_DRV_1BIT, 144, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(145, "MDIO_INTL", 0, - 145, UNIPHIER_PIN_DRV_4_8, + 145, UNIPHIER_PIN_DRV_1BIT, 145, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(146, "PHYRSTL", 0, - 146, UNIPHIER_PIN_DRV_4_8, + 146, UNIPHIER_PIN_DRV_1BIT, 146, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(147, "RGMII_RXCLK", 0, - 147, UNIPHIER_PIN_DRV_4_8, + 147, UNIPHIER_PIN_DRV_1BIT, 147, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(148, "RGMII_RXD0", 0, - 148, UNIPHIER_PIN_DRV_4_8, + 148, UNIPHIER_PIN_DRV_1BIT, 148, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(149, "RGMII_RXD1", 0, - 149, UNIPHIER_PIN_DRV_4_8, + 149, UNIPHIER_PIN_DRV_1BIT, 149, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(150, "RGMII_RXD2", 0, - 150, UNIPHIER_PIN_DRV_4_8, + 150, UNIPHIER_PIN_DRV_1BIT, 150, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(151, "RGMII_RXD3", 0, - 151, UNIPHIER_PIN_DRV_4_8, + 151, UNIPHIER_PIN_DRV_1BIT, 151, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(152, "RGMII_RXCTL", 0, - 152, UNIPHIER_PIN_DRV_4_8, + 152, UNIPHIER_PIN_DRV_1BIT, 152, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(153, "RGMII_TXCLK", 0, - 153, UNIPHIER_PIN_DRV_4_8, + 153, UNIPHIER_PIN_DRV_1BIT, 153, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(154, "RGMII_TXD0", 0, - 154, UNIPHIER_PIN_DRV_4_8, + 154, UNIPHIER_PIN_DRV_1BIT, 154, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(155, "RGMII_TXD1", 0, - 155, UNIPHIER_PIN_DRV_4_8, + 155, UNIPHIER_PIN_DRV_1BIT, 155, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(156, "RGMII_TXD2", 0, - 156, UNIPHIER_PIN_DRV_4_8, + 156, UNIPHIER_PIN_DRV_1BIT, 156, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(157, "RGMII_TXD3", 0, - 157, UNIPHIER_PIN_DRV_4_8, + 157, UNIPHIER_PIN_DRV_1BIT, 157, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(158, "RGMII_TXCTL", 0, - 158, UNIPHIER_PIN_DRV_4_8, + 158, UNIPHIER_PIN_DRV_1BIT, 158, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(159, "SDA3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 159, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(160, "SCL3", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 160, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(161, "AI1ADCCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 161, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(162, "AI1BCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 162, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(163, "CH2CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 163, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(164, "CH2PSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 164, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(165, "CH2VAL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 165, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(166, "CH2DATA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 166, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(167, "CH3CLK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 167, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(168, "CH3PSYNC", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 168, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(169, "CH3VAL", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 169, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(170, "CH3DATA", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 170, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(171, "SDA2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 171, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(172, "SCL2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 172, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(173, "AI1LRCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 173, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(174, "AI1D0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 174, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(175, "AO2LRCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 175, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(176, "AO2D0", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 176, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(177, "AO2DACCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 177, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(178, "AO2BCK", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 178, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(179, "PORT222", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 179, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(180, "PORT223", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 180, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(181, "PORT224", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 181, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(182, "PORT225", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 182, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(183, "PORT226", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 183, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(184, "PORT227", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 184, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(185, "PORT230", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 185, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(186, "FANPWM", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 186, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(187, "HRDDCSDA0", 0, - 187, UNIPHIER_PIN_DRV_4_8, + 187, UNIPHIER_PIN_DRV_1BIT, 187, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(188, "HRDDCSCL0", 0, - 188, UNIPHIER_PIN_DRV_4_8, + 188, UNIPHIER_PIN_DRV_1BIT, 188, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(189, "HRDDCSDA1", 0, - 189, UNIPHIER_PIN_DRV_4_8, + 189, UNIPHIER_PIN_DRV_1BIT, 189, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(190, "HRDDCSCL1", 0, - 190, UNIPHIER_PIN_DRV_4_8, + 190, UNIPHIER_PIN_DRV_1BIT, 190, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(191, "HTDDCSDA0", 0, - 191, UNIPHIER_PIN_DRV_4_8, + 191, UNIPHIER_PIN_DRV_1BIT, 191, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(192, "HTDDCSCL0", 0, - 192, UNIPHIER_PIN_DRV_4_8, + 192, UNIPHIER_PIN_DRV_1BIT, 192, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(193, "HTDDCSDA1", 0, - 193, UNIPHIER_PIN_DRV_4_8, + 193, UNIPHIER_PIN_DRV_1BIT, 193, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(194, "HTDDCSCL1", 0, - 194, UNIPHIER_PIN_DRV_4_8, + 194, UNIPHIER_PIN_DRV_1BIT, 194, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(195, "PORT241", 0, - 195, UNIPHIER_PIN_DRV_4_8, + 195, UNIPHIER_PIN_DRV_1BIT, 195, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(196, "PORT242", 0, - 196, UNIPHIER_PIN_DRV_4_8, + 196, UNIPHIER_PIN_DRV_1BIT, 196, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(197, "PORT243", 0, - 197, UNIPHIER_PIN_DRV_4_8, + 197, UNIPHIER_PIN_DRV_1BIT, 197, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(198, "MVSYNC", 0, - 198, UNIPHIER_PIN_DRV_4_8, + 198, UNIPHIER_PIN_DRV_1BIT, 198, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(199, "SPISYNC0", UNIPHIER_PIN_IECTRL_NONE, - 199, UNIPHIER_PIN_DRV_4_8, + 199, UNIPHIER_PIN_DRV_1BIT, 199, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(200, "SPISCLK0", UNIPHIER_PIN_IECTRL_NONE, - 200, UNIPHIER_PIN_DRV_4_8, + 200, UNIPHIER_PIN_DRV_1BIT, 200, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(201, "SPITXD0", UNIPHIER_PIN_IECTRL_NONE, - 201, UNIPHIER_PIN_DRV_4_8, + 201, UNIPHIER_PIN_DRV_1BIT, 201, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(202, "SPIRXD0", UNIPHIER_PIN_IECTRL_NONE, - 202, UNIPHIER_PIN_DRV_4_8, + 202, UNIPHIER_PIN_DRV_1BIT, 202, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(203, "CK54EXI", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 203, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(204, "AEXCKA1", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 204, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(205, "AEXCKA2", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 205, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(206, "CK27EXI", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_8, + -1, UNIPHIER_PIN_DRV_FIXED8, 206, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(207, "STCDIN", 0, - 207, UNIPHIER_PIN_DRV_4_8, + 207, UNIPHIER_PIN_DRV_1BIT, 207, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(208, "PHSYNI", 0, - 208, UNIPHIER_PIN_DRV_4_8, + 208, UNIPHIER_PIN_DRV_1BIT, 208, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(209, "PVSYNI", 0, - 209, UNIPHIER_PIN_DRV_4_8, + 209, UNIPHIER_PIN_DRV_1BIT, 209, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(210, "MVSYN", UNIPHIER_PIN_IECTRL_NONE, - 210, UNIPHIER_PIN_DRV_4_8, + 210, UNIPHIER_PIN_DRV_1BIT, 210, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(211, "STCV", UNIPHIER_PIN_IECTRL_NONE, - 211, UNIPHIER_PIN_DRV_4_8, + 211, UNIPHIER_PIN_DRV_1BIT, 211, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(212, "PORT262", UNIPHIER_PIN_IECTRL_NONE, - 212, UNIPHIER_PIN_DRV_4_8, + 212, UNIPHIER_PIN_DRV_1BIT, 212, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(213, "USB0VBUS_IRQ", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 213, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(214, "USB1VBUS_IRQ", UNIPHIER_PIN_IECTRL_NONE, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 214, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(215, "PORT265", UNIPHIER_PIN_IECTRL_NONE, - 215, UNIPHIER_PIN_DRV_4_8, + 215, UNIPHIER_PIN_DRV_1BIT, 215, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(216, "CK25O", 0, - 216, UNIPHIER_PIN_DRV_4_8, + 216, UNIPHIER_PIN_DRV_1BIT, 216, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(217, "TXD0", 0, - 217, UNIPHIER_PIN_DRV_4_8, + 217, UNIPHIER_PIN_DRV_1BIT, 217, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(218, "RXD0", 0, - 218, UNIPHIER_PIN_DRV_4_8, + 218, UNIPHIER_PIN_DRV_1BIT, 218, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(219, "TXD3", 0, - 219, UNIPHIER_PIN_DRV_4_8, + 219, UNIPHIER_PIN_DRV_1BIT, 219, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(220, "RXD3", 0, - 220, UNIPHIER_PIN_DRV_4_8, + 220, UNIPHIER_PIN_DRV_1BIT, 220, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(221, "PORT273", 0, - 221, UNIPHIER_PIN_DRV_4_8, + 221, UNIPHIER_PIN_DRV_1BIT, 221, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(222, "STCDOUTC", 0, - 222, UNIPHIER_PIN_DRV_4_8, + 222, UNIPHIER_PIN_DRV_1BIT, 222, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(223, "PORT274", 0, - 223, UNIPHIER_PIN_DRV_4_8, + 223, UNIPHIER_PIN_DRV_1BIT, 223, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(224, "PORT275", 0, - 224, UNIPHIER_PIN_DRV_4_8, + 224, UNIPHIER_PIN_DRV_1BIT, 224, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(225, "PORT276", 0, - 225, UNIPHIER_PIN_DRV_4_8, + 225, UNIPHIER_PIN_DRV_1BIT, 225, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(226, "PORT277", 0, - 226, UNIPHIER_PIN_DRV_4_8, + 226, UNIPHIER_PIN_DRV_1BIT, 226, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(227, "PORT280", 0, - 227, UNIPHIER_PIN_DRV_4_8, + 227, UNIPHIER_PIN_DRV_1BIT, 227, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(228, "PORT281", 0, - 228, UNIPHIER_PIN_DRV_4_8, + 228, UNIPHIER_PIN_DRV_1BIT, 228, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(229, "PORT282", 0, - 229, UNIPHIER_PIN_DRV_4_8, + 229, UNIPHIER_PIN_DRV_1BIT, 229, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(230, "PORT283", 0, - 230, UNIPHIER_PIN_DRV_4_8, + 230, UNIPHIER_PIN_DRV_1BIT, 230, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(231, "PORT284", 0, - 231, UNIPHIER_PIN_DRV_4_8, + 231, UNIPHIER_PIN_DRV_1BIT, 231, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(232, "PORT285", 0, - 232, UNIPHIER_PIN_DRV_4_8, + 232, UNIPHIER_PIN_DRV_1BIT, 232, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(233, "T0HPD", 0, - 233, UNIPHIER_PIN_DRV_4_8, + 233, UNIPHIER_PIN_DRV_1BIT, 233, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(234, "T1HPD", 0, - 234, UNIPHIER_PIN_DRV_4_8, + 234, UNIPHIER_PIN_DRV_1BIT, 234, UNIPHIER_PIN_PULL_DOWN), }; static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42}; -static const unsigned emmc_muxvals[] = {9, 9, 9, 9, 9, 9, 9}; +static const int emmc_muxvals[] = {9, 9, 9, 9, 9, 9, 9}; static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46}; -static const unsigned emmc_dat8_muxvals[] = {9, 9, 9, 9}; +static const int emmc_dat8_muxvals[] = {9, 9, 9, 9}; static const unsigned i2c0_pins[] = {109, 110}; -static const unsigned i2c0_muxvals[] = {8, 8}; +static const int i2c0_muxvals[] = {8, 8}; static const unsigned i2c1_pins[] = {111, 112}; -static const unsigned i2c1_muxvals[] = {8, 8}; +static const int i2c1_muxvals[] = {8, 8}; static const unsigned i2c2_pins[] = {171, 172}; -static const unsigned i2c2_muxvals[] = {8, 8}; +static const int i2c2_muxvals[] = {8, 8}; static const unsigned i2c3_pins[] = {159, 160}; -static const unsigned i2c3_muxvals[] = {8, 8}; +static const int i2c3_muxvals[] = {8, 8}; static const unsigned i2c5_pins[] = {183, 184}; -static const unsigned i2c5_muxvals[] = {11, 11}; +static const int i2c5_muxvals[] = {11, 11}; static const unsigned i2c6_pins[] = {185, 186}; -static const unsigned i2c6_muxvals[] = {11, 11}; +static const int i2c6_muxvals[] = {11, 11}; static const unsigned nand_pins[] = {30, 31, 32, 33, 34, 35, 36, 39, 40, 41, 42, 43, 44, 45, 46}; -static const unsigned nand_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, - 8, 8}; +static const int nand_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8}; static const unsigned nand_cs1_pins[] = {37, 38}; -static const unsigned nand_cs1_muxvals[] = {8, 8}; +static const int nand_cs1_muxvals[] = {8, 8}; static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55}; -static const unsigned sd_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8}; +static const int sd_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8}; +static const unsigned system_bus_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, + 11, 12, 13}; +static const int system_bus_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, + 8}; +static const unsigned system_bus_cs1_pins[] = {14}; +static const int system_bus_cs1_muxvals[] = {8}; static const unsigned uart0_pins[] = {217, 218}; -static const unsigned uart0_muxvals[] = {8, 8}; +static const int uart0_muxvals[] = {8, 8}; static const unsigned uart0b_pins[] = {179, 180}; -static const unsigned uart0b_muxvals[] = {10, 10}; +static const int uart0b_muxvals[] = {10, 10}; static const unsigned uart1_pins[] = {115, 116}; -static const unsigned uart1_muxvals[] = {8, 8}; +static const int uart1_muxvals[] = {8, 8}; static const unsigned uart2_pins[] = {113, 114}; -static const unsigned uart2_muxvals[] = {8, 8}; +static const int uart2_muxvals[] = {8, 8}; static const unsigned uart3_pins[] = {219, 220}; -static const unsigned uart3_muxvals[] = {8, 8}; +static const int uart3_muxvals[] = {8, 8}; static const unsigned uart3b_pins[] = {181, 182}; -static const unsigned uart3b_muxvals[] = {10, 10}; +static const int uart3b_muxvals[] = {10, 10}; static const unsigned usb0_pins[] = {56, 57}; -static const unsigned usb0_muxvals[] = {8, 8}; +static const int usb0_muxvals[] = {8, 8}; static const unsigned usb1_pins[] = {58, 59}; -static const unsigned usb1_muxvals[] = {8, 8}; +static const int usb1_muxvals[] = {8, 8}; static const unsigned usb2_pins[] = {60, 61}; -static const unsigned usb2_muxvals[] = {8, 8}; +static const int usb2_muxvals[] = {8, 8}; static const unsigned usb3_pins[] = {62, 63}; -static const unsigned usb3_muxvals[] = {8, 8}; +static const int usb3_muxvals[] = {8, 8}; static const unsigned port_range0_pins[] = { 127, 128, 129, 130, 131, 132, 133, 134, /* PORT0x */ 135, 136, 137, 138, 139, 140, 141, 142, /* PORT1x */ @@ -786,7 +789,7 @@ static const unsigned port_range0_pins[] = { 61, 62, 63, 64, 65, 66, 67, 68, /* PORT9x */ 69, 70, 71, 76, 77, 78, 79, 80, /* PORT10x */ }; -static const unsigned port_range0_muxvals[] = { +static const int port_range0_muxvals[] = { 15, 15, 15, 15, 15, 15, 15, 15, /* PORT0x */ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT1x */ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT2x */ @@ -818,7 +821,7 @@ static const unsigned port_range1_pins[] = { 218, 219, 220, 221, 223, 224, 225, 226, /* PORT27x */ 227, 228, 229, 230, 231, 232, 233, 234, /* PORT28x */ }; -static const unsigned port_range1_muxvals[] = { +static const int port_range1_muxvals[] = { 15, 15, 15, 15, 15, 15, 15, 15, /* PORT12x */ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT13x */ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT14x */ @@ -842,13 +845,13 @@ static const unsigned xirq_pins[] = { 126, 72, 73, 92, 177, 93, 94, 176, /* XIRQ8-15 */ 74, 91, 27, 28, 29, 75, 20, 26, /* XIRQ16-23 */ }; -static const unsigned xirq_muxvals[] = { +static const int xirq_muxvals[] = { 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ0-7 */ 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ8-15 */ 14, 14, 14, 14, 14, 14, 14, 14, /* XIRQ16-23 */ }; -static const struct uniphier_pinctrl_group proxstream2_groups[] = { +static const struct uniphier_pinctrl_group uniphier_pxs2_groups[] = { UNIPHIER_PINCTRL_GROUP(emmc), UNIPHIER_PINCTRL_GROUP(emmc_dat8), UNIPHIER_PINCTRL_GROUP(i2c0), @@ -860,6 +863,8 @@ static const struct uniphier_pinctrl_group proxstream2_groups[] = { UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(system_bus), + UNIPHIER_PINCTRL_GROUP(system_bus_cs1), UNIPHIER_PINCTRL_GROUP(uart0), UNIPHIER_PINCTRL_GROUP(uart0b), UNIPHIER_PINCTRL_GROUP(uart1), @@ -1132,6 +1137,8 @@ static const char * const i2c5_groups[] = {"i2c5"}; static const char * const i2c6_groups[] = {"i2c6"}; static const char * const nand_groups[] = {"nand", "nand_cs1"}; static const char * const sd_groups[] = {"sd"}; +static const char * const system_bus_groups[] = {"system_bus", + "system_bus_cs1"}; static const char * const uart0_groups[] = {"uart0", "uart0b"}; static const char * const uart1_groups[] = {"uart1"}; static const char * const uart2_groups[] = {"uart2"}; @@ -1208,7 +1215,7 @@ static const char * const xirq_groups[] = { "xirq20", "xirq21", "xirq22", "xirq23", }; -static const struct uniphier_pinmux_function proxstream2_functions[] = { +static const struct uniphier_pinmux_function uniphier_pxs2_functions[] = { UNIPHIER_PINMUX_FUNCTION(emmc), UNIPHIER_PINMUX_FUNCTION(i2c0), UNIPHIER_PINMUX_FUNCTION(i2c1), @@ -1218,6 +1225,7 @@ static const struct uniphier_pinmux_function proxstream2_functions[] = { UNIPHIER_PINMUX_FUNCTION(i2c6), UNIPHIER_PINMUX_FUNCTION(nand), UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION(system_bus), UNIPHIER_PINMUX_FUNCTION(uart0), UNIPHIER_PINMUX_FUNCTION(uart1), UNIPHIER_PINMUX_FUNCTION(uart2), @@ -1230,43 +1238,36 @@ static const struct uniphier_pinmux_function proxstream2_functions[] = { UNIPHIER_PINMUX_FUNCTION(xirq), }; -static struct uniphier_pinctrl_socdata proxstream2_pindata = { - .groups = proxstream2_groups, - .groups_count = ARRAY_SIZE(proxstream2_groups), - .functions = proxstream2_functions, - .functions_count = ARRAY_SIZE(proxstream2_functions), - .mux_bits = 8, - .reg_stride = 4, - .load_pinctrl = false, -}; - -static struct pinctrl_desc proxstream2_pinctrl_desc = { - .name = DRIVER_NAME, - .pins = proxstream2_pins, - .npins = ARRAY_SIZE(proxstream2_pins), - .owner = THIS_MODULE, +static struct uniphier_pinctrl_socdata uniphier_pxs2_pindata = { + .pins = uniphier_pxs2_pins, + .npins = ARRAY_SIZE(uniphier_pxs2_pins), + .groups = uniphier_pxs2_groups, + .groups_count = ARRAY_SIZE(uniphier_pxs2_groups), + .functions = uniphier_pxs2_functions, + .functions_count = ARRAY_SIZE(uniphier_pxs2_functions), + .caps = 0, }; -static int proxstream2_pinctrl_probe(struct platform_device *pdev) +static int uniphier_pxs2_pinctrl_probe(struct platform_device *pdev) { - return uniphier_pinctrl_probe(pdev, &proxstream2_pinctrl_desc, - &proxstream2_pindata); + return uniphier_pinctrl_probe(pdev, &uniphier_pxs2_pindata); } -static const struct of_device_id proxstream2_pinctrl_match[] = { +static const struct of_device_id uniphier_pxs2_pinctrl_match[] = { + { .compatible = "socionext,uniphier-pxs2-pinctrl" }, { .compatible = "socionext,proxstream2-pinctrl" }, { /* sentinel */ } }; -MODULE_DEVICE_TABLE(of, proxstream2_pinctrl_match); +MODULE_DEVICE_TABLE(of, uniphier_pxs2_pinctrl_match); -static struct platform_driver proxstream2_pinctrl_driver = { - .probe = proxstream2_pinctrl_probe, +static struct platform_driver uniphier_pxs2_pinctrl_driver = { + .probe = uniphier_pxs2_pinctrl_probe, .driver = { - .name = DRIVER_NAME, - .of_match_table = proxstream2_pinctrl_match, + .name = "uniphier-pxs2-pinctrl", + .of_match_table = uniphier_pxs2_pinctrl_match, }, }; -module_platform_driver(proxstream2_pinctrl_driver); +module_platform_driver(uniphier_pxs2_pinctrl_driver); MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>"); MODULE_DESCRIPTION("UniPhier ProXstream2 pinctrl driver"); diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c index ceb7a9899bde..8ea740df9e6b 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c @@ -19,453 +19,510 @@ #include "pinctrl-uniphier.h" -#define DRIVER_NAME "ph1-sld8-pinctrl" - -static const struct pinctrl_pin_desc ph1_sld8_pins[] = { +static const struct pinctrl_pin_desc uniphier_sld8_pins[] = { UNIPHIER_PINCTRL_PIN(0, "PCA00", 0, - 15, UNIPHIER_PIN_DRV_4_8, + 15, UNIPHIER_PIN_DRV_1BIT, 15, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(1, "PCA01", 0, - 16, UNIPHIER_PIN_DRV_4_8, + 16, UNIPHIER_PIN_DRV_1BIT, 16, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(2, "PCA02", 0, - 17, UNIPHIER_PIN_DRV_4_8, + 17, UNIPHIER_PIN_DRV_1BIT, 17, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(3, "PCA03", 0, - 18, UNIPHIER_PIN_DRV_4_8, + 18, UNIPHIER_PIN_DRV_1BIT, 18, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(4, "PCA04", 0, - 19, UNIPHIER_PIN_DRV_4_8, + 19, UNIPHIER_PIN_DRV_1BIT, 19, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(5, "PCA05", 0, - 20, UNIPHIER_PIN_DRV_4_8, + 20, UNIPHIER_PIN_DRV_1BIT, 20, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(6, "PCA06", 0, - 21, UNIPHIER_PIN_DRV_4_8, + 21, UNIPHIER_PIN_DRV_1BIT, 21, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(7, "PCA07", 0, - 22, UNIPHIER_PIN_DRV_4_8, + 22, UNIPHIER_PIN_DRV_1BIT, 22, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(8, "PCA08", 0, - 23, UNIPHIER_PIN_DRV_4_8, + 23, UNIPHIER_PIN_DRV_1BIT, 23, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(9, "PCA09", 0, - 24, UNIPHIER_PIN_DRV_4_8, + 24, UNIPHIER_PIN_DRV_1BIT, 24, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(10, "PCA10", 0, - 25, UNIPHIER_PIN_DRV_4_8, + 25, UNIPHIER_PIN_DRV_1BIT, 25, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(11, "PCA11", 0, - 26, UNIPHIER_PIN_DRV_4_8, + 26, UNIPHIER_PIN_DRV_1BIT, 26, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(12, "PCA12", 0, - 27, UNIPHIER_PIN_DRV_4_8, + 27, UNIPHIER_PIN_DRV_1BIT, 27, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(13, "PCA13", 0, - 28, UNIPHIER_PIN_DRV_4_8, + 28, UNIPHIER_PIN_DRV_1BIT, 28, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(14, "PCA14", 0, - 29, UNIPHIER_PIN_DRV_4_8, + 29, UNIPHIER_PIN_DRV_1BIT, 29, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(15, "XNFRE_GB", UNIPHIER_PIN_IECTRL_NONE, - 30, UNIPHIER_PIN_DRV_4_8, + 30, UNIPHIER_PIN_DRV_1BIT, 30, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(16, "XNFWE_GB", UNIPHIER_PIN_IECTRL_NONE, - 31, UNIPHIER_PIN_DRV_4_8, + 31, UNIPHIER_PIN_DRV_1BIT, 31, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(17, "NFALE_GB", UNIPHIER_PIN_IECTRL_NONE, - 32, UNIPHIER_PIN_DRV_4_8, + 32, UNIPHIER_PIN_DRV_1BIT, 32, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(18, "NFCLE_GB", UNIPHIER_PIN_IECTRL_NONE, - 33, UNIPHIER_PIN_DRV_4_8, + 33, UNIPHIER_PIN_DRV_1BIT, 33, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(19, "XNFWP_GB", UNIPHIER_PIN_IECTRL_NONE, - 34, UNIPHIER_PIN_DRV_4_8, + 34, UNIPHIER_PIN_DRV_1BIT, 34, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(20, "XNFCE0_GB", UNIPHIER_PIN_IECTRL_NONE, - 35, UNIPHIER_PIN_DRV_4_8, + 35, UNIPHIER_PIN_DRV_1BIT, 35, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(21, "NANDRYBY0_GB", UNIPHIER_PIN_IECTRL_NONE, - 36, UNIPHIER_PIN_DRV_4_8, + 36, UNIPHIER_PIN_DRV_1BIT, 36, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(22, "XNFCE1_GB", UNIPHIER_PIN_IECTRL_NONE, - 0, UNIPHIER_PIN_DRV_8_12_16_20, + 0, UNIPHIER_PIN_DRV_2BIT, 119, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(23, "NANDRYBY1_GB", UNIPHIER_PIN_IECTRL_NONE, - 4, UNIPHIER_PIN_DRV_8_12_16_20, + 1, UNIPHIER_PIN_DRV_2BIT, 120, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(24, "NFD0_GB", UNIPHIER_PIN_IECTRL_NONE, - 8, UNIPHIER_PIN_DRV_8_12_16_20, + 2, UNIPHIER_PIN_DRV_2BIT, 121, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(25, "NFD1_GB", UNIPHIER_PIN_IECTRL_NONE, - 12, UNIPHIER_PIN_DRV_8_12_16_20, + 3, UNIPHIER_PIN_DRV_2BIT, 122, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(26, "NFD2_GB", UNIPHIER_PIN_IECTRL_NONE, - 16, UNIPHIER_PIN_DRV_8_12_16_20, + 4, UNIPHIER_PIN_DRV_2BIT, 123, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(27, "NFD3_GB", UNIPHIER_PIN_IECTRL_NONE, - 20, UNIPHIER_PIN_DRV_8_12_16_20, + 5, UNIPHIER_PIN_DRV_2BIT, 124, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(28, "NFD4_GB", UNIPHIER_PIN_IECTRL_NONE, - 24, UNIPHIER_PIN_DRV_8_12_16_20, + 6, UNIPHIER_PIN_DRV_2BIT, 125, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(29, "NFD5_GB", UNIPHIER_PIN_IECTRL_NONE, - 28, UNIPHIER_PIN_DRV_8_12_16_20, + 7, UNIPHIER_PIN_DRV_2BIT, 126, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(30, "NFD6_GB", UNIPHIER_PIN_IECTRL_NONE, - 32, UNIPHIER_PIN_DRV_8_12_16_20, + 8, UNIPHIER_PIN_DRV_2BIT, 127, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(31, "NFD7_GB", UNIPHIER_PIN_IECTRL_NONE, - 36, UNIPHIER_PIN_DRV_8_12_16_20, + 9, UNIPHIER_PIN_DRV_2BIT, 128, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(32, "SDCLK", 8, - 40, UNIPHIER_PIN_DRV_8_12_16_20, + 10, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(33, "SDCMD", 8, - 44, UNIPHIER_PIN_DRV_8_12_16_20, + 11, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(34, "SDDAT0", 8, - 48, UNIPHIER_PIN_DRV_8_12_16_20, + 12, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(35, "SDDAT1", 8, - 52, UNIPHIER_PIN_DRV_8_12_16_20, + 13, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(36, "SDDAT2", 8, - 56, UNIPHIER_PIN_DRV_8_12_16_20, + 14, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(37, "SDDAT3", 8, - 60, UNIPHIER_PIN_DRV_8_12_16_20, + 15, UNIPHIER_PIN_DRV_2BIT, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(38, "SDCD", 8, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 129, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(39, "SDWP", 8, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 130, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(40, "SDVOLC", 9, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 131, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(41, "USB0VBUS", 0, - 37, UNIPHIER_PIN_DRV_4_8, + 37, UNIPHIER_PIN_DRV_1BIT, 37, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(42, "USB0OD", 0, - 38, UNIPHIER_PIN_DRV_4_8, + 38, UNIPHIER_PIN_DRV_1BIT, 38, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(43, "USB1VBUS", 0, - 39, UNIPHIER_PIN_DRV_4_8, + 39, UNIPHIER_PIN_DRV_1BIT, 39, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(44, "USB1OD", 0, - 40, UNIPHIER_PIN_DRV_4_8, + 40, UNIPHIER_PIN_DRV_1BIT, 40, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(45, "PCRESET", 0, - 41, UNIPHIER_PIN_DRV_4_8, + 41, UNIPHIER_PIN_DRV_1BIT, 41, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(46, "PCREG", 0, - 42, UNIPHIER_PIN_DRV_4_8, + 42, UNIPHIER_PIN_DRV_1BIT, 42, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(47, "PCCE2", 0, - 43, UNIPHIER_PIN_DRV_4_8, + 43, UNIPHIER_PIN_DRV_1BIT, 43, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(48, "PCVS1", 0, - 44, UNIPHIER_PIN_DRV_4_8, + 44, UNIPHIER_PIN_DRV_1BIT, 44, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(49, "PCCD2", 0, - 45, UNIPHIER_PIN_DRV_4_8, + 45, UNIPHIER_PIN_DRV_1BIT, 45, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(50, "PCCD1", 0, - 46, UNIPHIER_PIN_DRV_4_8, + 46, UNIPHIER_PIN_DRV_1BIT, 46, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(51, "PCREADY", 0, - 47, UNIPHIER_PIN_DRV_4_8, + 47, UNIPHIER_PIN_DRV_1BIT, 47, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(52, "PCDOE", 0, - 48, UNIPHIER_PIN_DRV_4_8, + 48, UNIPHIER_PIN_DRV_1BIT, 48, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(53, "PCCE1", 0, - 49, UNIPHIER_PIN_DRV_4_8, + 49, UNIPHIER_PIN_DRV_1BIT, 49, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(54, "PCWE", 0, - 50, UNIPHIER_PIN_DRV_4_8, + 50, UNIPHIER_PIN_DRV_1BIT, 50, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(55, "PCOE", 0, - 51, UNIPHIER_PIN_DRV_4_8, + 51, UNIPHIER_PIN_DRV_1BIT, 51, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(56, "PCWAIT", 0, - 52, UNIPHIER_PIN_DRV_4_8, + 52, UNIPHIER_PIN_DRV_1BIT, 52, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(57, "PCIOWR", 0, - 53, UNIPHIER_PIN_DRV_4_8, + 53, UNIPHIER_PIN_DRV_1BIT, 53, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(58, "PCIORD", 0, - 54, UNIPHIER_PIN_DRV_4_8, + 54, UNIPHIER_PIN_DRV_1BIT, 54, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(59, "HS0DIN0", 0, - 55, UNIPHIER_PIN_DRV_4_8, + 55, UNIPHIER_PIN_DRV_1BIT, 55, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(60, "HS0DIN1", 0, - 56, UNIPHIER_PIN_DRV_4_8, + 56, UNIPHIER_PIN_DRV_1BIT, 56, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(61, "HS0DIN2", 0, - 57, UNIPHIER_PIN_DRV_4_8, + 57, UNIPHIER_PIN_DRV_1BIT, 57, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(62, "HS0DIN3", 0, - 58, UNIPHIER_PIN_DRV_4_8, + 58, UNIPHIER_PIN_DRV_1BIT, 58, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(63, "HS0DIN4", 0, - 59, UNIPHIER_PIN_DRV_4_8, + 59, UNIPHIER_PIN_DRV_1BIT, 59, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(64, "HS0DIN5", 0, - 60, UNIPHIER_PIN_DRV_4_8, + 60, UNIPHIER_PIN_DRV_1BIT, 60, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(65, "HS0DIN6", 0, - 61, UNIPHIER_PIN_DRV_4_8, + 61, UNIPHIER_PIN_DRV_1BIT, 61, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(66, "HS0DIN7", 0, - 62, UNIPHIER_PIN_DRV_4_8, + 62, UNIPHIER_PIN_DRV_1BIT, 62, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(67, "HS0BCLKIN", 0, - 63, UNIPHIER_PIN_DRV_4_8, + 63, UNIPHIER_PIN_DRV_1BIT, 63, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(68, "HS0VALIN", 0, - 64, UNIPHIER_PIN_DRV_4_8, + 64, UNIPHIER_PIN_DRV_1BIT, 64, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(69, "HS0SYNCIN", 0, - 65, UNIPHIER_PIN_DRV_4_8, + 65, UNIPHIER_PIN_DRV_1BIT, 65, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(70, "HSDOUT0", 0, - 66, UNIPHIER_PIN_DRV_4_8, + 66, UNIPHIER_PIN_DRV_1BIT, 66, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(71, "HSDOUT1", 0, - 67, UNIPHIER_PIN_DRV_4_8, + 67, UNIPHIER_PIN_DRV_1BIT, 67, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(72, "HSDOUT2", 0, - 68, UNIPHIER_PIN_DRV_4_8, + 68, UNIPHIER_PIN_DRV_1BIT, 68, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(73, "HSDOUT3", 0, - 69, UNIPHIER_PIN_DRV_4_8, + 69, UNIPHIER_PIN_DRV_1BIT, 69, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(74, "HSDOUT4", 0, - 70, UNIPHIER_PIN_DRV_4_8, + 70, UNIPHIER_PIN_DRV_1BIT, 70, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(75, "HSDOUT5", 0, - 71, UNIPHIER_PIN_DRV_4_8, + 71, UNIPHIER_PIN_DRV_1BIT, 71, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(76, "HSDOUT6", 0, - 72, UNIPHIER_PIN_DRV_4_8, + 72, UNIPHIER_PIN_DRV_1BIT, 72, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(77, "HSDOUT7", 0, - 73, UNIPHIER_PIN_DRV_4_8, + 73, UNIPHIER_PIN_DRV_1BIT, 73, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(78, "HSBCLKOUT", 0, - 74, UNIPHIER_PIN_DRV_4_8, + 74, UNIPHIER_PIN_DRV_1BIT, 74, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(79, "HSVALOUT", 0, - 75, UNIPHIER_PIN_DRV_4_8, + 75, UNIPHIER_PIN_DRV_1BIT, 75, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(80, "HSSYNCOUT", 0, - 76, UNIPHIER_PIN_DRV_4_8, + 76, UNIPHIER_PIN_DRV_1BIT, 76, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(81, "HS1DIN0", 0, - 77, UNIPHIER_PIN_DRV_4_8, + 77, UNIPHIER_PIN_DRV_1BIT, 77, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(82, "HS1DIN1", 0, - 78, UNIPHIER_PIN_DRV_4_8, + 78, UNIPHIER_PIN_DRV_1BIT, 78, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(83, "HS1DIN2", 0, - 79, UNIPHIER_PIN_DRV_4_8, + 79, UNIPHIER_PIN_DRV_1BIT, 79, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(84, "HS1DIN3", 0, - 80, UNIPHIER_PIN_DRV_4_8, + 80, UNIPHIER_PIN_DRV_1BIT, 80, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(85, "HS1DIN4", 0, - 81, UNIPHIER_PIN_DRV_4_8, + 81, UNIPHIER_PIN_DRV_1BIT, 81, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(86, "HS1DIN5", 0, - 82, UNIPHIER_PIN_DRV_4_8, + 82, UNIPHIER_PIN_DRV_1BIT, 82, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(87, "HS1DIN6", 0, - 83, UNIPHIER_PIN_DRV_4_8, + 83, UNIPHIER_PIN_DRV_1BIT, 83, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(88, "HS1DIN7", 0, - 84, UNIPHIER_PIN_DRV_4_8, + 84, UNIPHIER_PIN_DRV_1BIT, 84, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(89, "HS1BCLKIN", 0, - 85, UNIPHIER_PIN_DRV_4_8, + 85, UNIPHIER_PIN_DRV_1BIT, 85, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(90, "HS1VALIN", 0, - 86, UNIPHIER_PIN_DRV_4_8, + 86, UNIPHIER_PIN_DRV_1BIT, 86, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(91, "HS1SYNCIN", 0, - 87, UNIPHIER_PIN_DRV_4_8, + 87, UNIPHIER_PIN_DRV_1BIT, 87, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(92, "AGCI", 3, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 132, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(93, "AGCR", 4, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 133, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(94, "AGCBS", 5, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, 134, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(95, "IECOUT", 0, - 88, UNIPHIER_PIN_DRV_4_8, + 88, UNIPHIER_PIN_DRV_1BIT, 88, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(96, "ASMCK", 0, - 89, UNIPHIER_PIN_DRV_4_8, + 89, UNIPHIER_PIN_DRV_1BIT, 89, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(97, "ABCKO", UNIPHIER_PIN_IECTRL_NONE, - 90, UNIPHIER_PIN_DRV_4_8, + 90, UNIPHIER_PIN_DRV_1BIT, 90, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(98, "ALRCKO", UNIPHIER_PIN_IECTRL_NONE, - 91, UNIPHIER_PIN_DRV_4_8, + 91, UNIPHIER_PIN_DRV_1BIT, 91, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(99, "ASDOUT0", UNIPHIER_PIN_IECTRL_NONE, - 92, UNIPHIER_PIN_DRV_4_8, + 92, UNIPHIER_PIN_DRV_1BIT, 92, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(100, "ASDOUT1", UNIPHIER_PIN_IECTRL_NONE, - 93, UNIPHIER_PIN_DRV_4_8, + 93, UNIPHIER_PIN_DRV_1BIT, 93, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(101, "ARCOUT", 0, - 94, UNIPHIER_PIN_DRV_4_8, + 94, UNIPHIER_PIN_DRV_1BIT, 94, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(102, "SDA0", 10, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(103, "SCL0", 10, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(104, "SDA1", 11, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(105, "SCL1", 11, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(106, "DMDSDA0", 12, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(107, "DMDSCL0", 12, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(108, "DMDSDA1", 13, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(109, "DMDSCL1", 13, - -1, UNIPHIER_PIN_DRV_FIXED_4, + -1, UNIPHIER_PIN_DRV_FIXED4, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(110, "SBO0", UNIPHIER_PIN_IECTRL_NONE, - 95, UNIPHIER_PIN_DRV_4_8, + 95, UNIPHIER_PIN_DRV_1BIT, 95, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(111, "SBI0", UNIPHIER_PIN_IECTRL_NONE, - 96, UNIPHIER_PIN_DRV_4_8, + 96, UNIPHIER_PIN_DRV_1BIT, 96, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(112, "SBO1", 0, - 97, UNIPHIER_PIN_DRV_4_8, + 97, UNIPHIER_PIN_DRV_1BIT, 97, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(113, "SBI1", 0, - 98, UNIPHIER_PIN_DRV_4_8, + 98, UNIPHIER_PIN_DRV_1BIT, 98, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(114, "TXD1", 0, - 99, UNIPHIER_PIN_DRV_4_8, + 99, UNIPHIER_PIN_DRV_1BIT, 99, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(115, "RXD1", 0, - 100, UNIPHIER_PIN_DRV_4_8, + 100, UNIPHIER_PIN_DRV_1BIT, 100, UNIPHIER_PIN_PULL_UP), UNIPHIER_PINCTRL_PIN(116, "HIN", 1, - -1, UNIPHIER_PIN_DRV_FIXED_5, + -1, UNIPHIER_PIN_DRV_FIXED5, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(117, "VIN", 2, - -1, UNIPHIER_PIN_DRV_FIXED_5, + -1, UNIPHIER_PIN_DRV_FIXED5, -1, UNIPHIER_PIN_PULL_NONE), UNIPHIER_PINCTRL_PIN(118, "TCON0", 0, - 101, UNIPHIER_PIN_DRV_4_8, + 101, UNIPHIER_PIN_DRV_1BIT, 101, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(119, "TCON1", 0, - 102, UNIPHIER_PIN_DRV_4_8, + 102, UNIPHIER_PIN_DRV_1BIT, 102, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(120, "TCON2", 0, - 103, UNIPHIER_PIN_DRV_4_8, + 103, UNIPHIER_PIN_DRV_1BIT, 103, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(121, "TCON3", 0, - 104, UNIPHIER_PIN_DRV_4_8, + 104, UNIPHIER_PIN_DRV_1BIT, 104, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(122, "TCON4", 0, - 105, UNIPHIER_PIN_DRV_4_8, + 105, UNIPHIER_PIN_DRV_1BIT, 105, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(123, "TCON5", 0, - 106, UNIPHIER_PIN_DRV_4_8, + 106, UNIPHIER_PIN_DRV_1BIT, 106, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(124, "TCON6", 0, - 107, UNIPHIER_PIN_DRV_4_8, + 107, UNIPHIER_PIN_DRV_1BIT, 107, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(125, "TCON7", 0, - 108, UNIPHIER_PIN_DRV_4_8, + 108, UNIPHIER_PIN_DRV_1BIT, 108, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(126, "TCON8", 0, - 109, UNIPHIER_PIN_DRV_4_8, + 109, UNIPHIER_PIN_DRV_1BIT, 109, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(127, "PWMA", 0, - 110, UNIPHIER_PIN_DRV_4_8, + 110, UNIPHIER_PIN_DRV_1BIT, 110, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(128, "XIRQ0", 0, - 111, UNIPHIER_PIN_DRV_4_8, + 111, UNIPHIER_PIN_DRV_1BIT, 111, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(129, "XIRQ1", 0, - 112, UNIPHIER_PIN_DRV_4_8, + 112, UNIPHIER_PIN_DRV_1BIT, 112, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(130, "XIRQ2", 0, - 113, UNIPHIER_PIN_DRV_4_8, + 113, UNIPHIER_PIN_DRV_1BIT, 113, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(131, "XIRQ3", 0, - 114, UNIPHIER_PIN_DRV_4_8, + 114, UNIPHIER_PIN_DRV_1BIT, 114, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(132, "XIRQ4", 0, - 115, UNIPHIER_PIN_DRV_4_8, + 115, UNIPHIER_PIN_DRV_1BIT, 115, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(133, "XIRQ5", 0, - 116, UNIPHIER_PIN_DRV_4_8, + 116, UNIPHIER_PIN_DRV_1BIT, 116, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(134, "XIRQ6", 0, - 117, UNIPHIER_PIN_DRV_4_8, + 117, UNIPHIER_PIN_DRV_1BIT, 117, UNIPHIER_PIN_PULL_DOWN), UNIPHIER_PINCTRL_PIN(135, "XIRQ7", 0, - 118, UNIPHIER_PIN_DRV_4_8, + 118, UNIPHIER_PIN_DRV_1BIT, 118, UNIPHIER_PIN_PULL_DOWN), + /* dedicated pins */ + UNIPHIER_PINCTRL_PIN(136, "ED0", -1, + 0, UNIPHIER_PIN_DRV_1BIT, + 0, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(137, "ED1", -1, + 1, UNIPHIER_PIN_DRV_1BIT, + 1, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(138, "ED2", -1, + 2, UNIPHIER_PIN_DRV_1BIT, + 2, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(139, "ED3", -1, + 3, UNIPHIER_PIN_DRV_1BIT, + 3, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(140, "ED4", -1, + 4, UNIPHIER_PIN_DRV_1BIT, + 4, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(141, "ED5", -1, + 5, UNIPHIER_PIN_DRV_1BIT, + 5, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(142, "ED6", -1, + 6, UNIPHIER_PIN_DRV_1BIT, + 6, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(143, "ED7", -1, + 7, UNIPHIER_PIN_DRV_1BIT, + 7, UNIPHIER_PIN_PULL_DOWN), + UNIPHIER_PINCTRL_PIN(144, "XERWE0", -1, + 8, UNIPHIER_PIN_DRV_1BIT, + 8, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(145, "XERWE1", -1, + 9, UNIPHIER_PIN_DRV_1BIT, + 9, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(146, "ERXW", -1, + 10, UNIPHIER_PIN_DRV_1BIT, + 10, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(147, "ES0", -1, + 11, UNIPHIER_PIN_DRV_1BIT, + 11, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(148, "ES1", -1, + 12, UNIPHIER_PIN_DRV_1BIT, + 12, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(149, "ES2", -1, + 13, UNIPHIER_PIN_DRV_1BIT, + 13, UNIPHIER_PIN_PULL_UP), + UNIPHIER_PINCTRL_PIN(150, "XECS1", -1, + 14, UNIPHIER_PIN_DRV_1BIT, + 14, UNIPHIER_PIN_PULL_DOWN), }; static const unsigned emmc_pins[] = {21, 22, 23, 24, 25, 26, 27}; -static const unsigned emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; +static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; static const unsigned emmc_dat8_pins[] = {28, 29, 30, 31}; -static const unsigned emmc_dat8_muxvals[] = {1, 1, 1, 1}; +static const int emmc_dat8_muxvals[] = {1, 1, 1, 1}; static const unsigned i2c0_pins[] = {102, 103}; -static const unsigned i2c0_muxvals[] = {0, 0}; +static const int i2c0_muxvals[] = {0, 0}; static const unsigned i2c1_pins[] = {104, 105}; -static const unsigned i2c1_muxvals[] = {0, 0}; +static const int i2c1_muxvals[] = {0, 0}; static const unsigned i2c2_pins[] = {108, 109}; -static const unsigned i2c2_muxvals[] = {2, 2}; +static const int i2c2_muxvals[] = {2, 2}; static const unsigned i2c3_pins[] = {108, 109}; -static const unsigned i2c3_muxvals[] = {3, 3}; +static const int i2c3_muxvals[] = {3, 3}; static const unsigned nand_pins[] = {15, 16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31}; -static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0}; +static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned nand_cs1_pins[] = {22, 23}; -static const unsigned nand_cs1_muxvals[] = {0, 0}; +static const int nand_cs1_muxvals[] = {0, 0}; static const unsigned sd_pins[] = {32, 33, 34, 35, 36, 37, 38, 39, 40}; -static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned system_bus_pins[] = {136, 137, 138, 139, 140, 141, 142, + 143, 144, 145, 146, 147, 148, 149}; +static const int system_bus_muxvals[] = {-1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1}; +static const unsigned system_bus_cs1_pins[] = {150}; +static const int system_bus_cs1_muxvals[] = {-1}; +static const unsigned system_bus_cs2_pins[] = {10}; +static const int system_bus_cs2_muxvals[] = {1}; +static const unsigned system_bus_cs3_pins[] = {11}; +static const int system_bus_cs3_muxvals[] = {1}; +static const unsigned system_bus_cs4_pins[] = {12}; +static const int system_bus_cs4_muxvals[] = {1}; +static const unsigned system_bus_cs5_pins[] = {13}; +static const int system_bus_cs5_muxvals[] = {1}; static const unsigned uart0_pins[] = {70, 71}; -static const unsigned uart0_muxvals[] = {3, 3}; +static const int uart0_muxvals[] = {3, 3}; static const unsigned uart1_pins[] = {114, 115}; -static const unsigned uart1_muxvals[] = {0, 0}; +static const int uart1_muxvals[] = {0, 0}; static const unsigned uart2_pins[] = {112, 113}; -static const unsigned uart2_muxvals[] = {1, 1}; +static const int uart2_muxvals[] = {1, 1}; static const unsigned uart3_pins[] = {110, 111}; -static const unsigned uart3_muxvals[] = {1, 1}; +static const int uart3_muxvals[] = {1, 1}; static const unsigned usb0_pins[] = {41, 42}; -static const unsigned usb0_muxvals[] = {0, 0}; +static const int usb0_muxvals[] = {0, 0}; static const unsigned usb1_pins[] = {43, 44}; -static const unsigned usb1_muxvals[] = {0, 0}; +static const int usb1_muxvals[] = {0, 0}; static const unsigned usb2_pins[] = {114, 115}; -static const unsigned usb2_muxvals[] = {1, 1}; +static const int usb2_muxvals[] = {1, 1}; static const unsigned port_range0_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, /* PORT0x */ 8, 9, 10, 11, 12, 13, 14, 15, /* PORT1x */ @@ -481,7 +538,7 @@ static const unsigned port_range0_pins[] = { 48, 49, 46, 45, 123, 124, 125, 126, /* PORT11x */ 47, 127, 20, 56, 22, /* PORT120-124 */ }; -static const unsigned port_range0_muxvals[] = { +static const int port_range0_muxvals[] = { 15, 15, 15, 15, 15, 15, 15, 15, /* PORT0x */ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT1x */ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT2x */ @@ -499,37 +556,37 @@ static const unsigned port_range0_muxvals[] = { static const unsigned port_range1_pins[] = { 116, 117, /* PORT130-131 */ }; -static const unsigned port_range1_muxvals[] = { +static const int port_range1_muxvals[] = { 15, 15, /* PORT130-131 */ }; static const unsigned port_range2_pins[] = { 102, 103, 104, 105, 106, 107, 108, 109, /* PORT14x */ }; -static const unsigned port_range2_muxvals[] = { +static const int port_range2_muxvals[] = { 15, 15, 15, 15, 15, 15, 15, 15, /* PORT14x */ }; static const unsigned port_range3_pins[] = { 23, /* PORT166 */ }; -static const unsigned port_range3_muxvals[] = { +static const int port_range3_muxvals[] = { 15, /* PORT166 */ }; static const unsigned xirq_range0_pins[] = { 128, 129, 130, 131, 132, 133, 134, 135, /* XIRQ0-7 */ 82, 87, 88, 50, 51, /* XIRQ8-12 */ }; -static const unsigned xirq_range0_muxvals[] = { +static const int xirq_range0_muxvals[] = { 0, 0, 0, 0, 0, 0, 0, 0, /* XIRQ0-7 */ 14, 14, 14, 14, 14, /* XIRQ8-12 */ }; static const unsigned xirq_range1_pins[] = { 52, 58, /* XIRQ14-15 */ }; -static const unsigned xirq_range1_muxvals[] = { +static const int xirq_range1_muxvals[] = { 14, 14, /* XIRQ14-15 */ }; -static const struct uniphier_pinctrl_group ph1_sld8_groups[] = { +static const struct uniphier_pinctrl_group uniphier_sld8_groups[] = { UNIPHIER_PINCTRL_GROUP(emmc), UNIPHIER_PINCTRL_GROUP(emmc_dat8), UNIPHIER_PINCTRL_GROUP(i2c0), @@ -539,6 +596,12 @@ static const struct uniphier_pinctrl_group ph1_sld8_groups[] = { UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(system_bus), + UNIPHIER_PINCTRL_GROUP(system_bus_cs1), + UNIPHIER_PINCTRL_GROUP(system_bus_cs2), + UNIPHIER_PINCTRL_GROUP(system_bus_cs3), + UNIPHIER_PINCTRL_GROUP(system_bus_cs4), + UNIPHIER_PINCTRL_GROUP(system_bus_cs5), UNIPHIER_PINCTRL_GROUP(uart0), UNIPHIER_PINCTRL_GROUP(uart1), UNIPHIER_PINCTRL_GROUP(uart2), @@ -688,6 +751,12 @@ static const char * const i2c2_groups[] = {"i2c2"}; static const char * const i2c3_groups[] = {"i2c3"}; static const char * const nand_groups[] = {"nand", "nand_cs1"}; static const char * const sd_groups[] = {"sd"}; +static const char * const system_bus_groups[] = {"system_bus", + "system_bus_cs1", + "system_bus_cs2", + "system_bus_cs3", + "system_bus_cs4", + "system_bus_cs5"}; static const char * const uart0_groups[] = {"uart0"}; static const char * const uart1_groups[] = {"uart1"}; static const char * const uart2_groups[] = {"uart2"}; @@ -736,7 +805,7 @@ static const char * const xirq_groups[] = { "xirq12", /* none*/ "xirq14", "xirq15", }; -static const struct uniphier_pinmux_function ph1_sld8_functions[] = { +static const struct uniphier_pinmux_function uniphier_sld8_functions[] = { UNIPHIER_PINMUX_FUNCTION(emmc), UNIPHIER_PINMUX_FUNCTION(i2c0), UNIPHIER_PINMUX_FUNCTION(i2c1), @@ -744,6 +813,7 @@ static const struct uniphier_pinmux_function ph1_sld8_functions[] = { UNIPHIER_PINMUX_FUNCTION(i2c3), UNIPHIER_PINMUX_FUNCTION(nand), UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION(system_bus), UNIPHIER_PINMUX_FUNCTION(uart0), UNIPHIER_PINMUX_FUNCTION(uart1), UNIPHIER_PINMUX_FUNCTION(uart2), @@ -755,43 +825,36 @@ static const struct uniphier_pinmux_function ph1_sld8_functions[] = { UNIPHIER_PINMUX_FUNCTION(xirq), }; -static struct uniphier_pinctrl_socdata ph1_sld8_pindata = { - .groups = ph1_sld8_groups, - .groups_count = ARRAY_SIZE(ph1_sld8_groups), - .functions = ph1_sld8_functions, - .functions_count = ARRAY_SIZE(ph1_sld8_functions), - .mux_bits = 8, - .reg_stride = 4, - .load_pinctrl = false, -}; - -static struct pinctrl_desc ph1_sld8_pinctrl_desc = { - .name = DRIVER_NAME, - .pins = ph1_sld8_pins, - .npins = ARRAY_SIZE(ph1_sld8_pins), - .owner = THIS_MODULE, +static struct uniphier_pinctrl_socdata uniphier_sld8_pindata = { + .pins = uniphier_sld8_pins, + .npins = ARRAY_SIZE(uniphier_sld8_pins), + .groups = uniphier_sld8_groups, + .groups_count = ARRAY_SIZE(uniphier_sld8_groups), + .functions = uniphier_sld8_functions, + .functions_count = ARRAY_SIZE(uniphier_sld8_functions), + .caps = 0, }; -static int ph1_sld8_pinctrl_probe(struct platform_device *pdev) +static int uniphier_sld8_pinctrl_probe(struct platform_device *pdev) { - return uniphier_pinctrl_probe(pdev, &ph1_sld8_pinctrl_desc, - &ph1_sld8_pindata); + return uniphier_pinctrl_probe(pdev, &uniphier_sld8_pindata); } -static const struct of_device_id ph1_sld8_pinctrl_match[] = { +static const struct of_device_id uniphier_sld8_pinctrl_match[] = { + { .compatible = "socionext,uniphier-sld8-pinctrl" }, { .compatible = "socionext,ph1-sld8-pinctrl" }, { /* sentinel */ } }; -MODULE_DEVICE_TABLE(of, ph1_sld8_pinctrl_match); +MODULE_DEVICE_TABLE(of, uniphier_sld8_pinctrl_match); -static struct platform_driver ph1_sld8_pinctrl_driver = { - .probe = ph1_sld8_pinctrl_probe, +static struct platform_driver uniphier_sld8_pinctrl_driver = { + .probe = uniphier_sld8_pinctrl_probe, .driver = { - .name = DRIVER_NAME, - .of_match_table = ph1_sld8_pinctrl_match, + .name = "uniphier-sld8-pinctrl", + .of_match_table = uniphier_sld8_pinctrl_match, }, }; -module_platform_driver(ph1_sld8_pinctrl_driver); +module_platform_driver(uniphier_sld8_pinctrl_driver); MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>"); MODULE_DESCRIPTION("UniPhier PH1-sLD8 pinctrl driver"); diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h index a21154f4b453..923f36cb245d 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h @@ -15,14 +15,18 @@ #ifndef __PINCTRL_UNIPHIER_H__ #define __PINCTRL_UNIPHIER_H__ +#include <linux/bitops.h> #include <linux/bug.h> #include <linux/kernel.h> #include <linux/types.h> +struct platform_device; + #define UNIPHIER_PINCTRL_PINMUX_BASE 0x0 #define UNIPHIER_PINCTRL_LOAD_PINMUX 0x700 #define UNIPHIER_PINCTRL_DRVCTRL_BASE 0x800 #define UNIPHIER_PINCTRL_DRV2CTRL_BASE 0x900 +#define UNIPHIER_PINCTRL_DRV3CTRL_BASE 0x980 #define UNIPHIER_PINCTRL_PUPDCTRL_BASE 0xa00 #define UNIPHIER_PINCTRL_IECTRL 0xd00 @@ -39,16 +43,16 @@ #define UNIPHIER_PIN_DRVCTRL_MASK ((1UL << (UNIPHIER_PIN_DRVCTRL_BITS)) \ - 1) -/* supported drive strength (mA) */ -#define UNIPHIER_PIN_DRV_STR_SHIFT ((UNIPHIER_PIN_DRVCTRL_SHIFT) + \ +/* drive control type */ +#define UNIPHIER_PIN_DRV_TYPE_SHIFT ((UNIPHIER_PIN_DRVCTRL_SHIFT) + \ (UNIPHIER_PIN_DRVCTRL_BITS)) -#define UNIPHIER_PIN_DRV_STR_BITS 3 -#define UNIPHIER_PIN_DRV_STR_MASK ((1UL << (UNIPHIER_PIN_DRV_STR_BITS)) \ +#define UNIPHIER_PIN_DRV_TYPE_BITS 3 +#define UNIPHIER_PIN_DRV_TYPE_MASK ((1UL << (UNIPHIER_PIN_DRV_TYPE_BITS)) \ - 1) /* pull-up / pull-down register number */ -#define UNIPHIER_PIN_PUPDCTRL_SHIFT ((UNIPHIER_PIN_DRV_STR_SHIFT) + \ - (UNIPHIER_PIN_DRV_STR_BITS)) +#define UNIPHIER_PIN_PUPDCTRL_SHIFT ((UNIPHIER_PIN_DRV_TYPE_SHIFT) + \ + (UNIPHIER_PIN_DRV_TYPE_BITS)) #define UNIPHIER_PIN_PUPDCTRL_BITS 9 #define UNIPHIER_PIN_PUPDCTRL_MASK ((1UL << (UNIPHIER_PIN_PUPDCTRL_BITS))\ - 1) @@ -66,13 +70,14 @@ #define UNIPHIER_PIN_IECTRL_NONE (UNIPHIER_PIN_IECTRL_MASK) -/* selectable drive strength */ -enum uniphier_pin_drv_str { - UNIPHIER_PIN_DRV_4_8, /* 2 level control: 4/8 mA */ - UNIPHIER_PIN_DRV_8_12_16_20, /* 4 level control: 8/12/16/20 mA */ - UNIPHIER_PIN_DRV_FIXED_4, /* fixed to 4mA */ - UNIPHIER_PIN_DRV_FIXED_5, /* fixed to 5mA */ - UNIPHIER_PIN_DRV_FIXED_8, /* fixed to 8mA */ +/* drive control type */ +enum uniphier_pin_drv_type { + UNIPHIER_PIN_DRV_1BIT, /* 2 level control: 4/8 mA */ + UNIPHIER_PIN_DRV_2BIT, /* 4 level control: 8/12/16/20 mA */ + UNIPHIER_PIN_DRV_3BIT, /* 8 level control: 4/5/7/9/11/12/14/16 mA */ + UNIPHIER_PIN_DRV_FIXED4, /* fixed to 4mA */ + UNIPHIER_PIN_DRV_FIXED5, /* fixed to 5mA */ + UNIPHIER_PIN_DRV_FIXED8, /* fixed to 8mA */ UNIPHIER_PIN_DRV_NONE, /* no support (input only pin) */ }; @@ -89,17 +94,17 @@ enum uniphier_pin_pull_dir { (((x) & (UNIPHIER_PIN_IECTRL_MASK)) << (UNIPHIER_PIN_IECTRL_SHIFT)) #define UNIPHIER_PIN_DRVCTRL(x) \ (((x) & (UNIPHIER_PIN_DRVCTRL_MASK)) << (UNIPHIER_PIN_DRVCTRL_SHIFT)) -#define UNIPHIER_PIN_DRV_STR(x) \ - (((x) & (UNIPHIER_PIN_DRV_STR_MASK)) << (UNIPHIER_PIN_DRV_STR_SHIFT)) +#define UNIPHIER_PIN_DRV_TYPE(x) \ + (((x) & (UNIPHIER_PIN_DRV_TYPE_MASK)) << (UNIPHIER_PIN_DRV_TYPE_SHIFT)) #define UNIPHIER_PIN_PUPDCTRL(x) \ (((x) & (UNIPHIER_PIN_PUPDCTRL_MASK)) << (UNIPHIER_PIN_PUPDCTRL_SHIFT)) #define UNIPHIER_PIN_PULL_DIR(x) \ (((x) & (UNIPHIER_PIN_PULL_DIR_MASK)) << (UNIPHIER_PIN_PULL_DIR_SHIFT)) -#define UNIPHIER_PIN_ATTR_PACKED(iectrl, drvctrl, drv_str, pupdctrl, pull_dir)\ +#define UNIPHIER_PIN_ATTR_PACKED(iectrl, drvctrl, drv_type, pupdctrl, pull_dir)\ (UNIPHIER_PIN_IECTRL(iectrl) | \ UNIPHIER_PIN_DRVCTRL(drvctrl) | \ - UNIPHIER_PIN_DRV_STR(drv_str) | \ + UNIPHIER_PIN_DRV_TYPE(drv_type) | \ UNIPHIER_PIN_PUPDCTRL(pupdctrl) | \ UNIPHIER_PIN_PULL_DIR(pull_dir)) @@ -115,10 +120,10 @@ static inline unsigned int uniphier_pin_get_drvctrl(void *drv_data) UNIPHIER_PIN_DRVCTRL_MASK; } -static inline unsigned int uniphier_pin_get_drv_str(void *drv_data) +static inline unsigned int uniphier_pin_get_drv_type(void *drv_data) { - return ((unsigned long)drv_data >> UNIPHIER_PIN_DRV_STR_SHIFT) & - UNIPHIER_PIN_DRV_STR_MASK; + return ((unsigned long)drv_data >> UNIPHIER_PIN_DRV_TYPE_SHIFT) & + UNIPHIER_PIN_DRV_TYPE_MASK; } static inline unsigned int uniphier_pin_get_pupdctrl(void *drv_data) @@ -143,7 +148,7 @@ struct uniphier_pinctrl_group { const char *name; const unsigned *pins; unsigned num_pins; - const unsigned *muxvals; + const int *muxvals; enum uniphier_pinmux_gpio_range_type range_type; }; @@ -154,13 +159,15 @@ struct uniphier_pinmux_function { }; struct uniphier_pinctrl_socdata { + const struct pinctrl_pin_desc *pins; + unsigned int npins; const struct uniphier_pinctrl_group *groups; int groups_count; const struct uniphier_pinmux_function *functions; int functions_count; - unsigned mux_bits; - unsigned reg_stride; - bool load_pinctrl; + unsigned int caps; +#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(1) +#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(0) }; #define UNIPHIER_PINCTRL_PIN(a, b, c, d, e, f, g) \ @@ -205,11 +212,7 @@ struct uniphier_pinctrl_socdata { .num_groups = ARRAY_SIZE(func##_groups), \ } -struct platform_device; -struct pinctrl_desc; - int uniphier_pinctrl_probe(struct platform_device *pdev, - struct pinctrl_desc *desc, struct uniphier_pinctrl_socdata *socdata); #endif /* __PINCTRL_UNIPHIER_H__ */ |