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2013-05-08ARM: dts: OMAP4: Fix ethernet IRQ for OMAP4 boardsJon Hunter
Commit ff5c9059 (ARM: dts: OMAP3+: Correct gpio #interrupts-cells property) updated the number of interrupt cells required for configuring gpios as interrupts for other devices (such as ethernet controllers). This update allowed the interrupt type (edge, level, etc) to be configured via device-tree (as described in the Documentation/devicetree/bindings/gpio/gpio-omap.txt). This broke ethernet support on the OMAP4 SDP board that defines a gpio as the ethernet IRQ because the interrupt type (level, edge, etc) was not getting configured correctly. This board use the ks8851 ethernet chip which has an active low interrupt. Fix this by defining the gpio interrupt as active-low in the device-tree binding. Please note that the OMAP4-VAR-SOM also uses the same ethernet controller and it is expected it will have the same problem. So the same fix is also applied to this board. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08xen: mask x2APIC feature in PVZhenzhong Duan
On x2apic enabled pvm, doing sysrq+l, got NULL pointer dereference as below. SysRq : Show backtrace of all active CPUs BUG: unable to handle kernel NULL pointer dereference at (null) IP: [<ffffffff8125e3cb>] memcpy+0xb/0x120 Call Trace: [<ffffffff81039633>] ? __x2apic_send_IPI_mask+0x73/0x160 [<ffffffff8103973e>] x2apic_send_IPI_all+0x1e/0x20 [<ffffffff8103498c>] arch_trigger_all_cpu_backtrace+0x6c/0xb0 [<ffffffff81501be4>] ? _raw_spin_lock_irqsave+0x34/0x50 [<ffffffff8131654e>] sysrq_handle_showallcpus+0xe/0x10 [<ffffffff8131616d>] __handle_sysrq+0x7d/0x140 [<ffffffff81316230>] ? __handle_sysrq+0x140/0x140 [<ffffffff81316287>] write_sysrq_trigger+0x57/0x60 [<ffffffff811ca996>] proc_reg_write+0x86/0xc0 [<ffffffff8116dd8e>] vfs_write+0xce/0x190 [<ffffffff8116e3e5>] sys_write+0x55/0x90 [<ffffffff8150a242>] system_call_fastpath+0x16/0x1b That's because apic points to apic_x2apic_cluster or apic_x2apic_phys but the basic element like cpumask isn't initialized. Mask x2APIC feature in pvm to avoid overwrite of apic pointer, update commit message per Konrad's suggestion. Signed-off-by: Zhenzhong Duan <zhenzhong.duan@oracle.com> Tested-by: Tamon Shiose <tamon.shiose@oracle.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2013-05-08xen/spinlock: Fix check from greater than to be also be greater or equal to.Konrad Rzeszutek Wilk
During review of git commit cb9c6f15f318aa3aeb62fe525aa5c6dcf6eee159 ("xen/spinlock: Check against default value of -1 for IRQ line.") Stefano pointed out a bug in the patch. Unfortunatly due to vacation timing the fix was not applied and this patch fixes it up. Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2013-05-08xen/smp/pvhvm: Don't point per_cpu(xen_vpcu, 33 and larger) to shared_infoKonrad Rzeszutek Wilk
As it will point to some data, but not event channel data (the shared_info has an array limited to 32). This means that for PVHVM guests with more than 32 VCPUs without the usage of VCPUOP_register_info any interrupts to VCPUs larger than 32 would have gone unnoticed during early bootup. That is OK, as during early bootup, in smp_init we end up calling the hotplug mechanism (xen_hvm_cpu_notify) which makes the VCPUOP_register_vcpu_info call for all VCPUs and we can receive interrupts on VCPUs 33 and further. This is just a cleanup. Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2013-05-08MIPS: microMIPS: Support dynamic ASID sizing.Steven J. Hill
Changes for pure microMIPS cores to dynamically determine the ASID size at boot time. Includes bug fix https://patchwork.linux-mips.org/patch/5230/ Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Signed-off-by: Jonas Gorski <jogo@openwrt.org>
2013-05-08MIPS: Allow ASID size to be determined at boot time.Steven J. Hill
Original patch by Ralf Baechle and removed by Harold Koerfgen with commit f67e4ffc79905482c3b9b8c8dd65197bac7eb508. This allows for more generic kernels since the size of the ASID and corresponding masks can be determined at run-time. This patch is also required for the new Aptiv cores and has been tested on Malta and Malta Aptiv platforms. [ralf@linux-mips.org: Added relevant part of fix https://patchwork.linux-mips.org/patch/5213/] Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08MIPS: FW: malta: Code formatting clean-ups.Steven J. Hill
Clean-up code according to the 'checkpatch.pl' script. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08MIPS: FW: Remove obsolete header file for MTI platforms.Steven J. Hill
Remove 'arch/mips/include/asm/mips-boards/prom.h' and get rid of all inclusions of it by Malta and SEAD-3 platforms. [ralf@linux-mips.org: Fold in John Crispin <blogic@openwrt.org>'s "MIPS: ar7 powertv build"]. [ralf@linux-mips.org: Fold in John Crispin <blogic@openwrt.org>'s "MIPS: unbreak powertv build"]. [ralf@linux-mips.org: Test. Build. Your. Fscking. Code. Or...] Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08MIPS: FW: malta: Use new common FW library variable processing.Steven J. Hill
Remove old YAMON prom code and use common firmware library code. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08MIPS: FW: sead3: Use new common FW library variable processing.Steven J. Hill
Remove old YAMON prom code and use common firmware library code. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08MIPS: FW: Add environment variable processing.Steven J. Hill
Add parsing of the environment and command line variables passed to the kernel to the firmware library. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08MIPS: Add declarations to MIPS Technologies Inc. generic header.Steven J. Hill
Add declaration of 'mips_scroll_message' and 'mips_display_message' to the common generic header file for the MIPS Technologies Inc. development boards. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08MIPS: sead3: Use generic suspend/resume for LEDs.Lars-Peter Clausen
Setting the LED_CORE_SUSPENDRESUME flag causes the LED driver core to call led_classdev_suspend/led_classdev_resume during suspend/resume. Since this is exactly what the driver's custom suspend/resume callbacks do we can replace them by setting the LED_CORE_SUSPENDRESUME flag. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08KVM: x86: fix maintenance of guest/host xcr0 stateMarcelo Tosatti
Emulation of xcr0 writes zero guest_xcr0_loaded variable so that subsequent VM-entry reloads CPU's xcr0 with guests xcr0 value. However, this is incorrect because guest_xcr0_loaded variable is read to decide whether to reload hosts xcr0. In case the vcpu thread is scheduled out after the guest_xcr0_loaded = 0 assignment, and scheduler decides to preload FPU: switch_to { __switch_to __math_state_restore restore_fpu_checking fpu_restore_checking if (use_xsave()) fpu_xrstor_checking xrstor64 with CPU's xcr0 == guests xcr0 Fix by properly restoring hosts xcr0 during emulation of xcr0 writes. Analyzed-by: Ulrich Obergfell <uobergfe@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-05-08arm64: Treat the bitops index argument as an 'int'Catalin Marinas
The bitops prototype use an 'int' as the bit index type but the asm implementation assume it to be a 'long'. Since the compiler does not guarantee zeroing the upper 32-bits in a register when used as 'int', change the bitops implementation accordingly. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-05-08arm64: Ignore the 'write' ESR flag on cache maintenance faultsCatalin Marinas
ESR.WnR bit is always set on data cache maintenance faults even though the page is not required to have write permission. If a translation fault (page not yet mapped) happens for read-only user address range, Linux incorrectly assumes a permission fault. This patch adds the check of the ESR.CM bit during the page fault handling to ignore the 'write' flag. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Tim Northover <Tim.Northover@arm.com> Cc: stable@vger.kernel.org
2013-05-08arm64: dts: fix #address-cells for foundation-v8Mark Rutland
Commit 90556ca1 ("arm64: vexpress: Add dts files for the ARMv8 RTSM models") added foundation-v8.dts, but erroneously set /cpus/#address-cells = <1> while providing two cells in each cpus/cpu@N node's reg property. As of commit ea393a2e ("arm64: smp: honour #address-size when parsing CPU reg property") we read in as many address cells as specified rather than always reading two. This means that for foundation-v8.dts, we only read the first reg cell (zero) for each cpu node, and receive a lot of warnings at boot of the form "/cpus/cpu@1: duplicate cpu reg properties in the DT". This patch corrects foundation-v8.dts to have the correct value for /cpus/#address-cells. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Will Deacon <will.deacon@arm.com> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-05-08arm64: vexpress: Add support for poweroff/restartCatalin Marinas
This patch adds the arm_pm_poweroff definition expected by the vexpress-poweroff.c driver and enables the latter for arm64. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Pawel Moll <pawel.moll@arm.com>
2013-05-08arm64: Enable support for the ARM GIC interrupt controllerCatalin Marinas
This patch enables ARM_GIC on the arm64 kernel. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-05-08Merge branch 'gic' into HEADCatalin Marinas
* arm64-prep-gic: irqchip: gic: Perform the gic_secondary_init() call via CPU notifier irqchip: gic: Call handle_bad_irq() directly arm: Move chained_irq_(enter|exit) to a generic file arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h
2013-05-08powerpc/powernv: Properly drop characters if console is closedBenjamin Herrenschmidt
If the firmware returns an error such as "closed" (or hardware error), we should drop characters. Currently we only do that when a firmware compatible with OPAL v2 APIs is detected, in the code that calls opal_console_write_buffer_space(), which didn't exist with OPAL v1 (or didn't work). However, when enabling early debug consoles, the flag indicating that v2 is supported isn't set yet, causing us, in case of errors or closed console, to spin forever. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-05-07Merge branch 'akpm' (incoming from Andrew)Linus Torvalds
Merge more incoming from Andrew Morton: - Various fixes which were stalled or which I picked up recently - A large rotorooting of the AIO code. Allegedly to improve performance but I don't really have good performance numbers (I might have lost the email) and I can't raise Kent today. I held this out of 3.9 and we could give it another cycle if it's all too late/scary. I ended up taking only the first two thirds of the AIO rotorooting. I left the percpu parts and the batch completion for later. - Linus * emailed patches from Andrew Morton <akpm@linux-foundation.org>: (33 commits) aio: don't include aio.h in sched.h aio: kill ki_retry aio: kill ki_key aio: give shared kioctx fields their own cachelines aio: kill struct aio_ring_info aio: kill batch allocation aio: change reqs_active to include unreaped completions aio: use cancellation list lazily aio: use flush_dcache_page() aio: make aio_read_evt() more efficient, convert to hrtimers wait: add wait_event_hrtimeout() aio: refcounting cleanup aio: make aio_put_req() lockless aio: do fget() after aio_get_req() aio: dprintk() -> pr_debug() aio: move private stuff out of aio.h aio: add kiocb_cancel() aio: kill return value of aio_complete() char: add aio_{read,write} to /dev/{null,zero} aio: remove retry-based AIO ...
2013-05-07aio: don't include aio.h in sched.hKent Overstreet
Faster kernel compiles by way of fewer unnecessary includes. [akpm@linux-foundation.org: fix fallout] [akpm@linux-foundation.org: fix build] Signed-off-by: Kent Overstreet <koverstreet@google.com> Cc: Zach Brown <zab@redhat.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Mark Fasheh <mfasheh@suse.com> Cc: Joel Becker <jlbec@evilplan.org> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Jens Axboe <axboe@kernel.dk> Cc: Asai Thambi S P <asamymuthupa@micron.com> Cc: Selvan Mani <smani@micron.com> Cc: Sam Bradshaw <sbradshaw@micron.com> Cc: Jeff Moyer <jmoyer@redhat.com> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: Benjamin LaHaise <bcrl@kvack.org> Reviewed-by: "Theodore Ts'o" <tytso@mit.edu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-05-08MIPS: Export symbols used by KVM/MIPS moduleSanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08MIPS: ASM offsets for VCPU arch specific fields.Sanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08MIPS: If KVM is enabled then use the KVM specific routine to flush the TLBs ↵Sanjay Lal
on a ASID wrap. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08MIPS: Export routines needed by the KVM module.Sanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: Routines to handle specific traps/exceptions while executing the ↵Sanjay Lal
guest. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: Guest interrupt delivery.Sanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: COP0 accesses profiling.Sanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: Release notes and KVM module MakefileSanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: MMU/TLB operations for the Guest.Sanjay Lal
- Note that this file is statically linked with the rest of the host kernel (KSEG0). This is because kernel modules are loaded into mapped space on MIPS and we want to make sure that we don't get any host kernel TLB faults while manipulating TLBs. - Virtual Guest TLBs are implemented as 64 entry array regardless of the number of host TLB entries. - Shadow TLBs map Guest virtual addresses to Host physical addresses. - TLB miss handling details: Guest KSEG0 TLBMISS (0x40000000 – 0x60000000): Transparent to the Guest. Guest KSEG2/3 (0x60000000 – 0x80000000) & Guest UM TLBMISS (0x00000000 – 0x40000000) Lookup in Guest/Virtual TLB If an entry doesn’t match deliver appropriate TLBMISS LD/ST exception to the guest If entry does exist in the Guest TLB and is NOT Valid Deliver TLB invalid exception to the guest If entry does exist in the Guest TLB and is VALID Inject the TLB entry into the Shadow TLB Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: Privileged instruction/target branch emulation.Sanjay Lal
- The Guest kernel is run in UM and privileged instructions cause a trap. - If the instruction causing the trap is in a branch delay slot, the branch needs to be emulated to figure out the PC @ which the guest will resume execution. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: KVM Guest kernel support.Sanjay Lal
Both Guest kernel and Guest Userspace execute in UM. The memory map is as follows: Guest User address space: 0x00000000 -> 0x40000000 Guest Kernel Unmapped: 0x40000000 -> 0x60000000 Guest Kernel Mapped: 0x60000000 -> 0x80000000 - Guest Usermode virtual memory is limited to 1GB. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: MIPS arch specific APIs for KVMSanjay Lal
- Implements the arch specific APIs for KVM, some are stubs for MIPS - kvm_mips_handle_exit(): Main 'C' distpatch routine for handling exceptions while in "Guest" mode. - Also implements in-kernel timer interrupt support for the guest. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: Entry point for trampolining to the guest and trap handlers.Sanjay Lal
- __kvm_mips_vcpu_run: main entry point to enter guest, we save kernel context, load up guest context from and ERET to guest context. - mips32_exception: L1 exception handler(s), save k0/k1 and jump to main handlers. - mips32_GuestException: Generic exception handlers for exceptions/interrupts while in guest context. Save guest context, restore some kernel context and jump to main 'C' handler: kvm_mips_handle_exit() Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: Arch specific KVM data structures.Sanjay Lal
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: Infrastructure/build files.Sanjay Lal
- Add the KVM option to MIPS build files. - Add default config files for KVM host/guest kernels. - Change the link address for the Malta KVM Guest kernel to UM (0x40100000). - Add KVM Kconfig file with KVM/MIPS specific options Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08MIPS: IP27: Remove pfn_t.Ralf Baechle
In the Linux kernel traditionally pfns are represented by an unsigned long. However a few bits of the SGI IP27 platform code that were ported from IRIX are using pfn_t for historic reasons. This is conflicting with KVM's use of pfn_t. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-07parisc: remove the second argument of kmap_atomic()Zhao Hongjiang
kmap_atomic() requires only one argument now. Signed-off-by: Zhao Hongjiang <zhaohongjiang@huawei.com> Cc: "James E.J. Bottomley" <jejb@parisc-linux.org> Cc: Helge Deller <deller@gmx.de> Cc: Rolf Eike Beer <eike-kernel@sf-tec.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-05-07mm/SPARC: use common help functions to free reserved pagesJiang Liu
Use common help functions to free reserved pages. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-05-07arm: fix mismerge of arch/arm/mach-omap2/timer.cLinus Torvalds
I badly screwed up the merge in commit 6fa52ed33bea ("Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/.../arm-soc") by incorrectly taking the arch/arm/mach-omap2/* data fully from the merge target because the 'drivers-for-linus' branch seemed to be a proper superset of the duplicate ARM commits. That was bogus: commit ff931c821bab ("ARM: OMAP: clocks: Delay clk inits atleast until slab is initialized") only existed in head, and the changes to arch/arm/mach-omap2/timer.c from that commit got list. Re-doing the merge more carefully, I do think this part was the only thing I screwed up. Knock wood. Reported-by: Tony Lindgren <tony@atomide.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-05-08Merge branch 'mips-next-3.10' of ↵Ralf Baechle
git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
2013-05-08MIPS: BCM63XX: add missing clocks for BCM6328 and BCM6362Jonas Gorski
Add some mosty unused, but missing clocks for BCM6328 and BCM6362. This also fixes PCIe init on BCM6362. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5200/ Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08MIPS: ath79: make use of the new memory detection codeJohn Crispin
There is now a generic function for detecting memory size. Use this instead of the one found in the ath79 support. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5149/
2013-05-08MIPS: ralink: make use of the new memory detection codeJohn Crispin
Call detect_memory_region() from plat_mem_setup() unless the size was already read from the system controller. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5184/
2013-05-08MIPS: ralink: add memory definition for MT7620John Crispin
Populate struct soc_info with the data that describes our RAM window. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5183/
2013-05-08MIPS: ralink: add memory definition for RT3883John Crispin
Populate struct soc_info with the data that describes our RAM window. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5182/
2013-05-08MIPS: ralink: add memory definition for RT2880John Crispin
Populate struct soc_info with the data that describes our RAM window. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5181/
2013-05-08MIPS: ralink: add memory definition for RT305xJohn Crispin
Populate struct soc_info with the data that describes our RAM window. As memory detection fails on RT5350 we read the amount of available memory from the system controller. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5180/
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