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path: root/drivers/gpu/drm/amd
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2017-04-28drm/amdgpu/gfx9: bypass clockgating settingXiangliang Yu
For SRIOV doesn't need clockgating, bypass it. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu/mmhub_v1: bypass clockgating settingXiangliang Yu
For SRIOV doesn't need CG, so bypass it. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: fix coding style and printing in amdgpu_doorbell_initChristian König
Based on commit "drm/radeon: remove useless and potentially wrong message". The size of the info printing is incorrect and the PCI subsystems prints the same info on boot anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu/virt: don't check VALID bit for FLR completion messagePixel Ding
The interrupt after FLR is missed sometimes due to hardware reason, so guest driver get the notification of FLR completion via polling message. Then host doesn't write VALID bit to avoid sending interrupt, otherwise the completion will be handled twice. So there's a valid message without VALID bit for FLR completion, driver should handle it without checking. Signed-off-by: Pixel Ding <Pixel.Ding@amd.com> Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: fix double_offchip_lds_buf for gfx v6Junwei Zhang
Was incorrect for SI. Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2017-04-28drm/amd/powerplay: delete dead functions in vega10.Rex Zhu
Vega10 does not support AVFS BTC, remove function. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amd/amdgpu: coding style refine in sdma_v4_0.cRex Zhu
Replace 8 spaces with tabs. correct {} braces, etc. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: Remove redundant itermediate return val in sdma_v4_0.cRex Zhu
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: fix to print incorrect wptr addressHuang Rui
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: fix dead lock if any ip block resume failed in s3Huang Rui
Driver must free the console lock whether driver resuming successful or not. Otherwise, fb_console will be always waiting for the lock and then cause system stuck. [ 244.405541] INFO: task kworker/0:0:4 blocked for more than 120 seconds. [ 244.405543] Tainted: G OE 4.9.0-custom #1 [ 244.405544] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. [ 244.405541] INFO: task kworker/0:0:4 blocked for more than 120 seconds. [ 244.405543] Tainted: G OE 4.9.0-custom #1 [ 244.405544] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. [ 244.405550] kworker/0:0 D 0 4 2 0x00080000 [ 244.405559] Workqueue: events console_callback [ 244.405564] ffff88045a2cfc00 0000000000000000 ffff880462b75940 ffffffff81c0e500 [ 244.405568] ffff880476419280 ffffc900018f7c90 ffffffff817dcf62 000000000000003c [ 244.405572] 0000000100000000 0000000000000002 ffff880462b75940 ffff880462b75940 [ 244.405573] Call Trace: [ 244.405580] [<ffffffff817dcf62>] ? __schedule+0x222/0x6a0 [ 244.405584] [<ffffffff817dd416>] schedule+0x36/0x80 [ 244.405588] [<ffffffff817e041c>] schedule_timeout+0x1fc/0x390 [ 244.405592] [<ffffffff817df1b4>] __down_common+0xa5/0xf8 [ 244.405598] [<ffffffff810b2ca8>] ? put_prev_entity+0x48/0x710 [ 244.405601] [<ffffffff817df224>] __down+0x1d/0x1f [ 244.405606] [<ffffffff810c71a1>] down+0x41/0x50 [ 244.405611] [<ffffffff810d380a>] console_lock+0x1a/0x40 [ 244.405614] [<ffffffff814e3c03>] console_callback+0x13/0x160 [ 244.405617] [<ffffffff817dcf6a>] ? __schedule+0x22a/0x6a0 [ 244.405623] [<ffffffff810954e3>] process_one_work+0x153/0x3f0 [ 244.405628] [<ffffffff81095cab>] worker_thread+0x12b/0x4b0 [ 244.405633] [<ffffffff81095b80>] ? rescuer_thread+0x350/0x350 [ 244.405637] [<ffffffff8109b473>] kthread+0xd3/0xf0 [ 244.405641] [<ffffffff8109b3a0>] ? kthread_park+0x60/0x60 [ 244.405645] [<ffffffff8109b3a0>] ? kthread_park+0x60/0x60 [ 244.405649] [<ffffffff817e1ee5>] ret_from_fork+0x25/0x30 Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: bump version number to note race fix and new fence functionalityAlex Deucher
fixed in: "drm/amdgpu:fix race condition" Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: trace vm hub during flush as well v2Christian König
Trace on which hub we are doing the flush. v2: fix typo in commit message Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: trace the vmhub in grab_id as wellChristian König
Trace on which VMHUB we assigned an VMID. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: allow concurrent VM flushesChristian König
Enable concurrent VM flushes for Vega10. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: assign VM invalidation engine manually v2Christian König
For Vega10 we have 18 VM invalidation engines for each VMHUB. Start to assign them manually to the rings. v2: add a BUG_ON if we use to many engines Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: invalidate only the currently needed VMHUB v2Christian König
Drop invalidating both hubs from each engine. v2: don't use hardcoded values Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: split VMID management by VMHUBChristian König
This way GFX and MM won't fight for VMIDs any more. Initially disabled since we need to stop flushing all HUBS at the same time as well. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Andres Rodriguez <andresx7@gmail.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: drop VMID per ring trackingChristian König
David suggested this a long time ago, instead of checking each ring just walk over all the VMIDs in reverse LRU order. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Andres Rodriguez <andresx7@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: add VMHUB to ring associationChristian König
Add the info which ring belonging to which VMHUB. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu/vce4: enable ring & ib test for sriovFrank Min
Now VCE block can work for SRIOV, enable ring & ib test. Signed-off-by: Frank Min <Frank.Min@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu/vce4: workaround VCE ring test slow issueXiangliang Yu
Add VCE ring test slow workaround for SRIOV. Signed-off-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu/vce4: update VCE initialization sequence for SRIOVFrank Min
Update the initialization sequence of VCE to make VCE work. Signed-off-by: Frank Min <Frank.Min@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: Fix firmware UCODE_ID_STORAGE issue (v2)Trigger Huang
In Tonga's virtualization environment, for firmware UCODE_ID_STORAGE, there is no actual firmware data, but we still need alloc a BO and tell the BO's mc address to HW, or world switch will hang on VFs. v2: fix coding style (Alex) Signed-off-by: Trigger Huang <trigger.huang@amd.com> Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: fix to add buffer funcs checkHuang Rui
This patch fixes the case when buffer funcs is empty and bo evict is executing. It must double check buffer funcs, otherwise, a NULL pointer dereference kernel panic will be encountered. BUG: unable to handle kernel NULL pointer dereference at 00000000000001a4 IP: [<ffffffffa067b6cd>] amdgpu_evict_flags+0x3d/0xf0 [amdgpu] PGD 0 Oops: 0000 [#1] SMP Modules linked in: amdgpu(OE) ttm drm_kms_helper drm i2c_algo_bit fb_sys_fops syscopyarea sysfillrect sysimgblt fmem(OE) physmem_drv(OE) rpcsec_gss_krb5 nfsv4 nfs fscache intel_rapl x86_pkg_temp_thermal intel_powerclamp snd_hda_codec_realtek snd_hda_codec_hdmi snd_hda_codec_generic kvm_intel snd_hda_intel snd_hda_codec kvm snd_hda_core joydev eeepc_wmi asus_wmi sparse_keymap snd_hwdep snd_pcm irqbypass crct10dif_pclmul snd_seq_midi snd_seq_midi_event snd_rawmidi snd_seq crc32_pclmul snd_seq_device ghash_clmulni_intel aesni_intel aes_x86_64 snd_timer lrw gf128mul mei_me snd glue_helper ablk_helper cryptd tpm_infineon mei lpc_ich serio_raw soundcore shpchp mac_hid nfsd auth_rpcgss nfs_acl lockd grace coretemp sunrpc parport_pc ppdev lp parport autofs4 hid_generic mxm_wmi r8169 usbhid ahci psmouse libahci nvme mii hid nvme_core wmi video CPU: 3 PID: 1627 Comm: kworker/u8:17 Tainted: G OE 4.9.0-custom #1 Hardware name: ASUS All Series/Z87-A, BIOS 1802 01/28/2014 Workqueue: events_unbound async_run_entry_fn task: ffff88021e7057c0 task.stack: ffffc9000262c000 RIP: 0010:[<ffffffffa067b6cd>] [<ffffffffa067b6cd>] amdgpu_evict_flags+0x3d/0xf0 [amdgpu] RSP: 0018:ffffc9000262fb30 EFLAGS: 00010246 RAX: 0000000000000000 RBX: ffff88021e8a5858 RCX: 0000000000000000 RDX: 0000000000000001 RSI: ffffc9000262fb58 RDI: ffff88021e8a5800 RBP: ffffc9000262fb48 R08: 0000000000000000 R09: ffff88021e8a5814 R10: 000000001def8f01 R11: ffff88021def8c80 R12: ffffc9000262fb58 R13: ffff88021d2b1990 R14: 0000000000000000 R15: ffff88021e8a5858 FS: 0000000000000000(0000) GS:ffff88022ed80000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 00000000000001a4 CR3: 0000000001c07000 CR4: 00000000001406e0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: fix to clear ASIC INIT COMPLETE bit on resuming phaseHuang Rui
ASIC_INIT_COMPLETE bit must be cleared during S3 resuming phase, because VBIOS will check the bit to decide if execute ASIC_Init posting via kernel driver. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: do not free fence buf when driver probes.Huang Rui
Fence buf needs to be used on suspend/resume phase. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amd/powerplay: fix suspend error on DPM disabledHuang Rui
Don't fail if DPM is disabled. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu:fix race conditionMonk Liu
sequence is protected by spinlock so don't access sequence in paramter seq when invoking this function. ~0 means to get the latest sequence number and 0 means none to get. Change-Id: Ib7a03f3cf5594deeb4ad333cc59b47a6bddfd1ad Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amd/amdgpu: Port gfx9 driver over to new read/write macrosTom St Denis
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amd/amdgpu: Introduce new read/write macros for SOC15Tom St Denis
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: add hw_start and non-psp firmware loading into resumeHuang Rui
Rework in order to properly support suspend. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: split psp ring init functionHuang Rui
Rework in order to properly support suspend. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: split psp asd functionHuang Rui
Rework in order to properly support suspend. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: use private memory to store psp firmware dataHuang Rui
Rework in order to properly support suspend. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: add psp firmware private memoryHuang Rui
Needed for proper suspend support. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amdgpu: split psp tmr init functionHuang Rui
Rework in order to properly support suspend. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28drm/amd/powerplay: align with VBIOS to support new AVFS structureRex Zhu
Align the driver with the latest vbios structures. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-11Merge tag 'drm-misc-next-2017-04-07' of ↵Dave Airlie
git://anongit.freedesktop.org/git/drm-misc into drm-next Last drm-misc-next pull req for 4.12 Core changes: - fb_helper checkpatch cleanup and simplified _add_one_connector() (Thierry) - drm_ioctl and drm_sysfs improved/gained documentation (Daniel) - [ABI] Repurpose reserved field in drm_event_vblank for crtc_id (Ander) - Plumb acquire ctx through legacy paths to avoid lock_all and legacy_backoff (Daniel) - Add connector_atomic_check to check conn constraints on modeset (Maarten) - Add drm_of_find_panel_or_bridge to remove boilerplate in drivers (Rob) Driver changes: - meson moved to drm-misc (Neil) - Added support for Amlogic GX SoCs in dw-hdmi (Neil) - Rockchip unbind actually cleans up the things bind initializes (Jeffy) - A couple misc fixes in virtio, dw-hdmi NOTE: this also includes a backmerge of drm-next as well rc5 (we needed vmwgfx as well as the new synopsys media formats) * tag 'drm-misc-next-2017-04-07' of git://anongit.freedesktop.org/git/drm-misc: (77 commits) Revert "drm: Don't allow interruptions when opening debugfs/crc" drm: Only take cursor locks when the cursor plane exists drm/vmwgfx: Fix fbdev emulation using legacy functions drm/rockchip: Shutdown all crtcs when unbinding drm drm/rockchip: Reorder drm bind/unbind sequence drm/rockchip: analogix_dp: Disable clock when unbinding drm/rockchip: vop: Unprepare clocks when unbinding drm/rockchip: vop: Enable pm domain before vop_initial drm/rockchip: cdn-dp: Don't unregister audio dev when unbinding drm/rockchip: cdn-dp: Don't try to release firmware when not loaded drm: bridge: analogix: Destroy connector & encoder when unbinding drm: bridge: analogix: Disable clock when unbinding drm: bridge: analogix: Unregister dp aux when unbinding drm: bridge: analogix: Detach panel when unbinding analogix dp drm: Don't allow interruptions when opening debugfs/crc drm/virtio: don't leak bo on drm_gem_object_init failure drm: bridge: dw-hdmi: fix input format/encoding from plat_data drm: omap: use common OF graph helpers drm: convert drivers to use drm_of_find_panel_or_bridge drm: convert drivers to use of_graph_get_remote_node ...
2017-04-07drm/amdgpu: fix fence memory leak in wait_all_fence V2Chunming Zhou
V2: remove **array method, directly fence_put after fence wait. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <chrstian.koenig@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-07drm/amdgpu: fix "fix 64bit division"Christian König
The offset must be 64bit and add back the accidential dropped line. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-07drm/amd/powerplay: add fan controller table v11 support.Rex Zhu
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-07drm/amd/powerplay: port newest process pptable code for vega10.Rex Zhu
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-07drm/amdgpu: set vm size and block size by individual gmc by default (v3)Junwei Zhang
By default, the value is set by individual gmc. if a specific value is input, it overrides the global value for all v2: create helper funcs v3: update gmc9 APU's num_level athough it may be updated in the future. Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-07drm/amdgpu: Avoid overflows/divide-by-zero in latency_watermark calculations.Mario Kleiner
At dot clocks > approx. 250 Mhz, some of these calcs will overflow and cause miscalculation of latency watermarks, and for some overflows also divide-by-zero driver crash ("divide error: 0000 [#1] PREEMPT SMP" in "dce_v10_0_latency_watermark+0x12d/0x190"). This zero-divide happened, e.g., on AMD Tonga Pro under DCE-10, on a Displayport panel when trying to set a video mode of 2560x1440 at 165 Hz vrefresh with a dot clock of 635.540 Mhz. Refine calculations to avoid the overflows. Tested for DCE-10 with R9 380 Tonga + ASUS ROG PG279 panel. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2017-04-07drm/amdgpu: Make display watermark calculations more accurateMario Kleiner
Avoid big roundoff errors in scanline/hactive durations for high pixel clocks, especially for >= 500 Mhz, and thereby program more accurate display fifo watermarks. Implemented here for DCE 6,8,10,11. Successfully tested on DCE 10 with AMD R9 380 Tonga. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2017-04-07drm/amdgpu: Refuse to pin or change acceptable domains of prime BOs to VRAM. ↵Christopher James Halse Rogers
(v2) Migration to VRAM will break the sharing, resulting in rendering on the exporting GPU never becoming visible on the importing GPU. v2: Don't pin BOs to GTT. Instead, refuse to migrate them out of GTT. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Christopher James Halse Rogers <christopher.halse.rogers@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-07drm/amdgpu: Fail fb creation from imported dma-bufs. (v2)Christopher James Halse Rogers
Any use of the framebuffer will migrate it to VRAM, which is not sensible for an imported dma-buf. v2: Use DRM_DEBUG_KMS to prevent userspace accidentally spamming dmesg. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Christopher James Halse Rogers <christopher.halse.rogers@canonical.com> CC: amd-gfx@lists.freedesktop.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-07Merge branch 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie
into drm-next A few more things for 4.12: - ttm and amdgpu support for non-contiguous vram CPU mappings - lots of bug fixes and cleanups for vega10 - misc bug fixes and code cleanups [airlied: fix do_div error on 32-bit arm, not sure it's 100% correct] * 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux: (58 commits) drm/amdgpu: use uintptr_t instead of unsigned long to store pointer drm/amdgpu: Avoid using signed integer to store pointer value drm/amdgpu:invoke new implemented AI MB func drm/amdgpu/vega10:timeout set to equal with VI drm/amdgpu:implement the reset MB func for vega10 drm/amdgpu:fix typo for mxgpu_ai drm/amdgpu:no need to involv HDP in KIQ drm/amdgpu:add PSP block only load_type=PSP (v2) drm/amdgpu/smu9: update to latest driver interface drm/amd/amdgpu: cleanup gfx_v9_0_gpu_init() drm/amd/amdgpu: cleanup gfx_v9_0_rlc_reset() drm/amd/amdgpu: cleanup gfx_v9_0_rlc_start() drm/amd/amdgpu: simplify gfx_v9_0_cp_gfx_enable() drm/amd/amdgpu: cleanup gfx_v9_0_kiq_init_register() drm/amd/amdgpu: Drop gfx_v9_0_print_status() drm/amd/amdgpu: cleanup gfx_v9_0_set_gfx_eop_interrupt_state() drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_reg_fault_state() drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_inst_fault_state() drm/amd/amdgpu: cleanup gfx_v9_0_init_queue() drm/amdgpu: Move function amdgpu_has_atpx near other similar functions ...
2017-04-06drm/amdgpu: use uintptr_t instead of unsigned long to store pointerAlex Xie
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06drm/amdgpu: Avoid using signed integer to store pointer valueAlex Xie
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.46.0) at 2025-07-18 10:13:56 +0000