Merge branch 'dmm_tiler_v2.6.31-P1' of git://dev.omapzoom.org/pub/scm/dsin/tiler-omap4 into L24.0.13_INC1ti-2.6.31-omap4-24.0.13-P1

7 files changed, 871 insertions, 13 deletions

diff --git a/drivers/media/video/tiler/dmm.c b/drivers/media/video/tiler/dmm.c
index 4061fe413e90..0dbf6db289ae 100755
--- a/drivers/media/video/tiler/dmm.c
+++ b/drivers/media/video/tiler/dmm.c
@@ -33,6 +33,385 @@
 #include "dmm_prv.h"
 #include "dmm_def.h"
 
+#define __NEWCODE__
+#ifdef __NEWCODE__
+struct pat_area {
+	int x0:8;
+	int y0:8;
+	int x1:8;
+	int y1:8;
+};
+
+struct pat_ctrl {
+	int start:4;
+	int direction:4;
+	int lut_id:8;
+	int sync:12;
+	int initiator:4;
+};
+
+struct pat_desc {
+	struct pat_desc *next;
+	struct pat_area area;
+	struct pat_ctrl ctrl;
+	unsigned long data;
+};
+
+void *dmm_base;
+
+static void pat_area_set(struct pat_area *area, char id);
+static void pat_data_set(unsigned long data, char id);
+static void pat_ctrl_set(struct pat_ctrl *ctrl, char id);
+static void pat_desc_set(struct pat_desc *desc, char id);
+static void hwinfo_get();
+static void pat_view_set();
+static void pat_view_map_set();
+static void pat_view_map_base_set();
+static void tiler_or_set();
+
+static void tiler_or_set() /* (struct tiler_or *or, char id) */
+{
+	void __iomem *reg = NULL;
+	unsigned long reg_val = 0x0;
+	unsigned long new_val = 0x0;
+	unsigned long bit_field = 0x0;
+	unsigned long field_pos = 0x0;
+
+	/* set TILER_OR__0 register */
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)TILER_OR__0);
+	reg_val = __raw_readl(reg);
+	regdump("TILER_OR__0", reg_val);
+
+	bit_field = BITFIELD(31, 0);
+	field_pos = 0;
+	new_val = (reg_val & (~(bit_field))) |
+			((((unsigned long)0) << field_pos) & bit_field);
+	__raw_writel(0x88888888, reg); /* __raw_writel(new_val, reg); */
+
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)TILER_OR__0);
+	reg_val = __raw_readl(reg);
+	regdump("TILER_OR__0", reg_val);
+
+	/* set TILER_OR__1 register */
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)TILER_OR__1);
+	reg_val = __raw_readl(reg);
+	regdump("TILER_OR__1", reg_val);
+
+	bit_field = BITFIELD(31, 0);
+	field_pos = 0;
+	new_val = (reg_val & (~(bit_field))) |
+			((((unsigned long)0) << field_pos) & bit_field);
+	__raw_writel(0x88888888, reg); /* __raw_writel(new_val, reg); */
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)TILER_OR__1);
+	reg_val = __raw_readl(reg);
+	regdump("TILER_OR__1", reg_val);
+}
+static void pat_view_set() /* (struct pat_view *view, char id) */
+{
+	void __iomem *reg = NULL;
+	unsigned long reg_val = 0x0;
+	unsigned long new_val = 0x0;
+	unsigned long bit_field = 0x0;
+	unsigned long field_pos = 0x0;
+
+	/* set PAT_VIEW__0 register */
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_VIEW__0);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_VIEW__0", reg_val);
+
+	bit_field = BITFIELD(31, 0);
+	field_pos = 0;
+	new_val = (reg_val & (~(bit_field))) |
+			((((unsigned long)0) << field_pos) & bit_field);
+	__raw_writel(0x88888888, reg); /* __raw_writel(new_val, reg); */
+
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_VIEW__0);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_VIEW__0", reg_val);
+
+	/* set PAT_VIEW__1 register */
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_VIEW__1);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_VIEW__1", reg_val);
+
+	bit_field = BITFIELD(31, 0);
+	field_pos = 0;
+	new_val = (reg_val & (~(bit_field))) |
+			((((unsigned long)0) << field_pos) & bit_field);
+	__raw_writel(0x88888888, reg); /* __raw_writel(new_val, reg); */
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_VIEW__1);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_VIEW__1", reg_val);
+}
+static void pat_view_map_set() /* (struct pat_view_map *map, char id) */
+{
+	void __iomem *reg = NULL;
+	unsigned long reg_val = 0x0;
+	unsigned long new_val = 0x0;
+	unsigned long bit_field = 0x0;
+	unsigned long field_pos = 0x0;
+
+	/* set PAT_VIEW_MAP__0 register */
+	reg = (void __iomem *)(
+		(unsigned long)dmm_base | (unsigned long)PAT_VIEW_MAP__0);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_VIEW_MAP__0", reg_val);
+
+	bit_field = BITFIELD(31, 0);
+	field_pos = 0;
+	new_val = (reg_val & (~(bit_field))) |
+			((((unsigned long)0) << field_pos) & bit_field);
+	__raw_writel(0x80808080, reg); /* __raw_writel(new_val, reg); */
+
+
+	reg = (void __iomem *)(
+		(unsigned long)dmm_base | (unsigned long)PAT_VIEW_MAP__0);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_VIEW_MAP__0", reg_val);
+}
+
+static void pat_view_map_base_set()/*(struct pat_view_map_base *base, char id)*/
+{
+	void __iomem *reg = NULL;
+	unsigned long reg_val = 0x0;
+	unsigned long new_val = 0x0;
+	unsigned long bit_field = 0x0;
+	unsigned long field_pos = 0x0;
+
+	/* set PAT_VIEW_MAP_BASE register */
+	reg = (void __iomem *)(
+		(unsigned long)dmm_base | (unsigned long)PAT_VIEW_MAP_BASE);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_VIEW_MAP_BASE", reg_val);
+
+	bit_field = BITFIELD(31, 0);
+	field_pos = 0;
+	new_val = (reg_val & (~(bit_field))) |
+			((((unsigned long)0) << field_pos) & bit_field);
+	__raw_writel(0x80000000, reg); /* __raw_writel(new_val, reg); */
+
+
+	reg = (void __iomem *)(
+		(unsigned long)dmm_base | (unsigned long)PAT_VIEW_MAP_BASE);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_VIEW_MAP_BASE", reg_val);
+}
+
+static void hwinfo_get()
+{
+	void __iomem *reg = NULL;
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)DMM_REVISION);
+	regdump("DMM_REVISION", __raw_readl(reg));
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)DMM_HWINFO);
+	regdump("DMM_HWINFO", __raw_readl(reg));
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)LISA_HWINFO);
+	regdump("LISA_HWINFO", __raw_readl(reg));
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)TILER_HWINFO);
+	regdump("TILER_HWINFO", __raw_readl(reg));
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_HWINFO);
+	regdump("PAT_HWINFO", __raw_readl(reg));
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_GEOMETRY);
+	regdump("PAT_GEOMETRY", __raw_readl(reg));
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_STATUS__0);
+	regdump("PAT_STATUS__0", __raw_readl(reg));
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_STATUS__1);
+	regdump("PAT_STATUS__1", __raw_readl(reg));
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_STATUS__2);
+	regdump("PAT_STATUS__2", __raw_readl(reg));
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_STATUS__3);
+	regdump("PAT_STATUS__3", __raw_readl(reg));
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PEG_HWINFO);
+	regdump("PEG_HWINFO", __raw_readl(reg));
+}
+static void pat_desc_set(struct pat_desc *desc, char id)
+{
+	void __iomem *reg = NULL;
+	unsigned long reg_val = 0x0;
+	unsigned long new_val = 0x0;
+	unsigned long bit_field = 0x0;
+	unsigned long field_pos = 0x0;
+
+	/* write to pat registers */
+	/* opt to individually set each reg, so set PAT_DESC register to NULL */
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_DESCR__0);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_DESCR__0", reg_val);
+
+	bit_field = BITFIELD(31, 4);
+	field_pos = 4;
+	new_val = (reg_val & (~(bit_field))) |
+			((((unsigned long)desc) << field_pos) & bit_field);
+	__raw_writel(new_val, reg);
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_DESCR__0);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_DESCR__0", reg_val);
+}
+static void pat_ctrl_set(struct pat_ctrl *ctrl, char id)
+{
+	void __iomem *reg = NULL;
+	unsigned long reg_val = 0x0;
+	unsigned long new_val = 0x0;
+	unsigned long bit_field = 0x0;
+	unsigned long field_pos = 0x0;
+
+	/* set PAT_CTRL register */
+	/* TODO: casting as unsigned long */
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_CTRL__0);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_CTRL__0", reg_val);
+
+	bit_field = BITFIELD(31, 28);
+	field_pos = 28;
+	new_val = (reg_val & (~(bit_field))) |
+		((((unsigned long)ctrl->initiator) << field_pos) & bit_field);
+	__raw_writel(new_val, reg);
+
+	reg_val = __raw_readl(reg);
+	bit_field = BITFIELD(16, 16);
+	field_pos = 16;
+	new_val = (reg_val & (~(bit_field))) |
+		((((unsigned long)ctrl->sync) << field_pos) & bit_field);
+	__raw_writel(new_val, reg);
+
+	reg_val = __raw_readl(reg);
+	bit_field = BITFIELD(9, 8);
+	field_pos = 8;
+	new_val = (reg_val & (~(bit_field))) |
+		((((unsigned long)ctrl->lut_id) << field_pos) & bit_field);
+	__raw_writel(new_val, reg);
+
+	reg_val = __raw_readl(reg);
+	bit_field = BITFIELD(6, 4);
+	field_pos = 4;
+	new_val = (reg_val & (~(bit_field))) |
+		((((unsigned long)ctrl->direction) << field_pos) & bit_field);
+	__raw_writel(new_val, reg);
+
+	reg_val = __raw_readl(reg);
+	bit_field = BITFIELD(0, 0);
+	field_pos = 0;
+	new_val = (reg_val & (~(bit_field))) |
+		((((unsigned long)ctrl->start) << field_pos) & bit_field);
+	__raw_writel(new_val, reg);
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_CTRL__0);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_CTRL__0", reg_val);
+}
+static void pat_data_set(unsigned long data, char id)
+{
+	void __iomem *reg = NULL;
+	unsigned long reg_val = 0x0;
+	unsigned long new_val = 0x0;
+	unsigned long bit_field = 0x0;
+	unsigned long field_pos = 0x0;
+
+	/* set PAT_DATA register */
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_DATA__0);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_DATA__0", reg_val);
+
+	bit_field = BITFIELD(31, 4);
+	field_pos = 4;
+	new_val = (reg_val & (~(bit_field))) |
+			((((unsigned long)data >> 4) << field_pos) & bit_field);
+	__raw_writel(new_val, reg);
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_DATA__0);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_DATA__0", reg_val);
+}
+static void pat_area_set(struct pat_area *area, char id)
+{
+	void __iomem *reg = NULL;
+	unsigned long reg_val = 0x0;
+	unsigned long new_val = 0x0;
+	unsigned long bit_field = 0x0;
+	unsigned long field_pos = 0x0;
+
+	/* set PAT_AREA register */
+	/* TODO: changed casting from char to unsigned long */
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_AREA__0);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_AREA__0", reg_val);
+
+	bit_field = BITFIELD(30, 24);
+	field_pos = 24;
+	new_val = (reg_val & (~(bit_field))) |
+			((((unsigned long)area->y1) << field_pos) & bit_field);
+	__raw_writel(new_val, reg);
+
+	reg_val = __raw_readl(reg);
+	bit_field = BITFIELD(23, 16);
+	field_pos = 16;
+	new_val = (reg_val & (~(bit_field))) |
+			((((unsigned long)area->x1) << field_pos) & bit_field);
+	__raw_writel(new_val, reg);
+
+	reg_val = __raw_readl(reg);
+	bit_field = BITFIELD(14, 8);
+	field_pos = 8;
+	new_val = (reg_val & (~(bit_field))) |
+			((((unsigned long)area->y0) << field_pos) & bit_field);
+	__raw_writel(new_val, reg);
+
+	reg_val = __raw_readl(reg);
+	bit_field = BITFIELD(7, 0);
+	field_pos = 0;
+	new_val = (reg_val & (~(bit_field))) |
+			((((unsigned long)area->x0) << field_pos) & bit_field);
+	__raw_writel(new_val, reg);
+
+	reg_val = __raw_readl(reg);
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)PAT_AREA__0);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_AREA__0", reg_val);
+}
+#endif /* end: #ifdef __NEWCODE__ */
+
 #define DMM_MAJOR 0
 #define DMM_MINOR 0
 #define DMM_IO_BASE_ADDR 0x4e000000
@@ -156,8 +535,26 @@ __init dmm_init(void)
 		return retval;
 	}
 
+#ifndef __NEWCODE__
 	/* config LISA/PAT */
 	dmm_config();
+#else
+	void __iomem *reg = NULL;
+	dmm_base = ioremap(DMM_BASE, 0x1000);
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)LISA_MAP__0);
+	regdump("LISA_MAP__0", __raw_readl(reg));
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_base | (unsigned long)LISA_MAP__1);
+	regdump("LISA_MAP__1", __raw_readl(reg));
+
+	pat_view_set();
+	pat_view_map_set();
+	pat_view_map_base_set();
+	tiler_or_set();
+#endif
 
 	/* create buffer info list */
 	createlist(&lsthd);
@@ -220,15 +617,15 @@ dmm_ioctl(struct inode *ip, struct file *filp, unsigned int cmd,
 
 	switch (cmd) {
 	case TILIOC_OPEN:
-		tilerdump(__LINE__);
+		debug(__LINE__);
 		retval = 0;
 		break;
 	case TILIOC_CLOSE:
-		tilerdump(__LINE__);
+		debug(__LINE__);
 		retval = 0;
 		break;
 	case TILIOC_GBUF:
-		tilerdump(__LINE__);
+		debug(__LINE__);
 
 		bytes = copy_from_user((void *)(&block_info),
 			(const void *)arg, sizeof(struct tiler_block_info));
@@ -259,7 +656,7 @@ dmm_ioctl(struct inode *ip, struct file *filp, unsigned int cmd,
 		retval = 0;
 		break;
 	case TILIOC_FBUF:
-		tilerdump(__LINE__);
+		debug(__LINE__);
 
 		bytes = copy_from_user((void *)(&block_info),
 			(const void *)arg, sizeof(struct tiler_block_info));
@@ -271,7 +668,7 @@ dmm_ioctl(struct inode *ip, struct file *filp, unsigned int cmd,
 			retval = 0;
 		break;
 	case TILIOC_GSSP:
-		tilerdump(__LINE__);
+		debug(__LINE__);
 
 		pgd = pgd_offset(current->mm, arg);
 		if (!(pgd_none(*pgd) || pgd_bad(*pgd))) {
@@ -292,11 +689,11 @@ dmm_ioctl(struct inode *ip, struct file *filp, unsigned int cmd,
 		retval = 0x0; /* va not in page table */
 		break;
 	case TILIOC_MBUF:
-		tilerdump(__LINE__);
+		debug(__LINE__);
 		retval = 0;
 		break;
 	case TILIOC_QBUF:
-		tilerdump(__LINE__);
+		debug(__LINE__);
 
 		bytes = copy_from_user((void *)(&buf_info),
 			(const void *)arg, sizeof(struct tiler_buf_info));
@@ -316,7 +713,7 @@ dmm_ioctl(struct inode *ip, struct file *filp, unsigned int cmd,
 		retval = 0;
 		break;
 	case TILIOC_RBUF:
-		tilerdump(__LINE__);
+		debug(__LINE__);
 
 		bufinfo = kmalloc(sizeof(struct tiler_buf_info), GFP_KERNEL);
 		memset(bufinfo, 0x0, sizeof(struct tiler_buf_info));
@@ -339,7 +736,7 @@ dmm_ioctl(struct inode *ip, struct file *filp, unsigned int cmd,
 		retval = 0;
 		break;
 	case TILIOC_URBUF:
-		tilerdump(__LINE__);
+		debug(__LINE__);
 
 		bytes = copy_from_user((void *)(&buf_info),
 			(const void *)arg, sizeof(struct tiler_buf_info));
@@ -354,7 +751,7 @@ dmm_ioctl(struct inode *ip, struct file *filp, unsigned int cmd,
 		retval = 0;
 		break;
 	case TILIOC_QUERY_BLK:
-		tilerdump(__LINE__);
+		debug(__LINE__);
 
 		bytes = copy_from_user((void *)(&block_info),
 			(const void *)arg, sizeof(struct tiler_block_info));
@@ -362,8 +759,16 @@ dmm_ioctl(struct inode *ip, struct file *filp, unsigned int cmd,
 			return retval;
 
 		error = tiler_find_buf(block_info.ssptr, &block_info);
-		if (error == 0)
-			retval = 0;
+		if (error != 0)
+			return retval;
+
+		bytes = copy_to_user((void *)arg,
+			(const void *)(&block_info),
+			sizeof(struct tiler_block_info));
+		if (bytes != 0)
+			return retval;
+
+		retval = 0;
 		break;
 	}
 	return retval;
diff --git a/drivers/media/video/tiler/dmm_2d_alloc.c b/drivers/media/video/tiler/dmm_2d_alloc.c
index 3310e4145185..5debaa855927 100755
--- a/drivers/media/video/tiler/dmm_2d_alloc.c
+++ b/drivers/media/video/tiler/dmm_2d_alloc.c
@@ -39,6 +39,12 @@
 #include "dmm_2d_alloc.h"
 #include "dmm_prv.h"
 
+#define __NEWCODE__
+
+#ifdef __NEWCODE__
+#include <linux/io.h>
+#endif
+
 /****************************************************************
 *  EXTERNAL REFERENCES NOTE: only use if not found in header file
 ****************************************************************/
@@ -1695,6 +1701,9 @@ enum MSP_BOOL dealloc_2d_area(struct dmmTILERContCtxT *dmmTilerCtx,
 			*/
 			for (i = 0;
 				i < numPages && eCode == DMM_NO_ERROR; i++) {
+#ifdef __NEWCODE__
+				debug(i);
+#endif
 				eCode = dmm_free_phys_page(
 					(unsigned long *)
 					(delItm->pgAr.patPageEntries[i]));
@@ -1703,9 +1712,17 @@ enum MSP_BOOL dealloc_2d_area(struct dmmTILERContCtxT *dmmTilerCtx,
 
 		if (eCode == DMM_NO_ERROR) {
 			tilerdump(__LINE__);
+#ifndef __NEWCODE__
 			kfree(delItm->pgAr.patPageEntriesSpace);
 			delItm->pgAr.patPageEntries = NULL;
 			delItm->pgAr.patPageEntriesSpace = NULL;
+#else
+			debug(__LINE__);
+			iounmap(delItm->pgAr.page_list_virt);
+			__free_page(delItm->pgAr.page_list);
+			delItm->pgAr.patPageEntries = NULL;
+			delItm->pgAr.patPageEntriesSpace = NULL;
+#endif
 		}
 
 		tilerdump(__LINE__);
diff --git a/drivers/media/video/tiler/dmm_2d_alloc.h b/drivers/media/video/tiler/dmm_2d_alloc.h
index efcbc2933940..b3b9b1997d9a 100644
--- a/drivers/media/video/tiler/dmm_2d_alloc.h
+++ b/drivers/media/video/tiler/dmm_2d_alloc.h
@@ -17,6 +17,8 @@
 #ifndef _DMM_2D_ALLOC_H
 #define _DMM_2D_ALLOC_H
 
+#define __NEWCODE__
+
 enum MSP_BOOL {
 	MSP_FALSE = 0,
 	MSP_TRUE
@@ -42,6 +44,10 @@ struct dmmTILERContPageAreaT {
 	enum SideAffinity fitToSide;
 	int patCustomPages;
 	unsigned long *patPageEntriesSpace;
+#ifdef __NEWCODE__
+	struct page *page_list;
+	unsigned long *page_list_virt;
+#endif
 	unsigned long *patPageEntries;
 };
 
diff --git a/drivers/media/video/tiler/dmm_hl_drv.c b/drivers/media/video/tiler/dmm_hl_drv.c
index e97a11989372..46959e7c0624 100755
--- a/drivers/media/video/tiler/dmm_hl_drv.c
+++ b/drivers/media/video/tiler/dmm_hl_drv.c
@@ -23,6 +23,35 @@
 #include "dmm_prv.h"
 #include "tiler.h"
 
+#define __NEWCODE__
+
+#ifdef __NEWCODE__
+#include <linux/io.h>
+#include <linux/sched.h>   /* current->mm */
+
+static unsigned long get_phys_addr(unsigned long arg)
+{
+	pgd_t *pgd = NULL;
+	pmd_t *pmd = NULL;
+	pte_t *ptep = NULL, pte = 0x0;
+	pgd = pgd_offset(current->mm, arg);
+	if (!(pgd_none(*pgd) || pgd_bad(*pgd))) {
+		pmd = pmd_offset(pgd, arg);
+		if (!(pmd_none(*pmd) || pmd_bad(*pmd))) {
+			ptep = pte_offset_map(pmd, arg);
+			if (ptep) {
+				pte = *ptep;
+				if (pte_present(pte)) {
+					return (pte & PAGE_MASK) |
+							(~PAGE_MASK & arg);
+				}
+			}
+		}
+	}
+	return 0x0; /* va not in page table */
+}
+#endif
+
 /* ========================================================================== */
 /**
  *  dmm_module_config()
@@ -360,7 +389,11 @@ enum errorCodeT dmm_pat_start_refill(
 
 	areaDesc.nextPatEntry = NULL;
 
+#ifndef __NEWCODE__
 	areaDesc.data = (unsigned long)(bufferMappedZone->patPageEntries);
+#else
+	areaDesc.data = (unsigned long)bufferMappedZone->patPageEntriesSpace;
+#endif
 
 	tilerdump(__LINE__);
 	return dmm_pat_area_refill(&areaDesc, 0, MANUAL, 0);
@@ -403,11 +436,49 @@ enum errorCodeT dmm_pat_phy2virt_mapping(
 		eCode = DMM_SYS_ERROR;
 	} else {
 		tilerdump(__LINE__);
+#ifdef __NEWCODE__
+		unsigned long order = 0x0;
+
+		order = ((bfrPages*4 + 16) + 4095) / 4096;
+
+		order = 5;
+		debug(bfrPages*4 + 16);
+		debug(order);
+
+		bufferMappedZone->page_list = NULL;
+		bufferMappedZone->page_list =
+				(struct page *)alloc_pages(GFP_DMA, order);
+		if (!bufferMappedZone->page_list) {
+			debug(__LINE__); return DMM_SYS_ERROR;
+		}
+		bufferMappedZone->patPageEntriesSpace =
+		(unsigned long *)page_to_phys(bufferMappedZone->page_list);
+
+		bufferMappedZone->page_list_virt =
+		ioremap((unsigned long)bufferMappedZone->patPageEntriesSpace,
+		0x1000 * 32); /* TODO: don't forget to unmap later */
+
+		bufferMappedZone->patPageEntries =
+					bufferMappedZone->page_list_virt;
+		memset(bufferMappedZone->patPageEntries, 0x0, 0x1000 * 32);
+		bufferMappedZone->patPageEntries =
+			(unsigned long *)((((unsigned long)
+				bufferMappedZone->patPageEntries) + 15) & ~15);
+#endif
+
+#ifndef __NEWCODE__
 		if (dmm_tiler_populate_pat_page_entry_data(bfrPages,
 				&(bufferMappedZone->patPageEntries),
 				&(bufferMappedZone->patPageEntriesSpace),
 				custmPagesPtr
 							  ) != DMM_NO_ERROR) {
+#else
+		if (dmm_tiler_populate_pat_page_entry_data(bfrPages,
+				NULL,
+				NULL,
+				(void *)bufferMappedZone->patPageEntries
+							  ) != DMM_NO_ERROR) {
+#endif
 			eCode = DMM_SYS_ERROR;
 			return eCode;
 		}
@@ -460,17 +531,101 @@ enum errorCodeT dmm_tiler_populate_pat_page_entry_data(unsigned long numPages,
 
 	tilerdump(__LINE__);
 
+#ifndef __NEWCODE__
 	patAreaEntries = kmalloc(
 		(size_t)(numPages*4 + 16), GFP_KERNEL);
 		((numPages*4 + 16), GFP_KERNEL);
 		/* Must be 16-byte aligned. */
 	memset(patAreaEntries, 0x0, (numPages*4 + 16));
 	*pageEntriesSpace = patAreaEntries;
+#else
+
+#if 0 /* move to caller */
+	struct page *page = NULL;
+	unsigned long *ioaddr = NULL;
+	unsigned long pa = 0x0;
+	unsigned long order = 0x0;
 
+	order = ((numPages*4 + 16) + 4095) / 4096;
+	debug(numPages*4 + 16);
+	debug(order);
 
+	/* page = (struct page *)alloc_page(GFP_DMA); */
+	/*pa = page_to_phys(page);*/
+	/*ioaddr = ioremap(pa, 0x1000);*/
+	/*memset(ioaddr, 0x0, 0x1000);*/
+
+	page = (struct page *)alloc_pages(GFP_DMA, order);
+	if (!page)
+		return DMM_SYS_ERROR;
+	pa = page_to_phys(page);
+	ioaddr = ioremap(pa, 0x1000 * order);
+	memset(ioaddr, 0x0, 0x1000 * order);
+
+	patAreaEntries = ioaddr;
+	*pageEntriesSpace = (unsigned long *)pa;
+	debug(*pageEntriesSpace);
+	debug(patAreaEntries);
+#endif
+
+#if 0 /* not a good solution to use vmalloc */
+	patAreaEntries = (unsigned long *)vmalloc(numPages*4 + 16);
+	memset(patAreaEntries, 0x0, numPages*4 + 16);
+	*pageEntriesSpace = patAreaEntries;
+
+	debug(*pageEntriesSpace);
+	debug(patAreaEntries);
+
+	/* test different allocation methods */
+	unsigned long mem = 0x0;
+	struct page *pg = NULL;
+	unsigned long *io = NULL;
+
+	pg = alloc_page(GFP_DMA);
+	mem = page_to_phys(pg);
+	io = ioremap(mem, 0x1000);
+	memset(io, 0x0, 0x1000);
+	debug(pg);
+	debug(mem);
+	debug(get_phys_addr(mem));
+	debug(io);
+	iounmap(io);
+	__free_page(pg);
+
+	mem = (unsigned long)kmalloc(0x1000, GFP_DMA);
+	debug(mem);
+	debug(get_phys_addr(mem));
+	memset((unsigned long *)mem, 0x0, 0x1000);
+	kfree((void *)mem);
+
+	mem = (unsigned long)vmalloc(0x1000);
+	debug(mem);
+	debug(get_phys_addr(mem));
+	memset((unsigned long *)mem, 0x0, 0x1000);
+	vfree((void *)mem);
+
+	mem = __get_free_page(GFP_DMA);
+	debug(mem);
+	debug(get_phys_addr(mem));
+	memset((unsigned long *)mem, 0x0, 0x1000);
+	free_page(mem);
+#endif
+#endif
+
+#ifndef __NEWCODE__
 	patAreaEntries = (unsigned long *)
 				((((unsigned long)patAreaEntries) + 15) & ~15);
+#else
+	patAreaEntries = (unsigned long *)custmPagesPtr;
+#endif
+
+
+#ifdef __NEWCODE__
+	debug(patAreaEntries);
+	debug(numPages);
+#endif
 
+#ifndef __NEWCODE__
 	if (custmPagesPtr == NULL) {
 		for (iter = 0; iter < numPages; iter++) {
 			patAreaEntries[iter] =
@@ -484,8 +639,27 @@ enum errorCodeT dmm_tiler_populate_pat_page_entry_data(unsigned long numPages,
 				(((unsigned long *)custmPagesPtr)[iter]);
 		}
 	}
+#else
+/* using custmPagesPtr arguement in a diffent way, so remove the conditions */
+	for (iter = 0; iter < numPages; iter++) {
+		patAreaEntries[iter] =
+				(unsigned long)dmm_get_phys_page();
+		if (patAreaEntries[iter] == 0x0)
+			return DMM_SYS_ERROR;
+	}
+#endif
+
+#ifdef __NEWCODE__
+	debug(__LINE__);
+	debug(patAreaEntries[0]);
+	debug(patAreaEntries[1]);
+	debug(patAreaEntries[2]);
+	debug(patAreaEntries[3]);
+#endif
 
+#ifndef __NEWCODE__
 	*pageEntries = patAreaEntries;
+#endif
 
 	return DMM_NO_ERROR;
 }
diff --git a/drivers/media/video/tiler/dmm_ll_drv.c b/drivers/media/video/tiler/dmm_ll_drv.c
index ce7db57e90ce..6161fc678686 100644
--- a/drivers/media/video/tiler/dmm_ll_drv.c
+++ b/drivers/media/video/tiler/dmm_ll_drv.c
@@ -22,6 +22,119 @@
 #include "dmm_reg.h"
 MODULE_LICENSE("GPL v2");
 
+#define __NEWCODE__
+#ifdef __NEWCODE__
+/* extern unsigned long entry_data; */
+static void pat_config_set();
+
+static void pat_config_set()/* (struct pat_config_set *config, char id) */
+{
+	void __iomem *reg = NULL;
+	unsigned long reg_val = 0x0;
+	unsigned long new_val = 0x0;
+	unsigned long bit_field = 0x0;
+	unsigned long field_pos = 0x0;
+
+	/* set PAT_CONFIG register */
+	reg = (void __iomem *)(
+			(unsigned long)dmm_virt_base_addr
+						| (unsigned long)PAT_CONFIG);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_CONFIG", reg_val);
+
+	bit_field = BITFIELD(31, 0);
+	field_pos = 0;
+	new_val = (reg_val & (~(bit_field))) |
+			((((unsigned long)0) << field_pos) & bit_field);
+	__raw_writel(0x0000000F, reg); /* __raw_writel(new_val, reg); */
+
+	reg = (void __iomem *)(
+			(unsigned long)dmm_virt_base_addr |
+						(unsigned long)PAT_CONFIG);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_CONFIG", reg_val);
+}
+
+struct pat_area {
+	int x0:8;
+	int y0:8;
+	int x1:8;
+	int y1:8;
+};
+
+struct pat_ctrl {
+	int start:4;
+	int direction:4;
+	int lut_id:8;
+	int sync:12;
+	int initiator:4;
+};
+
+struct pat_desc {
+	struct pat_desc *next;
+	struct pat_area area;
+	struct pat_ctrl ctrl;
+	unsigned long data;
+};
+
+static void pat_ctrl_set(struct pat_ctrl *ctrl, char id)
+{
+	void __iomem *reg = NULL;
+	unsigned long reg_val = 0x0;
+	unsigned long new_val = 0x0;
+	unsigned long bit_field = 0x0;
+	unsigned long field_pos = 0x0;
+
+	/* set PAT_CTRL register */
+	/* TODO: casting as unsigned long */
+	reg = (void __iomem *)(
+			(unsigned long)dmm_virt_base_addr |
+						(unsigned long)PAT_CTRL__0);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_CTRL__0", reg_val);
+
+	bit_field = BITFIELD(31, 28);
+	field_pos = 28;
+	new_val = (reg_val & (~(bit_field))) |
+			((((unsigned long)ctrl->initiator) <<
+							field_pos) & bit_field);
+	__raw_writel(new_val, reg);
+
+	reg_val = __raw_readl(reg);
+	bit_field = BITFIELD(16, 16);
+	field_pos = 16;
+	new_val = (reg_val & (~(bit_field))) |
+		((((unsigned long)ctrl->sync) << field_pos) & bit_field);
+	__raw_writel(new_val, reg);
+
+	reg_val = __raw_readl(reg);
+	bit_field = BITFIELD(9, 8);
+	field_pos = 8;
+	new_val = (reg_val & (~(bit_field))) |
+		((((unsigned long)ctrl->lut_id) << field_pos) & bit_field);
+	__raw_writel(new_val, reg);
+
+	reg_val = __raw_readl(reg);
+	bit_field = BITFIELD(6, 4);
+	field_pos = 4;
+	new_val = (reg_val & (~(bit_field))) |
+		((((unsigned long)ctrl->direction) << field_pos) & bit_field);
+	__raw_writel(new_val, reg);
+
+	reg_val = __raw_readl(reg);
+	bit_field = BITFIELD(0, 0);
+	field_pos = 0;
+	new_val = (reg_val & (~(bit_field))) |
+		((((unsigned long)ctrl->start) << field_pos) & bit_field);
+	__raw_writel(new_val, reg);
+
+	reg = (void __iomem *)(
+		(unsigned long)dmm_virt_base_addr | (unsigned long)PAT_CTRL__0);
+	reg_val = __raw_readl(reg);
+	regdump("PAT_CTRL__0", reg_val);
+}
+#endif
+
 /* ========================================================================== */
 /**
  *  dmm_tiler_alias_orientation_set()
@@ -254,6 +367,7 @@ enum errorCodeT dmm_pat_area_refill(struct PATDescrT *patDesc,
 			writeval = (regval & (~(f))) |
 				   ((((char)patDesc->area.x0) << fp) & f);
 			__raw_writel(writeval, reg);
+#ifndef __NEWCODE__
 			/* Apply 4 bit lft shft to counter the 4 bit rt shft */
 			reg = (void __iomem *)
 			((unsigned long)dmm_virt_base_addr | (0x500ul + 0xc));
@@ -291,6 +405,66 @@ enum errorCodeT dmm_pat_area_refill(struct PATDescrT *patDesc,
 			writeval = (regval & (~(f))) |
 				   (((patDesc->ctrl.start) << fp) & f);
 			__raw_writel(writeval, reg);
+#else
+			reg = (void __iomem *)(
+					(unsigned long)dmm_virt_base_addr |
+						(unsigned long)PAT_STATUS__0);
+			regdump("PAT_STATUS__0", __raw_readl(reg));
+
+			reg = (void __iomem *)(
+					(unsigned long)dmm_virt_base_addr |
+					(unsigned long)PAT_IRQSTATUS_RAW);
+			regdump("PAT_IRQSTATUS_RAW", __raw_readl(reg));
+
+			reg = (void __iomem *)(
+					(unsigned long)dmm_virt_base_addr |
+						(unsigned long)PAT_IRQSTATUS);
+			regdump("PAT_IRQSTATUS", __raw_readl(reg));
+
+			/* read and print data register */
+			reg = (void __iomem *)
+			((unsigned long)dmm_virt_base_addr | (0x500ul + 0xc));
+			regval = __raw_readl(reg);
+			regdump("PAT_DATA__0", regval);
+
+			/* Apply 4 bit lft shft to counter the 4 bit rt shft */
+			f  = BITFIELD(31, 4);
+			fp = 4;
+			writeval = (regval & (~(f))) | ((((unsigned long)
+					(patDesc->data >> 4)) << fp) & f);
+			__raw_writel(writeval, reg);
+
+			/* read and print data register again */
+			reg = (void __iomem *)
+			((unsigned long)dmm_virt_base_addr | (0x500ul + 0xc));
+			regval = __raw_readl(reg);
+			regdump("PAT_DATA__0", regval);
+
+			struct pat_desc pat_desc = {0};
+			pat_desc.ctrl.start = 1;
+			pat_desc.ctrl.direction = 0;
+			pat_desc.ctrl.lut_id = 0;
+			pat_desc.ctrl.sync = 0;
+			pat_desc.ctrl.initiator = 0;
+			pat_ctrl_set(&pat_desc.ctrl, 0);
+
+			reg = (void __iomem *)(
+					(unsigned long)dmm_virt_base_addr |
+						(unsigned long)PAT_STATUS__0);
+			regdump("PAT_STATUS__0", __raw_readl(reg));
+
+			reg = (void __iomem *)(
+					(unsigned long)dmm_virt_base_addr |
+					(unsigned long)PAT_IRQSTATUS_RAW);
+			regdump("PAT_IRQSTATUS_RAW", __raw_readl(reg));
+
+			reg = (void __iomem *)(
+					(unsigned long)dmm_virt_base_addr |
+						(unsigned long)PAT_IRQSTATUS);
+			regdump("PAT_IRQSTATUS", __raw_readl(reg));
+
+			/* pat_config_set(); */
+#endif
 		} else {
 			eCode = DMM_WRONG_PARAM;
 		}
diff --git a/drivers/media/video/tiler/dmm_page_rep.c b/drivers/media/video/tiler/dmm_page_rep.c
index 92f823a10d81..7073a9fa6169 100644
--- a/drivers/media/video/tiler/dmm_page_rep.c
+++ b/drivers/media/video/tiler/dmm_page_rep.c
@@ -19,6 +19,8 @@
 #include <linux/mmzone.h>  /* __page_to_phys */
 #include "dmm_prv.h"
 
+#define __NEWCODE__
+
 #ifdef CHECK_STACK
 #define lajosdump(x) printk(KERN_NOTICE "%s::%s():%d: %s=%p\n",\
 					__FILE__, __func__, __LINE__, #x, x);
@@ -94,9 +96,18 @@ void dmm_phys_page_rep_refil(void)
 
 			tmpPgNode->nextPhysPg = NULL;
 			tmpPgNode->prevPhysPg = NULL;
+#ifndef __NEWCODE__
 			tmpPgNode->physPgPtr =
 				(unsigned long *)__get_free_page(
 							GFP_KERNEL | GFP_DMA);
+#else
+			struct page *page = NULL;
+
+			page = (struct page *)alloc_page(GFP_KERNEL | GFP_DMA);
+			tmpPgNode->physPgPtr =
+					(unsigned long *)page_to_phys(page);
+			tmpPgNode->page_addr = page;
+#endif
 
 			/* add to end */
 			if (freePagesStack != NULL) {
@@ -173,15 +184,25 @@ enum errorCodeT dmm_phys_page_rep_deinit(void)
 
 	while (usedPagesStack != NULL) {
 		tmpPgNode = usedPagesStack->prevPhysPg;
+#ifndef __NEWCODE__
 		free_page((unsigned long)usedPagesStack->physPgPtr);
 		kfree(usedPagesStack);
+#else
+		__free_page(usedPagesStack->page_addr);
+		kfree(usedPagesStack);
+#endif
 		usedPagesStack = tmpPgNode;
 	}
 
 	while (freePagesStack != NULL) {
 		tmpPgNode = freePagesStack->prevPhysPg;
+#ifndef __NEWCODE__
 		free_page((unsigned long)freePagesStack->physPgPtr);
 		kfree(freePagesStack);
+#else
+		__free_page(freePagesStack->page_addr);
+		kfree(freePagesStack);
+#endif
 		freePagesStack = tmpPgNode;
 	}
 
@@ -303,9 +324,14 @@ enum errorCodeT dmm_free_phys_page(unsigned long *physPgPtr)
 			while (freePageCnt > DMM_MNGD_PHYS_PAGES &&
 						freePagesStack != NULL) {
 				iterPgNode = freePagesStack->prevPhysPg;
+#ifndef __NEWCODE__
 				free_page((unsigned long)
 						freePagesStack->physPgPtr);
 				kfree(freePagesStack);
+#else
+				__free_page(freePagesStack->page_addr);
+				kfree(freePagesStack);
+#endif
 				freePagesStack = iterPgNode;
 				freePageCnt--;
 			}
diff --git a/drivers/media/video/tiler/dmm_prv.h b/drivers/media/video/tiler/dmm_prv.h
index 29e76a440e93..24f775d4be33 100644
--- a/drivers/media/video/tiler/dmm_prv.h
+++ b/drivers/media/video/tiler/dmm_prv.h
@@ -21,6 +21,56 @@
 #include "dmm_drv.h"
 #include "dmm_reg.h"
 
+#define __NEWCODE__
+#ifdef __NEWCODE__
+
+#if 0
+#define debug(x) printk(KERN_NOTICE "%s()::%d:%s=(0x%08x)\n", \
+				__func__, __LINE__, #x, (int)x);
+
+#define regdump(x, y) printk(KERN_NOTICE "%s()::%d:%s=(0x%08x)\n", \
+				__func__, __LINE__, x, (int)y);
+#else
+#define debug(x)
+#define regdump(x, y)
+#endif
+
+#define DMM_BASE     0x4E000000
+#define DMM_REVISION      0x000
+#define DMM_HWINFO        0x004
+#define LISA_HWINFO       0x008
+#define DMM_SYSCONFIG     0x010
+#define LISA_LOCK         0x01C
+#define LISA_MAP__0       0x040
+#define LISA_MAP__1       0x044
+#define TILER_HWINFO      0x208
+#define TILER_OR__0       0x220
+#define TILER_OR__1       0x224
+#define PAT_HWINFO        0x408
+#define PAT_GEOMETRY      0x40C
+#define PAT_CONFIG        0x410
+#define PAT_VIEW__0       0x420
+#define PAT_VIEW__1       0x424
+#define PAT_VIEW_MAP__0   0x440
+#define PAT_VIEW_MAP_BASE 0x460
+#define PAT_IRQ_EOI       0x478
+#define PAT_IRQSTATUS_RAW 0x480
+#define PAT_IRQSTATUS     0x490
+#define PAT_IRQENABLE_SET 0x4A0
+#define PAT_IRQENABLE_CLR 0x4B0
+#define PAT_STATUS__0     0x4C0
+#define PAT_STATUS__1     0x4C4
+#define PAT_STATUS__2     0x4C8
+#define PAT_STATUS__3     0x4CC
+#define PAT_DESCR__0      0x500
+#define PAT_AREA__0       0x504
+#define PAT_CTRL__0       0x508
+#define PAT_DATA__0       0x50C
+#define PEG_HWINFO        0x608
+#define PEG_PRIO          0x620
+#define PEG_PRIO_PAT      0x640
+#endif
+
 #undef __DEBUG__
 
 #ifdef __DEBUG__
@@ -33,7 +83,11 @@
 #define DMM__DMM    DMM__DMM
 #define DMM_PAT_AREA_IRQ (0)
 
+#ifndef __NEWCODE__
 #define DMM_MNGD_PHYS_PAGES        (256)
+#else
+#define DMM_MNGD_PHYS_PAGES (16)
+#endif
 
 #define DMM_TILE_DIMM_X_MODE_8    (32)
 #define DMM_TILE_DIMM_Y_MODE_8    (32)
@@ -175,6 +229,9 @@ struct dmmPhysPgLLT {
 	struct dmmPhysPgLLT *nextPhysPg;
 	struct dmmPhysPgLLT *prevPhysPg;
 	unsigned long *physPgPtr;
+#ifdef __NEWCODE__
+	struct page *page_addr;
+#endif
 };
 
 /** @struc dmmHwdCtxT
@@ -354,7 +411,6 @@ enum errorCodeT dmm_tiler_populate_pat_page_entry_data(unsigned long bfrSize,
 		unsigned long **pageEntries,
 		unsigned long **pageEntriesSpace,
 		void *custmPagesPtr);
-
 /* ========================================================================== */
 /**
  *  dmm_tiler_swap_pat_page_entry_data()