diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2025-04-16 16:43:52 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-04-22 08:51:45 -0400 |
| commit | 11772eb73bb75558b530162fc0eb669e5bbc1d19 (patch) | |
| tree | 68b756e6b6f29c9b89f68d9644de6bc2fd687da5 | |
| parent | 4b27406380b0b9ada6b4893bc8f6766dd34fff36 (diff) | |
drm/amdgpu/userq: add a helper to check which IPs are enabled
Add a helper to get a mask of IPs which support user queues.
Use this in the INFO IOCTL to get the IP mask to replace
the current code.
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 7 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 13 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.h | 2 |
3 files changed, 16 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 3d319687c1c9..151366ecc0af 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -1009,12 +1009,7 @@ out: } } - if (adev->userq_funcs[AMDGPU_HW_IP_GFX]) - dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_GFX); - if (adev->userq_funcs[AMDGPU_HW_IP_COMPUTE]) - dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_COMPUTE); - if (adev->userq_funcs[AMDGPU_HW_IP_DMA]) - dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_DMA); + dev_info->userq_ip_mask = amdgpu_userqueue_get_supported_ip_mask(adev); ret = copy_to_user(out, dev_info, min((size_t)size, sizeof(*dev_info))) ? -EFAULT : 0; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c index 8f6510b78dee..59488acd89fa 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c @@ -31,6 +31,19 @@ #include "amdgpu_userqueue.h" #include "amdgpu_userq_fence.h" +u32 amdgpu_userqueue_get_supported_ip_mask(struct amdgpu_device *adev) +{ + int i; + u32 userq_ip_mask = 0; + + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { + if (adev->userq_funcs[i]) + userq_ip_mask |= (1 << i); + } + + return userq_ip_mask; +} + static void amdgpu_userqueue_cleanup(struct amdgpu_userq_mgr *uq_mgr, struct amdgpu_usermode_queue *queue, diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.h index b2da513b3d02..b49f147eb69c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.h @@ -113,6 +113,8 @@ uint64_t amdgpu_userqueue_get_doorbell_index(struct amdgpu_userq_mgr *uq_mgr, struct amdgpu_db_info *db_info, struct drm_file *filp); +u32 amdgpu_userqueue_get_supported_ip_mask(struct amdgpu_device *adev); + int amdgpu_userq_suspend(struct amdgpu_device *adev); int amdgpu_userq_resume(struct amdgpu_device *adev); |