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| author | Arnd Bergmann <arnd@arndb.de> | 2025-03-06 16:34:42 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2025-03-06 16:34:42 +0100 |
| commit | 26e29a26f84a7dc88e69f3b164753127a2b2cd23 (patch) | |
| tree | 1a297641abc0fcb72c0eab2cb82c4f38a31621be | |
| parent | 0d11b39dab4247a910f5a79e3c88c638a2a1c2f1 (diff) | |
| parent | 1b133129ad6b28186214259af3bd5fc651a85509 (diff) | |
Merge tag 'riscv-dt-fixes-for-v6.14-rc6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into arm/fixes
RISC-V Devicetree fix for v6.14-rc6
A single fix for an incorrect define in the jh7110 pinctrl header.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-dt-fixes-for-v6.14-rc6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: dts: starfive: Fix a typo in StarFive JH7110 pin function definitions
Link: https://lore.kernel.org/r/20250305-sip-unable-d56ef7dbf86b@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| -rw-r--r-- | arch/riscv/boot/dts/starfive/jh7110-pinfunc.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h b/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h index 256de17f5261..ae49c908e7fb 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h +++ b/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h @@ -89,7 +89,7 @@ #define GPOUT_SYS_SDIO1_DATA1 59 #define GPOUT_SYS_SDIO1_DATA2 60 #define GPOUT_SYS_SDIO1_DATA3 61 -#define GPOUT_SYS_SDIO1_DATA4 63 +#define GPOUT_SYS_SDIO1_DATA4 62 #define GPOUT_SYS_SDIO1_DATA5 63 #define GPOUT_SYS_SDIO1_DATA6 64 #define GPOUT_SYS_SDIO1_DATA7 65 |