diff options
| author | Marc Zyngier <maz@kernel.org> | 2025-01-27 11:58:38 +0000 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2025-05-10 11:04:35 +0100 |
| commit | 397411c743c77a9c1d90f407b502010227a259dc (patch) | |
| tree | c22900c262a0122e99f3c5b9d09d64060ae437b7 | |
| parent | ef6d7d2682d948df217db73985e0a159305c7743 (diff) | |
KVM: arm64: Handle PSB CSYNC traps
The architecture introduces a trap for PSB CSYNC that fits in
the same EC as LS64. Let's deal with it in a similar way as
LS64.
It's not that we expect this to be useful any time soon anyway.
Signed-off-by: Marc Zyngier <maz@kernel.org>
| -rw-r--r-- | arch/arm64/include/asm/esr.h | 3 | ||||
| -rw-r--r-- | arch/arm64/kvm/emulate-nested.c | 1 | ||||
| -rw-r--r-- | arch/arm64/kvm/handle_exit.c | 5 | ||||
| -rw-r--r-- | arch/arm64/tools/sysreg | 2 |
4 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h index a0ae66dd65da..ef5a14276ce1 100644 --- a/arch/arm64/include/asm/esr.h +++ b/arch/arm64/include/asm/esr.h @@ -182,10 +182,11 @@ #define ESR_ELx_WFx_ISS_WFE (UL(1) << 0) #define ESR_ELx_xVC_IMM_MASK ((UL(1) << 16) - 1) -/* ISS definitions for LD64B/ST64B instructions */ +/* ISS definitions for LD64B/ST64B/PSBCSYNC instructions */ #define ESR_ELx_ISS_OTHER_ST64BV (0) #define ESR_ELx_ISS_OTHER_ST64BV0 (1) #define ESR_ELx_ISS_OTHER_LDST64B (2) +#define ESR_ELx_ISS_OTHER_PSBCSYNC (4) #define DISR_EL1_IDS (UL(1) << 24) /* diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c index c581cf29bc59..0b033d3a3d7a 100644 --- a/arch/arm64/kvm/emulate-nested.c +++ b/arch/arm64/kvm/emulate-nested.c @@ -2000,6 +2000,7 @@ static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = { * trap is handled somewhere else. */ static const union trap_config non_0x18_fgt[] __initconst = { + FGT(HFGITR, PSBCSYNC, 1), FGT(HFGITR, nGCSSTR_EL1, 0), FGT(HFGITR, SVC_EL1, 1), FGT(HFGITR, SVC_EL0, 1), diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c index cc5c2eeebab3..cc44ee56e512 100644 --- a/arch/arm64/kvm/handle_exit.c +++ b/arch/arm64/kvm/handle_exit.c @@ -347,6 +347,11 @@ static int handle_other(struct kvm_vcpu *vcpu) if (is_l2) fwd = !(hcrx & HCRX_EL2_EnALS); break; + case ESR_ELx_ISS_OTHER_PSBCSYNC: + allowed = kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMSVer, V1P5); + if (is_l2) + fwd = (__vcpu_sys_reg(vcpu, HFGITR_EL2) & HFGITR_EL2_PSBCSYNC); + break; default: /* Clearly, we're missing something. */ WARN_ON_ONCE(1); diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 44bc4defebf5..b69b30dcacf3 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -3406,7 +3406,7 @@ Field 0 AFSR0_EL1 EndSysreg Sysreg HFGITR_EL2 3 4 1 1 6 -Res0 63 +Field 63 PSBCSYNC Field 62 ATS1E1A Res0 61 Field 60 COSPRCTX |