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authorWajahat Khan <w-khan@ti.com>2010-09-15 12:59:35 -0500
committerRicardo Perez Olivares <x0081762@ti.com>2010-09-17 18:35:51 -0500
commit61136780c1f9d07318a182522cea045a85a6166d (patch)
tree79578b338303c6d6d78e7fefdf69688533bfd226
parent679ef1720e5204de1f799ffee4f319342abcea0c (diff)
omap:iommu: set MMU_GP_REG to force a bus error upon MMU fault
MMU_GP_REG[0] determines the behavior of Ducati cores upon hitting an MMU fault (address is not mapped in L2MMU). If it is not set, the cores are hung preventing the fault handler to run. If one introduces a bus error, the fault handler gets to run and prints state information which is useful for debug. Signed-off-by: Wajahat Khan <w-khan@ti.com> Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
-rw-r--r--arch/arm/mach-omap2/iommu2.c3
-rw-r--r--arch/arm/plat-omap/include/plat/iommu2.h1
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c
index 438339fbb10a..e1d71ea21eed 100644
--- a/arch/arm/mach-omap2/iommu2.c
+++ b/arch/arm/mach-omap2/iommu2.c
@@ -134,6 +134,9 @@ static int omap2_iommu_enable(struct iommu *obj)
omap2_iommu_set_twl(obj, true);
+ if (cpu_is_omap44xx())
+ iommu_write_reg(obj, 0x1, MMU_GP_REG);
+
return 0;
}
diff --git a/arch/arm/plat-omap/include/plat/iommu2.h b/arch/arm/plat-omap/include/plat/iommu2.h
index 2e57acb004cd..c1ed038dde6b 100644
--- a/arch/arm/plat-omap/include/plat/iommu2.h
+++ b/arch/arm/plat-omap/include/plat/iommu2.h
@@ -38,6 +38,7 @@
#define MMU_EMU_FAULT_AD 0x70
#define MMU_FAULT_PC 0x80
#define MMU_FAULT_STATUS 0x84
+#define MMU_GP_REG 0x88
/*
* MMU Register bit definitions