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authorSean Christopherson <seanjc@google.com>2025-04-01 09:34:42 -0700
committerSean Christopherson <seanjc@google.com>2025-04-24 11:19:38 -0700
commit6433fc01f9f19573894cdcf776679c10d1310801 (patch)
tree8256cf8368d15fbc972711d3ace19dc8c9c6803b
parent3cdb8261504cc5503a74d57e619cd7915431b088 (diff)
KVM: VMX: Ensure vIRR isn't reloaded at odd times when sync'ing PIR
Read each vIRR exactly once when shuffling IRQs from the PIR to the vAPIC to ensure getting the highest priority IRQ from the chunk doesn't reload from the vIRR. In practice, a reload is functionally benign as vcpu->mutex is held and so IRQs can be consumed, i.e. new IRQs can appear, but existing IRQs can't disappear. Link: https://lore.kernel.org/r/20250401163447.846608-4-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
-rw-r--r--arch/x86/kvm/lapic.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index c9de81cc27e1..38d793a96686 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -667,7 +667,7 @@ bool __kvm_apic_update_irr(u32 *pir, void *regs, int *max_irr)
for (i = vec = 0; i <= 7; i++, vec += 32) {
u32 *p_irr = (u32 *)(regs + APIC_IRR + i * 0x10);
- irr_val = *p_irr;
+ irr_val = READ_ONCE(*p_irr);
pir_val = READ_ONCE(pir[i]);
if (pir_val) {