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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2022-05-08 18:55:51 +0100
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2022-06-14 11:53:12 +0100
commit98295a206d04633bae31f279de11ff7d04724bce (patch)
tree12b5e3b6b02ba8f027a3da2718e0f002f63f104e
parent4e2008429588b857bbc13d048b67b931a8d84816 (diff)
iio: adc: ad7292: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 506d2e317a0a ("iio: adc: Add driver support for AD7292") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-12-jic23@kernel.org
-rw-r--r--drivers/iio/adc/ad7292.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iio/adc/ad7292.c b/drivers/iio/adc/ad7292.c
index 3271a31afde1..92c68d467c50 100644
--- a/drivers/iio/adc/ad7292.c
+++ b/drivers/iio/adc/ad7292.c
@@ -80,7 +80,7 @@ struct ad7292_state {
struct regulator *reg;
unsigned short vref_mv;
- __be16 d16 ____cacheline_aligned;
+ __be16 d16 __aligned(IIO_DMA_MINALIGN);
u8 d8[2];
};