diff options
| author | Wenjing Liu <wenjing.liu@amd.com> | 2022-03-25 16:12:14 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-06-21 18:17:24 -0400 |
| commit | 990cad0e4a9df4202cd482c192608caf6408e4b3 (patch) | |
| tree | 359321176df5cd4881648be10c2a24fdf19e62e0 | |
| parent | 20cb72174ddcc86596286784416adb947195e45c (diff) | |
drm/amd/display: extract update stream allocation to link_hwss
[Why & How]
Extract update stream allocation table into link hwss as part of the
link hwss refactor work.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: George Shen <George.Shen@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link.c | 10 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/link_hwss.h | 6 |
2 files changed, 10 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index fd053d6bdf73..1206a3dd746f 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -3871,7 +3871,6 @@ enum dc_status dc_link_increase_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t struct fixed31_32 avg_time_slots_per_mtp; struct fixed31_32 pbn; struct fixed31_32 pbn_per_slot; - struct link_encoder *link_encoder = link->link_enc; struct dp_mst_stream_allocation_table proposed_table = {0}; uint8_t i; enum act_return_status ret; @@ -3915,8 +3914,13 @@ enum dc_status dc_link_increase_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t ASSERT(proposed_table.stream_count > 0); /* update mst stream allocation table hardware state */ - link_encoder->funcs->update_mst_stream_allocation_table( - link_encoder, + if (link_hwss->ext.update_stream_allocation_table == NULL || + dp_get_link_encoding_format(&link->cur_link_settings) == DP_UNKNOWN_ENCODING) { + DC_LOG_ERROR("Failure: unknown encoding format\n"); + return DC_ERROR_UNEXPECTED; + } + + link_hwss->ext.update_stream_allocation_table(link, &pipe_ctx->link_res, &link->mst_stream_alloc_table); /* poll for immediate branch device ACT handled */ diff --git a/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h b/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h index e6c49ef8b584..3482a877b6af 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h +++ b/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h @@ -62,9 +62,9 @@ struct link_hwss_ext { const struct link_resource *link_res, struct encoder_set_dp_phy_pattern_param *tp_params); void (*set_dp_lane_settings)(struct dc_link *link, - const struct link_resource *link_res, - const struct dc_link_settings *link_settings, - const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]); + const struct link_resource *link_res, + const struct dc_link_settings *link_settings, + const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]); void (*update_stream_allocation_table)(struct dc_link *link, const struct link_resource *link_res, const struct link_mst_stream_allocation_table *table); |