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authorThomas Zimmermann <tzimmermann@suse.de>2025-03-05 17:30:42 +0100
committerThomas Zimmermann <tzimmermann@suse.de>2025-03-12 08:38:10 +0100
commita958c7f13b0b4ffd41384293d307b9d6218fcc87 (patch)
tree0806038e4c94a68b7c485ba49e9d226cd178c2d5
parent9f711d1877e052171ae21da4cb831e7184b9872e (diff)
drm/ast: Add VGACR99 register constants
Add register constants for VGACR99 and use them when detecting the size of the VGA memory. Aligns the code with the programming manual. Also replace literal size values with Linux' SZ_ size constants. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250305163207.267650-4-tzimmermann@suse.de
-rw-r--r--drivers/gpu/drm/ast/ast_mm.c13
-rw-r--r--drivers/gpu/drm/ast/ast_reg.h1
2 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/ast/ast_mm.c b/drivers/gpu/drm/ast/ast_mm.c
index 8d8aac8c0814..3d03ef556d0a 100644
--- a/drivers/gpu/drm/ast/ast_mm.c
+++ b/drivers/gpu/drm/ast/ast_mm.c
@@ -35,9 +35,8 @@
static u32 ast_get_vram_size(struct ast_device *ast)
{
- u8 jreg;
u32 vram_size;
- u8 vgacraa;
+ u8 vgacr99, vgacraa;
vgacraa = ast_get_index_reg(ast, AST_IO_VGACRI, 0xaa);
switch (vgacraa & AST_IO_VGACRAA_VGAMEM_SIZE_MASK) {
@@ -55,16 +54,16 @@ static u32 ast_get_vram_size(struct ast_device *ast)
break;
}
- jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0x99, 0xff);
- switch (jreg & 0x03) {
+ vgacr99 = ast_get_index_reg(ast, AST_IO_VGACRI, 0x99);
+ switch (vgacr99 & AST_IO_VGACR99_VGAMEM_RSRV_MASK) {
case 1:
- vram_size -= 0x100000;
+ vram_size -= SZ_1M;
break;
case 2:
- vram_size -= 0x200000;
+ vram_size -= SZ_2M;
break;
case 3:
- vram_size -= 0x400000;
+ vram_size -= SZ_4M;
break;
}
diff --git a/drivers/gpu/drm/ast/ast_reg.h b/drivers/gpu/drm/ast/ast_reg.h
index 039b93bed19e..e15adaf3a80e 100644
--- a/drivers/gpu/drm/ast/ast_reg.h
+++ b/drivers/gpu/drm/ast/ast_reg.h
@@ -30,6 +30,7 @@
#define AST_IO_VGACRI (0x54)
#define AST_IO_VGACR80_PASSWORD (0xa8)
+#define AST_IO_VGACR99_VGAMEM_RSRV_MASK GENMASK(1, 0)
#define AST_IO_VGACRA1_VGAIO_DISABLED BIT(1)
#define AST_IO_VGACRA1_MMIO_ENABLED BIT(2)
#define AST_IO_VGACRA3_DVO_ENABLED BIT(7)