diff options
| author | Vamshi Gajjela <vamshigajjela@google.com> | 2023-11-26 21:34:20 +0530 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-11-28 19:24:14 +0000 |
| commit | d804987153e7bedf503f8e4ba649afe52cfd7f6d (patch) | |
| tree | 13ac419317b50dd92e7159797b9f9caaca741585 | |
| parent | 068ab2135b3fe0d8957f099a5b860117457825ec (diff) | |
serial: 8250_dw: Decouple DLF register check from UCV
Designware UART has an optional feature to enable Fractional Baud Rate
Divisor (DLF) through the FRACTIONAL_BAUD_DIVISOR_EN configuration
parameter, and it is not dependent on ADDITIONAL_FEATURES.
dw8250_setup_port() checks DLF to determine dlf_size only when UART
Component Version (UCV) is non-zero. As mentioned above DLF and UCV are
independent features. Move the logic corresponding to DLF size
calculation ahead of the UCV check to prevent early return. Otherwise,
dlf_size will be zero and driver will not be able to use the
controller's fractional baud rate divisor (DLF) feature.
Signed-off-by: Vamshi Gajjela <vamshigajjela@google.com>
Link: https://lore.kernel.org/r/20231126160420.2442330-1-vamshigajjela@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/tty/serial/8250/8250_dwlib.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/tty/serial/8250/8250_dwlib.c b/drivers/tty/serial/8250/8250_dwlib.c index 84843e204a5e..136ad093c5b6 100644 --- a/drivers/tty/serial/8250/8250_dwlib.c +++ b/drivers/tty/serial/8250/8250_dwlib.c @@ -259,17 +259,6 @@ void dw8250_setup_port(struct uart_port *p) } up->capabilities |= UART_CAP_NOTEMT; - /* - * If the Component Version Register returns zero, we know that - * ADDITIONAL_FEATURES are not enabled. No need to go any further. - */ - reg = dw8250_readl_ext(p, DW_UART_UCV); - if (!reg) - return; - - dev_dbg(p->dev, "Designware UART version %c.%c%c\n", - (reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 8) & 0xff); - /* Preserve value written by firmware or bootloader */ old_dlf = dw8250_readl_ext(p, DW_UART_DLF); dw8250_writel_ext(p, DW_UART_DLF, ~0U); @@ -282,6 +271,17 @@ void dw8250_setup_port(struct uart_port *p) p->set_divisor = dw8250_set_divisor; } + /* + * If the Component Version Register returns zero, we know that + * ADDITIONAL_FEATURES are not enabled. No need to go any further. + */ + reg = dw8250_readl_ext(p, DW_UART_UCV); + if (!reg) + return; + + dev_dbg(p->dev, "Designware UART version %c.%c%c\n", + (reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 8) & 0xff); + reg = dw8250_readl_ext(p, DW_UART_CPR); if (!reg) { reg = data->pdata->cpr_val; |