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path: root/drivers/gpu/drm/amd/amdgpu/soc15.h
AgeCommit message (Expand)Author
2023-11-29drm/amdgpu: Read aquavanjaram PCIE register stateLijo Lazar
2023-06-09drm/amdgpu: Add soc config init for GC9.4.3 ASICsLijo Lazar
2023-06-09drm/amdgpu: add helpers to access registers on different AIDsLe Ma
2023-06-09drm/amdgpu: switch to aqua_vanjaram_doorbell_index_initLe Ma
2023-06-09drm/amdgpu: Add IP instance map for aqua vanjaramLijo Lazar
2023-04-18drm/amdgpu: add xcc index argument to soc15_grbm_selectLe Ma
2021-10-20drm/amdgpu: drop soc15_set_ip_blocks()Alex Deucher
2021-10-04drm/amdgpu/soc15: export common IP functionsAlex Deucher
2021-09-23drm/amdgpu: make soc15_common_ip_funcs staticAlex Deucher
2021-03-23drm/amdgpu: refine ras codes for GC utc of aldebaranDennis Li
2021-03-23drm/amdgpu: add ras support for gfx of aldebaranDennis Li
2021-03-10drm/amdgpu: add register base init for aldebaran (v2)Le Ma
2020-07-02drm/amdgpu: request init data in virt detectionWenhui Sheng
2020-03-16drm/amdgpu: revise RLCG access pathMonk Liu
2019-11-22drm/amdgpu: invalidate mmhub semaphore workaround in gmc9/gmc10changzhu
2019-11-22drm/amdgpu: define soc15_ras_field_entry for reuseDennis Li
2019-10-15drm/amdgpu: change to query the actual EDC counterDennis Li
2019-07-18drm/amdgpu: dynamically initialize IP offset for ArcturusLe Ma
2019-06-21drm/amdgpu: avoid to use SOC15_REG_OFFSET in static array for navi10Hawking Zhang
2019-06-11drm/amdgpu: Fixed missing to clear some EDC countJames Zhu
2019-05-24drm/amdgpu: add gfx9 gpr EDC workaround when RAS is enabledJames Zhu
2018-11-28drm/amdgpu: Doorbell layout for vega20 and future asicOak Zeng
2018-11-28drm/amdgpu: Vega10 doorbell index initializationOak Zeng
2018-08-27drm/amdgpu: Add nbio 7.4 support for vega20 (v3)Feifei Xu
2018-05-17drm/amdgpu/soc15: dynamic initialize ip offset for vega20Feifei Xu
2018-02-19drm/amdgpu: move waiting for VM flush into gmc_v9_0_emit_flush_gpu_tlbChristian König
2018-02-19drm/amdgpu: add PASID mapping for GMC v9Christian König
2018-02-19drm/amdgpu: implement gmc_v9_0_emit_flush_gpu_tlbChristian König
2017-12-08drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const arrayShaoyun Liu
2017-12-08drm/amdgpu: Dynamic initialize IP base offsetShaoyun Liu
2017-05-24drm/amdgpu: apply nbio7 for Raven (v3)Chunming Zhou
2017-03-29drm/amdgpu: add common soc15 headersKen Wang
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