summaryrefslogtreecommitdiff
path: root/include/dt-bindings/power/mediatek,mt6893-power.h
blob: aeab51bb2ad8592394836baa249622a3b8e729ec (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/*
 * Copyright (c) 2025 Collabora Ltd
 *                    AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
 */

#ifndef _DT_BINDINGS_POWER_MT6893_POWER_H
#define _DT_BINDINGS_POWER_MT6893_POWER_H

#define MT6893_POWER_DOMAIN_CONN		0
#define MT6893_POWER_DOMAIN_MFG0		1
#define MT6893_POWER_DOMAIN_MFG1		2
#define MT6893_POWER_DOMAIN_MFG2		3
#define MT6893_POWER_DOMAIN_MFG3		4
#define MT6893_POWER_DOMAIN_MFG4		5
#define MT6893_POWER_DOMAIN_MFG5		6
#define MT6893_POWER_DOMAIN_MFG6		7
#define MT6893_POWER_DOMAIN_ISP			8
#define MT6893_POWER_DOMAIN_ISP2		9
#define MT6893_POWER_DOMAIN_IPE			10
#define MT6893_POWER_DOMAIN_VDEC0		11
#define MT6893_POWER_DOMAIN_VDEC1		12
#define MT6893_POWER_DOMAIN_VENC0		13
#define MT6893_POWER_DOMAIN_VENC1		14
#define MT6893_POWER_DOMAIN_MDP			15
#define MT6893_POWER_DOMAIN_DISP		16
#define MT6893_POWER_DOMAIN_AUDIO		17
#define MT6893_POWER_DOMAIN_ADSP		18
#define MT6893_POWER_DOMAIN_CAM			19
#define MT6893_POWER_DOMAIN_CAM_RAWA		20
#define MT6893_POWER_DOMAIN_CAM_RAWB		21
#define MT6893_POWER_DOMAIN_CAM_RAWC		22
#define MT6893_POWER_DOMAIN_DP_TX		23

#endif /* _DT_BINDINGS_POWER_MT6893_POWER_H */