Merge tag 'drm-next-5.3-2019-06-25' of git://people.freedesktop.org/~agd5f/linux into drm-next

drm-next-5.3-2019-06-25:

Merge drm-next

amdgpu:
- SR-IOV L1 policy fixes
- Removed no longer needed vram_page_split module parameter
- Add module parameter to override default ABM level
- Gamma fixes
- No need to check return values for debugfs
- Improve HMM error handling
- Avoid possible OOM situations when lots of thread are submitting with
  memory contention
- Improve hw i2c access abritration
- DSC (Display Stream Compression) support in DC
- Initial navi10 support
  * DC support
  * GFX/Compute support
  * SDMA support
  * Power Management support
  * VCN support
- Static checker fixes
- Misc cleanups
- fix long udelay on arm

amdkfd:
- Implement priority controls for gfx9
- Enable VEGAM
- Rework mqd allocation and init
- Circular locking fix
- Fix SDMA queue allocation race condition
- No need to check return values for debugfs
- Add proc style process information
- Initial navi10 support

radeon:
- No need to check return values for debugfs

UAPI changes:
- GDDR6 added to vram type query
- New Navi10 details added gpu info query
- Navi family added to asic family query

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190625195520.3817-1-alexander.deucher@amd.com

1 files changed, 27 insertions, 0 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
index a425329d1897..5c13c503e61f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
@@ -24,6 +24,10 @@
 #include "amdgpu.h"
 #include "amdgpu_sdma.h"
 
+#define AMDGPU_CSA_SDMA_SIZE 64
+/* SDMA CSA reside in the 3rd page of CSA */
+#define AMDGPU_CSA_SDMA_OFFSET (4096 * 2)
+
 /*
  * GPU SDMA IP block helpers function.
  */
@@ -56,3 +60,26 @@ int amdgpu_sdma_get_index_from_ring(struct amdgpu_ring *ring, uint32_t *index)
 
 	return -EINVAL;
 }
+
+uint64_t amdgpu_sdma_get_csa_mc_addr(struct amdgpu_ring *ring,
+				     unsigned vmid)
+{
+	struct amdgpu_device *adev = ring->adev;
+	uint64_t csa_mc_addr;
+	uint32_t index = 0;
+	int r;
+
+	if (vmid == 0 || !amdgpu_mcbp)
+		return 0;
+
+	r = amdgpu_sdma_get_index_from_ring(ring, &index);
+
+	if (r || index > 31)
+		csa_mc_addr = 0;
+	else
+		csa_mc_addr = amdgpu_csa_vaddr(adev) +
+			AMDGPU_CSA_SDMA_OFFSET +
+			index * AMDGPU_CSA_SDMA_SIZE;
+
+	return csa_mc_addr;
+}