diff options
| author | Dave Airlie <airlied@redhat.com> | 2018-04-11 08:35:41 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2018-04-11 08:35:41 +1000 |
| commit | 871e899db19da3dbd17a5d263b555dc5b7d8fed5 (patch) | |
| tree | 97d6232965ab5c5df6d43288a8c744eef9abd58e /drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | |
| parent | c975f17d700445051ad0f87c6822bd15816c587f (diff) | |
| parent | c60e22f7199b5fe7cee4007ccb3b27bb8a506476 (diff) | |
Merge branch 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few fixes for 4.17:
- Fix a potential use after free in a error case
- Fix pcie lane handling in amdgpu SI dpm
- sdma pipeline sync fix
- A few vega12 cleanups and fixes
- Misc other fixes
* 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux:
drm/amdgpu: Fix memory leaks at amdgpu_init() error path
drm/amdgpu: Fix PCIe lane width calculation
drm/radeon: Fix PCIe lane width calculation
drm/amdgpu/si: implement get/set pcie_lanes asic callback
drm/amdgpu: Add support for SRBM selection v3
Revert "drm/amdgpu: Don't change preferred domian when fallback GTT v5"
drm/amd/powerply: fix power reading on Fiji
drm/amd/powerplay: Enable ACG SS feature
drm/amdgpu/sdma: fix mask in emit_pipeline_sync
drm/amdgpu: Fix KIQ hang on bare metal for device unbind/bind back v2.
drm/amd/pp: Clean header file in vega12_smumgr.c
drm/amd/pp: Remove Dead functions on Vega12
drm/amd/pp: silence a static checker warning
drm/amdgpu: drop compute ring timeout setting for non-sriov only (v2)
drm/amdgpu: fix typo of domain fallback
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 27943e57681c..b0e591eaa71a 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c @@ -3475,6 +3475,12 @@ static void gfx_v8_0_select_se_sh(struct amdgpu_device *adev, WREG32(mmGRBM_GFX_INDEX, data); } +static void gfx_v8_0_select_me_pipe_q(struct amdgpu_device *adev, + u32 me, u32 pipe, u32 q) +{ + vi_srbm_select(adev, me, pipe, q, 0); +} + static u32 gfx_v8_0_get_rb_active_bitmap(struct amdgpu_device *adev) { u32 data, mask; @@ -5442,6 +5448,7 @@ static const struct amdgpu_gfx_funcs gfx_v8_0_gfx_funcs = { .select_se_sh = &gfx_v8_0_select_se_sh, .read_wave_data = &gfx_v8_0_read_wave_data, .read_wave_sgprs = &gfx_v8_0_read_wave_sgprs, + .select_me_pipe_q = &gfx_v8_0_select_me_pipe_q }; static int gfx_v8_0_early_init(void *handle) |