diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2023-04-25 16:12:15 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2023-04-25 16:12:15 -0700 |
commit | c8cc58e289ed3b5bc50258f52776cf3dfa3bad66 (patch) | |
tree | fab95a9e92dd1b7ddec386294365ebd2ba130ec3 /drivers/gpu/drm/ast/ast_post.c | |
parent | 736b378b29d89c8c3567fa4b2e948be5568aebb8 (diff) | |
parent | 289af45508ca890585f329376d16e08f41f75bd5 (diff) |
Merge tag 'drm-next-2023-04-24' of git://anongit.freedesktop.org/drm/drm
Pull drm updates from Dave Airlie:
"There is a new Qualcomm accel driver for their QAIC, dma-fence got a
deadline feature added, lots of refactoring around fbdev emulation,
and the usual pre-release hw enablements from AMD and Intel and fixes
everywhere.
New drivers:
- add QAIC acceleration driver
dma-buf:
- constify kobj_type structs
- Reject prime DMA-Buf attachment if get_sg_table is missing.
fbdev:
- cmdline parser fixes
- implement fbdev emulation for GEM DMA drivers
- always use shadow buffer in fbdev emulation helpers
dma-fence:
- add deadline hint to fences
- signal private stub fence
core:
- improve DisplayID 2.0 and EDID parsing
- add gem eviction function + callback
- prep to convert shmem helper to GEM resv lock
- move suballocator from radeon/amdgpu to core for Xe
- HPD polling fixes
- Documentation improvements
- Add atomic enable_plane callback
- use tgid instead of pid for client tracking
- DP: Add SDP Error Detection Configuration Register
- Add prime import/export to vram-helper
- use pci aperture helpers in more drivers
panel:
- Radxa 8/10HD support
- Samsung AMD495QA01 support
- Elida KD50T048A
- Sony TD4353
- Novatek NT36523
- STARRY 2081101QFH032011-53G
- B133UAN01.0
- AUO NE135FBM-N41
i915:
- More MTL enabling
- fix s/r problems with MEI/PXP
- Implement fb_dirty for PSR,FBC,DRRS fixes
- Fix eDP+DSI dual panel systems
- Fix issue #6333: "list_add corruption" and full system lockup from
performance monitoring
- Don't use stolen memory or BAR for ring buffers on LLC platforms
- Make sure DSM size has correct 1MiB granularity on Gen12+
- Whitelist COMMON_SLICE_CHICKEN3 for UMD access on Gen12+
- Add engine TLB invalidation for Meteorlake
- Fix GSC races on driver load/unload on Meteorlake+
- Make kobj_type structures constant
- Move fd_install after last use of fence
- wm/vblank refactoring
- display code refactoring
- Create GSC submission targeting HDCP and PXP usages on MTL+
- Enable HDCP2.x via GSC CS
- Fix context runtime accounting on sysfs fdinfo for heavy workloads
- Use i915 instead of dev_priv insied the file_priv structure
- Replace fake flex-array with flexible-array member
amdgpu:
- Make kobj structures const
- Generalize dmabuf import to work with KFD
- Add capped/uncapped workload handling for supported APUs
- Expose additional memory stats via fdinfo
- Register vga_switcheroo for apple-gmux
- Initial NBIO7.9, GC 9.4.3, GFXHUB 1.2, MMHUB 1.8 support
- Initial DC FAM infrastructure
- Link DC backlight to connector device rather than PCI device
- Add sysfs nodes for secondary VCN clocks
amdkfd:
- Make kobj structures const
- Support for exporting buffers via dmabuf
- Multi-VMA page migration fixes
- initial GC 9.4.3 support
radeon:
- iMac fix
- convert to client based fbdev emulation
habanalabs:
- Add opcodes to the CS ioctl to allow user to stall/resume specific
engines inside Gaudi2.
- INFO ioctl the amount of device memory that the driver and f/w
reserve for themselves.
- INFO ioctl a bit-mask of the available rotator engines
- INFO ioctl the register's address of the f/w that should be used to
trigger interrupts
- INFO ioctl two new opcodes to fetch information on h/w and f/w
events
- Enable graceful reset mechanism for compute-reset.
- Align to the latest firmware specs.
- Enforce the release order of the compute device and dma-buf.
msm:
- UBWC decoder programming rework
- SM8550, SM8450 bindings update
- uapi C++ fix
- a3xx and a4xx devfreq support
- GPU and GEM updates to avoid allocations which could trigger
reclaim (shrinker) in fence signaling path
- dma-fence deadline hint support and wait-boost
- a640/650 speed bin support
cirrus:
- convert to regular atomic helpers
- add damage clipping
mediatek:
- 10-bit overlay support
- mt8195 support
- Only trigger DRM HPD events if bridge is attached
- Change the aux retries times when receiving AUX_DEFER
rockchip:
- add 4K support
vc4:
- use drm_gem_objects
virtio:
- allow KMS support to be disabled
- add damage clipping
vmwgfx:
- buffer object lifetime fixes
exynos:
- move MIPI DSI driver to drm bridge for iMX sharing
- use kernel fbdev emulation
panfrost:
- add support for mali MT81xx devices
- add speed binning support
lima:
- add usage stats
tegra:
- fbdev client conversion
vkms:
- Add primary plane positioning support"
* tag 'drm-next-2023-04-24' of git://anongit.freedesktop.org/drm/drm: (1495 commits)
drm/i915/dp_mst: Fix active port PLL selection for secondary MST streams
drm/exynos: Implement fbdev emulation as in-kernel client
drm/exynos: Initialize fbdev DRM client
drm/exynos: Remove fb_helper from struct exynos_drm_private
drm/exynos: Remove struct exynos_drm_fbdev
drm/exynos: Remove exynos_gem from struct exynos_drm_fbdev
drm/i915: Fix memory leaks in i915 selftests
drm/i915: Make intel_get_crtc_new_encoder() less oopsy
drm/i915/gt: Avoid out-of-bounds access when loading HuC
drm/amdgpu: add some basic elements for multiple XCD case
drm/amdgpu: move vmhub out of amdgpu_ring_funcs (v4)
Revert "drm/amdgpu: enable ras for mp0 v13_0_10 on SRIOV"
drm/amdgpu: add common ip block for GC 9.4.3
drm/amd/display: Add logging when DP link training Clock recovery is Successful
drm/amdgpu: add common early init support for GC 9.4.3
drm/amdgpu: switch to v9_4_3 gfx_funcs callbacks for GC 9.4.3
drm/amd/display: Add logging when setting DP sink power state fails
drm/amdkfd: Add gfx_target_version for GC 9.4.3
drm/amdkfd: Enable HW_UPDATE_RPTR on GC 9.4.3
drm/amdgpu: reserve the old gc_11_0_*_mes.bin
...
Diffstat (limited to 'drivers/gpu/drm/ast/ast_post.c')
-rw-r--r-- | drivers/gpu/drm/ast/ast_post.c | 94 |
1 files changed, 47 insertions, 47 deletions
diff --git a/drivers/gpu/drm/ast/ast_post.c b/drivers/gpu/drm/ast/ast_post.c index 82fd3c8adee1..71bb36b865fd 100644 --- a/drivers/gpu/drm/ast/ast_post.c +++ b/drivers/gpu/drm/ast/ast_post.c @@ -39,7 +39,7 @@ static void ast_post_chip_2500(struct drm_device *dev); void ast_enable_vga(struct drm_device *dev) { - struct ast_private *ast = to_ast_private(dev); + struct ast_device *ast = to_ast_device(dev); ast_io_write8(ast, AST_IO_VGA_ENABLE_PORT, 0x01); ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, 0x01); @@ -47,7 +47,7 @@ void ast_enable_vga(struct drm_device *dev) void ast_enable_mmio(struct drm_device *dev) { - struct ast_private *ast = to_ast_private(dev); + struct ast_device *ast = to_ast_device(dev); ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x06); } @@ -55,7 +55,7 @@ void ast_enable_mmio(struct drm_device *dev) bool ast_is_vga_enabled(struct drm_device *dev) { - struct ast_private *ast = to_ast_private(dev); + struct ast_device *ast = to_ast_device(dev); u8 ch; ch = ast_io_read8(ast, AST_IO_VGA_ENABLE_PORT); @@ -70,7 +70,7 @@ static const u8 extreginfo_ast2300[] = { 0x0f, 0x04, 0x1f, 0xff }; static void ast_set_def_ext_reg(struct drm_device *dev) { - struct ast_private *ast = to_ast_private(dev); + struct ast_device *ast = to_ast_device(dev); struct pci_dev *pdev = to_pci_dev(dev->dev); u8 i, index, reg; const u8 *ext_reg_info; @@ -110,7 +110,7 @@ ast_set_def_ext_reg(struct drm_device *dev) ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xff, reg); } -u32 ast_mindwm(struct ast_private *ast, u32 r) +u32 ast_mindwm(struct ast_device *ast, u32 r) { uint32_t data; @@ -123,7 +123,7 @@ u32 ast_mindwm(struct ast_private *ast, u32 r) return ast_read32(ast, 0x10000 + (r & 0x0000ffff)); } -void ast_moutdwm(struct ast_private *ast, u32 r, u32 v) +void ast_moutdwm(struct ast_device *ast, u32 r, u32 v) { uint32_t data; ast_write32(ast, 0xf004, r & 0xffff0000); @@ -162,7 +162,7 @@ static const u32 pattern_AST2150[14] = { 0x20F050E0 }; -static u32 mmctestburst2_ast2150(struct ast_private *ast, u32 datagen) +static u32 mmctestburst2_ast2150(struct ast_device *ast, u32 datagen) { u32 data, timeout; @@ -192,7 +192,7 @@ static u32 mmctestburst2_ast2150(struct ast_private *ast, u32 datagen) } #if 0 /* unused in DDX driver - here for completeness */ -static u32 mmctestsingle2_ast2150(struct ast_private *ast, u32 datagen) +static u32 mmctestsingle2_ast2150(struct ast_device *ast, u32 datagen) { u32 data, timeout; @@ -212,7 +212,7 @@ static u32 mmctestsingle2_ast2150(struct ast_private *ast, u32 datagen) } #endif -static int cbrtest_ast2150(struct ast_private *ast) +static int cbrtest_ast2150(struct ast_device *ast) { int i; @@ -222,7 +222,7 @@ static int cbrtest_ast2150(struct ast_private *ast) return 1; } -static int cbrscan_ast2150(struct ast_private *ast, int busw) +static int cbrscan_ast2150(struct ast_device *ast, int busw) { u32 patcnt, loop; @@ -239,7 +239,7 @@ static int cbrscan_ast2150(struct ast_private *ast, int busw) } -static void cbrdlli_ast2150(struct ast_private *ast, int busw) +static void cbrdlli_ast2150(struct ast_device *ast, int busw) { u32 dll_min[4], dll_max[4], dlli, data, passcnt; @@ -273,7 +273,7 @@ cbr_start: static void ast_init_dram_reg(struct drm_device *dev) { - struct ast_private *ast = to_ast_private(dev); + struct ast_device *ast = to_ast_device(dev); u8 j; u32 data, temp, i; const struct ast_dramstruct *dram_reg_info; @@ -366,7 +366,7 @@ static void ast_init_dram_reg(struct drm_device *dev) void ast_post_gpu(struct drm_device *dev) { - struct ast_private *ast = to_ast_private(dev); + struct ast_device *ast = to_ast_device(dev); struct pci_dev *pdev = to_pci_dev(dev->dev); u32 reg; @@ -449,7 +449,7 @@ static const u32 pattern[8] = { 0x7C61D253 }; -static bool mmc_test(struct ast_private *ast, u32 datagen, u8 test_ctl) +static bool mmc_test(struct ast_device *ast, u32 datagen, u8 test_ctl) { u32 data, timeout; @@ -469,7 +469,7 @@ static bool mmc_test(struct ast_private *ast, u32 datagen, u8 test_ctl) return true; } -static u32 mmc_test2(struct ast_private *ast, u32 datagen, u8 test_ctl) +static u32 mmc_test2(struct ast_device *ast, u32 datagen, u8 test_ctl) { u32 data, timeout; @@ -490,32 +490,32 @@ static u32 mmc_test2(struct ast_private *ast, u32 datagen, u8 test_ctl) } -static bool mmc_test_burst(struct ast_private *ast, u32 datagen) +static bool mmc_test_burst(struct ast_device *ast, u32 datagen) { return mmc_test(ast, datagen, 0xc1); } -static u32 mmc_test_burst2(struct ast_private *ast, u32 datagen) +static u32 mmc_test_burst2(struct ast_device *ast, u32 datagen) { return mmc_test2(ast, datagen, 0x41); } -static bool mmc_test_single(struct ast_private *ast, u32 datagen) +static bool mmc_test_single(struct ast_device *ast, u32 datagen) { return mmc_test(ast, datagen, 0xc5); } -static u32 mmc_test_single2(struct ast_private *ast, u32 datagen) +static u32 mmc_test_single2(struct ast_device *ast, u32 datagen) { return mmc_test2(ast, datagen, 0x05); } -static bool mmc_test_single_2500(struct ast_private *ast, u32 datagen) +static bool mmc_test_single_2500(struct ast_device *ast, u32 datagen) { return mmc_test(ast, datagen, 0x85); } -static int cbr_test(struct ast_private *ast) +static int cbr_test(struct ast_device *ast) { u32 data; int i; @@ -534,7 +534,7 @@ static int cbr_test(struct ast_private *ast) return 1; } -static int cbr_scan(struct ast_private *ast) +static int cbr_scan(struct ast_device *ast) { u32 data, data2, patcnt, loop; @@ -555,7 +555,7 @@ static int cbr_scan(struct ast_private *ast) return data2; } -static u32 cbr_test2(struct ast_private *ast) +static u32 cbr_test2(struct ast_device *ast) { u32 data; @@ -569,7 +569,7 @@ static u32 cbr_test2(struct ast_private *ast) return ~data & 0xffff; } -static u32 cbr_scan2(struct ast_private *ast) +static u32 cbr_scan2(struct ast_device *ast) { u32 data, data2, patcnt, loop; @@ -590,7 +590,7 @@ static u32 cbr_scan2(struct ast_private *ast) return data2; } -static bool cbr_test3(struct ast_private *ast) +static bool cbr_test3(struct ast_device *ast) { if (!mmc_test_burst(ast, 0)) return false; @@ -599,7 +599,7 @@ static bool cbr_test3(struct ast_private *ast) return true; } -static bool cbr_scan3(struct ast_private *ast) +static bool cbr_scan3(struct ast_device *ast) { u32 patcnt, loop; @@ -615,7 +615,7 @@ static bool cbr_scan3(struct ast_private *ast) return true; } -static bool finetuneDQI_L(struct ast_private *ast, struct ast2300_dram_param *param) +static bool finetuneDQI_L(struct ast_device *ast, struct ast2300_dram_param *param) { u32 gold_sadj[2], dllmin[16], dllmax[16], dlli, data, cnt, mask, passcnt, retry = 0; bool status = false; @@ -714,7 +714,7 @@ FINETUNE_DONE: return status; } /* finetuneDQI_L */ -static void finetuneDQSI(struct ast_private *ast) +static void finetuneDQSI(struct ast_device *ast) { u32 dlli, dqsip, dqidly; u32 reg_mcr18, reg_mcr0c, passcnt[2], diff; @@ -804,7 +804,7 @@ static void finetuneDQSI(struct ast_private *ast) ast_moutdwm(ast, 0x1E6E0018, reg_mcr18); } -static bool cbr_dll2(struct ast_private *ast, struct ast2300_dram_param *param) +static bool cbr_dll2(struct ast_device *ast, struct ast2300_dram_param *param) { u32 dllmin[2], dllmax[2], dlli, data, passcnt, retry = 0; bool status = false; @@ -860,7 +860,7 @@ CBR_DONE2: return status; } /* CBRDLL2 */ -static void get_ddr3_info(struct ast_private *ast, struct ast2300_dram_param *param) +static void get_ddr3_info(struct ast_device *ast, struct ast2300_dram_param *param) { u32 trap, trap_AC2, trap_MRS; @@ -1102,7 +1102,7 @@ static void get_ddr3_info(struct ast_private *ast, struct ast2300_dram_param *pa } -static void ddr3_init(struct ast_private *ast, struct ast2300_dram_param *param) +static void ddr3_init(struct ast_device *ast, struct ast2300_dram_param *param) { u32 data, data2, retry = 0; @@ -1225,7 +1225,7 @@ ddr3_init_start: } -static void get_ddr2_info(struct ast_private *ast, struct ast2300_dram_param *param) +static void get_ddr2_info(struct ast_device *ast, struct ast2300_dram_param *param) { u32 trap, trap_AC2, trap_MRS; @@ -1472,7 +1472,7 @@ static void get_ddr2_info(struct ast_private *ast, struct ast2300_dram_param *pa } } -static void ddr2_init(struct ast_private *ast, struct ast2300_dram_param *param) +static void ddr2_init(struct ast_device *ast, struct ast2300_dram_param *param) { u32 data, data2, retry = 0; @@ -1600,7 +1600,7 @@ ddr2_init_start: static void ast_post_chip_2300(struct drm_device *dev) { - struct ast_private *ast = to_ast_private(dev); + struct ast_device *ast = to_ast_device(dev); struct ast2300_dram_param param; u32 temp; u8 reg; @@ -1681,7 +1681,7 @@ static void ast_post_chip_2300(struct drm_device *dev) } while ((reg & 0x40) == 0); } -static bool cbr_test_2500(struct ast_private *ast) +static bool cbr_test_2500(struct ast_device *ast) { ast_moutdwm(ast, 0x1E6E0074, 0x0000FFFF); ast_moutdwm(ast, 0x1E6E007C, 0xFF00FF00); @@ -1692,7 +1692,7 @@ static bool cbr_test_2500(struct ast_private *ast) return true; } -static bool ddr_test_2500(struct ast_private *ast) +static bool ddr_test_2500(struct ast_device *ast) { ast_moutdwm(ast, 0x1E6E0074, 0x0000FFFF); ast_moutdwm(ast, 0x1E6E007C, 0xFF00FF00); @@ -1709,7 +1709,7 @@ static bool ddr_test_2500(struct ast_private *ast) return true; } -static void ddr_init_common_2500(struct ast_private *ast) +static void ddr_init_common_2500(struct ast_device *ast) { ast_moutdwm(ast, 0x1E6E0034, 0x00020080); ast_moutdwm(ast, 0x1E6E0008, 0x2003000F); @@ -1732,7 +1732,7 @@ static void ddr_init_common_2500(struct ast_private *ast) ast_moutdwm(ast, 0x1E6E024C, 0x80808080); } -static void ddr_phy_init_2500(struct ast_private *ast) +static void ddr_phy_init_2500(struct ast_device *ast) { u32 data, pass, timecnt; @@ -1766,7 +1766,7 @@ static void ddr_phy_init_2500(struct ast_private *ast) * 4Gb : 0x80000000 ~ 0x9FFFFFFF * 8Gb : 0x80000000 ~ 0xBFFFFFFF */ -static void check_dram_size_2500(struct ast_private *ast, u32 tRFC) +static void check_dram_size_2500(struct ast_device *ast, u32 tRFC) { u32 reg_04, reg_14; @@ -1797,7 +1797,7 @@ static void check_dram_size_2500(struct ast_private *ast, u32 tRFC) ast_moutdwm(ast, 0x1E6E0014, reg_14); } -static void enable_cache_2500(struct ast_private *ast) +static void enable_cache_2500(struct ast_device *ast) { u32 reg_04, data; @@ -1810,7 +1810,7 @@ static void enable_cache_2500(struct ast_private *ast) ast_moutdwm(ast, 0x1E6E0004, reg_04 | 0x400); } -static void set_mpll_2500(struct ast_private *ast) +static void set_mpll_2500(struct ast_device *ast) { u32 addr, data, param; @@ -1837,7 +1837,7 @@ static void set_mpll_2500(struct ast_private *ast) udelay(100); } -static void reset_mmc_2500(struct ast_private *ast) +static void reset_mmc_2500(struct ast_device *ast) { ast_moutdwm(ast, 0x1E78505C, 0x00000004); ast_moutdwm(ast, 0x1E785044, 0x00000001); @@ -1848,7 +1848,7 @@ static void reset_mmc_2500(struct ast_private *ast) ast_moutdwm(ast, 0x1E6E0000, 0xFC600309); } -static void ddr3_init_2500(struct ast_private *ast, const u32 *ddr_table) +static void ddr3_init_2500(struct ast_device *ast, const u32 *ddr_table) { ast_moutdwm(ast, 0x1E6E0004, 0x00000303); @@ -1892,7 +1892,7 @@ static void ddr3_init_2500(struct ast_private *ast, const u32 *ddr_table) ast_moutdwm(ast, 0x1E6E0038, 0xFFFFFF00); } -static void ddr4_init_2500(struct ast_private *ast, const u32 *ddr_table) +static void ddr4_init_2500(struct ast_device *ast, const u32 *ddr_table) { u32 data, data2, pass, retrycnt; u32 ddr_vref, phy_vref; @@ -2002,7 +2002,7 @@ static void ddr4_init_2500(struct ast_private *ast, const u32 *ddr_table) ast_moutdwm(ast, 0x1E6E0038, 0xFFFFFF00); } -static bool ast_dram_init_2500(struct ast_private *ast) +static bool ast_dram_init_2500(struct ast_device *ast) { u32 data; u32 max_tries = 5; @@ -2030,7 +2030,7 @@ static bool ast_dram_init_2500(struct ast_private *ast) return true; } -void ast_patch_ahb_2500(struct ast_private *ast) +void ast_patch_ahb_2500(struct ast_device *ast) { u32 data; @@ -2066,7 +2066,7 @@ void ast_patch_ahb_2500(struct ast_private *ast) void ast_post_chip_2500(struct drm_device *dev) { - struct ast_private *ast = to_ast_private(dev); + struct ast_device *ast = to_ast_device(dev); u32 temp; u8 reg; |