Merge tag 'drm-fixes-2020-11-06-1' of git://anongit.freedesktop.org/drm/drm

Pull drm fixes from Dave Airlie:
 "It's Friday here so that means another installment of drm fixes to
  distract you from the counting process.

  Changes all over the place, the amdgpu changes contain support for a
  new GPU that is close to current one already in the tree (Green
  Sardine) so it shouldn't have much side effects.

  Otherwise imx has a few cleanup patches and fixes, amdgpu and i915
  have around the usual smattering of fixes, fonts got constified, and
  vc4/panfrost has some minor fixes. All in all a fairly regular rc3.

  We have an outstanding nouveau regression, but the author is looking
  into the fix, so should be here next week.

  I now return you to counting.

  fonts:
   - constify font structures.

  MAINTAINERS:
   - Fix path for amdgpu power management

  amdgpu:
   - Add support for more navi1x SKUs
   - Fix for suspend on CI dGPUs
   - VCN DPG fix for Picasso
   - Sienna Cichlid fixes
   - Polaris DPM fix
   - Add support for Green Sardine

  amdkfd:
   - Fix an allocation failure check

  i915:
   - Fix set domain's cache coherency
   - Fixes around breadcrumbs
   - Fix encoder lookup during PSR atomic
   - Hold onto an explicit ref to i915_vma_work.pinned
   - gvt: HWSP reset handling fix
   - gvt: flush workaround
   - gvt: vGPU context pin/unpin
   - gvt: mmio cmd access fix for bxt/apl

  imx:
   - drop unused functions and callbacks
   - reuse imx_drm_encoder_parse_of
   - spinlock rework
   - memory leak fix
   - minor cleanups

  vc4:
   - resource cleanup fix

  panfrost:
   - madvise/shrinker fix"

* tag 'drm-fixes-2020-11-06-1' of git://anongit.freedesktop.org/drm/drm: (55 commits)
  drm/amdgpu/display: remove DRM_AMD_DC_GREEN_SARDINE
  drm/amd/display: Add green_sardine support to DM
  drm/amd/display: Add green_sardine support to DC
  drm/amdgpu: enable vcn support for green_sardine (v2)
  drm/amdgpu: enable green_sardine_asd.bin loading (v2)
  drm/amdgpu/sdma: add sdma engine support for green_sardine (v2)
  drm/amdgpu: add gfx support for green_sardine (v2)
  drm/amdgpu: add soc15 common ip block support for green_sardine (v3)
  drm/amdgpu: add green_sardine support for gpu_info and ip block setting (v2)
  drm/amdgpu: add Green_Sardine APU flag
  drm/amdgpu: resolved ASD loading issue on sienna
  amdkfd: Check kvmalloc return before memcpy
  drm/amdgpu: update golden setting for sienna_cichlid
  amd/amdgpu: Disable VCN DPG mode for Picasso
  drm/amdgpu/swsmu: remove duplicate call to smu_set_default_dpm_table
  drm/i915: Hold onto an explicit ref to i915_vma_work.pinned
  drm/i915/gt: Flush xcs before tgl breadcrumbs
  drm/i915/gt: Expose more parameters for emitting writes into the ring
  drm/i915: Fix encoder lookup during PSR atomic check
  drm/i915/gt: Use the local HWSP offset during submission
  ...

1 files changed, 6 insertions, 34 deletions

diff --git a/drivers/gpu/drm/imx/imx-tve.c b/drivers/gpu/drm/imx/imx-tve.c
index 813bb6156a68..2a8d2e32e7b4 100644
--- a/drivers/gpu/drm/imx/imx-tve.c
+++ b/drivers/gpu/drm/imx/imx-tve.c
@@ -13,7 +13,6 @@
 #include <linux/platform_device.h>
 #include <linux/regmap.h>
 #include <linux/regulator/consumer.h>
-#include <linux/spinlock.h>
 #include <linux/videodev2.h>
 
 #include <video/imx-ipu-v3.h>
@@ -104,8 +103,6 @@ struct imx_tve {
 	struct drm_connector connector;
 	struct drm_encoder encoder;
 	struct device *dev;
-	spinlock_t lock;	/* register lock */
-	bool enabled;
 	int mode;
 	int di_hsync_pin;
 	int di_vsync_pin;
@@ -129,30 +126,10 @@ static inline struct imx_tve *enc_to_tve(struct drm_encoder *e)
 	return container_of(e, struct imx_tve, encoder);
 }
 
-static void tve_lock(void *__tve)
-__acquires(&tve->lock)
-{
-	struct imx_tve *tve = __tve;
-
-	spin_lock(&tve->lock);
-}
-
-static void tve_unlock(void *__tve)
-__releases(&tve->lock)
-{
-	struct imx_tve *tve = __tve;
-
-	spin_unlock(&tve->lock);
-}
-
 static void tve_enable(struct imx_tve *tve)
 {
-	if (!tve->enabled) {
-		tve->enabled = true;
-		clk_prepare_enable(tve->clk);
-		regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
-				   TVE_EN, TVE_EN);
-	}
+	clk_prepare_enable(tve->clk);
+	regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, TVE_EN, TVE_EN);
 
 	/* clear interrupt status register */
 	regmap_write(tve->regmap, TVE_STAT_REG, 0xffffffff);
@@ -169,11 +146,8 @@ static void tve_enable(struct imx_tve *tve)
 
 static void tve_disable(struct imx_tve *tve)
 {
-	if (tve->enabled) {
-		tve->enabled = false;
-		regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, TVE_EN, 0);
-		clk_disable_unprepare(tve->clk);
-	}
+	regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, TVE_EN, 0);
+	clk_disable_unprepare(tve->clk);
 }
 
 static int tve_setup_tvout(struct imx_tve *tve)
@@ -500,8 +474,7 @@ static struct regmap_config tve_regmap_config = {
 
 	.readable_reg = imx_tve_readable_reg,
 
-	.lock = tve_lock,
-	.unlock = tve_unlock,
+	.fast_io = true,
 
 	.max_register = 0xdc,
 };
@@ -511,7 +484,7 @@ static const char * const imx_tve_modes[] = {
 	[TVE_MODE_VGA] = "vga",
 };
 
-static const int of_get_tve_mode(struct device_node *np)
+static int of_get_tve_mode(struct device_node *np)
 {
 	const char *bm;
 	int ret, i;
@@ -544,7 +517,6 @@ static int imx_tve_bind(struct device *dev, struct device *master, void *data)
 	memset(tve, 0, sizeof(*tve));
 
 	tve->dev = dev;
-	spin_lock_init(&tve->lock);
 
 	ddc_node = of_parse_phandle(np, "ddc-i2c-bus", 0);
 	if (ddc_node) {