Merge branch 'remotes/lorenzo/pci/dwc'

- Fix n_fts[] array overrun (Vidya Sagar)

- Don't advertise PTM Responder role for Endpoints (Vidya Sagar)

- Fix qcom "reset assert" error message (Manivannan Sadhasivam)

- Downgrade "link didn't come up" message to dev_info (Vidya Sagar)

- Initialize PHY before deasserting core reset so the link comes up on
  boards where the PHY provides the reference clock (this was a regression
  in v6.0) (Sascha Hauer)

- Switch histb to the gpiod API (Dmitry Torokhov)

- Fix imx6sx and imx8mq clock names in DT binding (Serge Semin)

- Fix visconti MSI interrupt in DT binding (Serge Semin)

- Consolidate reset-gpio, cdm, windows info in common DT shared by both
  Root Port and Endpoint bindings (Serge Semin)

- Remove bus node from DT examples (Serge Semin)

- Add common phys, phy-names to DT (Serge Semin)

- Add default max-link-speed of Gen5 to DT (Serge Semin)

- Apply generic schema for generic device  (Serge Semin)

- Add default max-functions of 32 to DT (Serge Semin)

- Add common interrupts, interrupt-names to DT (Serge Semin)

- Add common regs, reg-names to DT (Serge Semin)

- Add common clocks, resets to DT (Serge Semin)

- Add dma-coherent to DT (Serge Semin)

- Apply common schema to Rockchip DT (Serge Semin)

- Add Baikal-T1 DT bindings (Serge Semin)

- Add dma-ranges support in DesignWare core (Serge Semin)

- Add dw_pcie_cap_is() for testing controller capabilities (Serge Semin)

- Add generic resources getter to DesignWare core (Serge Semin)

- Combine iATU detection procedures (Serge Semin)

- Add generic clock and reset names to DesignWare core (Serge Semin)

- Add Baikal-T1 PCIe controller driver (Serge Semin)

* remotes/lorenzo/pci/dwc:
  PCI: dwc: Add Baikal-T1 PCIe controller support
  PCI: dwc: Introduce generic platform clocks and resets
  PCI: dwc: Combine iATU detection procedures
  PCI: dwc: Introduce generic resources getter
  PCI: dwc: Introduce generic controller capabilities interface
  PCI: dwc: Introduce dma-ranges property support for RC-host
  dt-bindings: PCI: dwc: Add Baikal-T1 PCIe Root Port bindings
  dt-bindings: PCI: dwc: Apply common schema to Rockchip DW PCIe nodes
  dt-bindings: PCI: dwc: Add dma-coherent property
  dt-bindings: PCI: dwc: Add clocks/resets common properties
  dt-bindings: PCI: dwc: Add reg/reg-names common properties
  dt-bindings: PCI: dwc: Add interrupts/interrupt-names common properties
  dt-bindings: PCI: dwc: Add max-functions EP property
  dt-bindings: PCI: dwc: Apply generic schema for generic device only
  dt-bindings: PCI: dwc: Add max-link-speed common property
  dt-bindings: PCI: dwc: Add phys/phy-names common properties
  dt-bindings: PCI: dwc: Remove bus node from the examples
  dt-bindings: PCI: dwc: Detach common RP/EP DT bindings
  dt-bindings: visconti-pcie: Fix interrupts array max constraints
  dt-bindings: imx6q-pcie: Fix clock names for imx6sx and imx8mq
  PCI: histb: Switch to using gpiod API
  PCI: imx6: Initialize PHY before deasserting core reset
  PCI: dwc: Use dev_info for PCIe link down event logging
  PCI: qcom: Fix error message for reset_control_assert()
  PCI: designware-ep: Disable PTM capabilities for EP mode
  PCI: Add PCI_PTM_CAP_RES macro
  PCI: dwc: Fix n_fts[] array overrun

1 files changed, 33 insertions, 14 deletions

diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 39f3b37d4033..3ab6ae3712c4 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -16,7 +16,6 @@
 #include <linux/pci_regs.h>
 #include <linux/platform_device.h>
 
-#include "../../pci.h"
 #include "pcie-designware.h"
 
 static struct pci_ops dw_pcie_ops;
@@ -395,6 +394,10 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
 
 	raw_spin_lock_init(&pp->lock);
 
+	ret = dw_pcie_get_resources(pci);
+	if (ret)
+		return ret;
+
 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "config");
 	if (res) {
 		pp->cfg0_size = resource_size(res);
@@ -408,13 +411,6 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
 		return -ENODEV;
 	}
 
-	if (!pci->dbi_base) {
-		res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
-		pci->dbi_base = devm_pci_remap_cfg_resource(dev, res);
-		if (IS_ERR(pci->dbi_base))
-			return PTR_ERR(pci->dbi_base);
-	}
-
 	bridge = devm_pci_alloc_host_bridge(dev, 0);
 	if (!bridge)
 		return -ENOMEM;
@@ -429,9 +425,6 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
 		pp->io_base = pci_pio_to_address(win->res->start);
 	}
 
-	if (pci->link_gen < 1)
-		pci->link_gen = of_pci_get_max_link_speed(np);
-
 	/* Set default bus ops */
 	bridge->ops = &dw_pcie_ops;
 	bridge->child_ops = &dw_child_pcie_ops;
@@ -643,12 +636,15 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
 	}
 
 	/*
-	 * Ensure all outbound windows are disabled before proceeding with
-	 * the MEM/IO ranges setups.
+	 * Ensure all out/inbound windows are disabled before proceeding with
+	 * the MEM/IO (dma-)ranges setups.
 	 */
 	for (i = 0; i < pci->num_ob_windows; i++)
 		dw_pcie_disable_atu(pci, PCIE_ATU_REGION_DIR_OB, i);
 
+	for (i = 0; i < pci->num_ib_windows; i++)
+		dw_pcie_disable_atu(pci, PCIE_ATU_REGION_DIR_IB, i);
+
 	i = 0;
 	resource_list_for_each_entry(entry, &pp->bridge->windows) {
 		if (resource_type(entry->res) != IORESOURCE_MEM)
@@ -685,9 +681,32 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
 	}
 
 	if (pci->num_ob_windows <= i)
-		dev_warn(pci->dev, "Resources exceed number of ATU entries (%d)\n",
+		dev_warn(pci->dev, "Ranges exceed outbound iATU size (%d)\n",
 			 pci->num_ob_windows);
 
+	i = 0;
+	resource_list_for_each_entry(entry, &pp->bridge->dma_ranges) {
+		if (resource_type(entry->res) != IORESOURCE_MEM)
+			continue;
+
+		if (pci->num_ib_windows <= i)
+			break;
+
+		ret = dw_pcie_prog_inbound_atu(pci, i++, PCIE_ATU_TYPE_MEM,
+					       entry->res->start,
+					       entry->res->start - entry->offset,
+					       resource_size(entry->res));
+		if (ret) {
+			dev_err(pci->dev, "Failed to set DMA range %pr\n",
+				entry->res);
+			return ret;
+		}
+	}
+
+	if (pci->num_ib_windows <= i)
+		dev_warn(pci->dev, "Dma-ranges exceed inbound iATU size (%u)\n",
+			 pci->num_ib_windows);
+
 	return 0;
 }