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| author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2019-07-29 08:51:48 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2019-07-29 08:51:48 -0700 |
| commit | ed32f8d42cee118b075e4372a55c7739a11094b2 (patch) | |
| tree | 5a806c5168d4177e0536b98b6bda30ec4bdbac43 /drivers/pci/controller/vmd.c | |
| parent | 60a4233a4952729089e4df152e730f8f4d0e82ce (diff) | |
| parent | 5f9e832c137075045d15cd6899ab0505cfb2ca4b (diff) | |
Merge drm/drm-next into drm-intel-next-queued
Catching up with 5.3-rc*
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/pci/controller/vmd.c')
| -rw-r--r-- | drivers/pci/controller/vmd.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/controller/vmd.c b/drivers/pci/controller/vmd.c index 999a5509e57e..4575e0c6dc4b 100644 --- a/drivers/pci/controller/vmd.c +++ b/drivers/pci/controller/vmd.c @@ -627,7 +627,7 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features) * 32-bit resources. __pci_assign_resource() enforces that * artificial restriction to make sure everything will fit. * - * The only way we could use a 64-bit non-prefechable MEMBAR is + * The only way we could use a 64-bit non-prefetchable MEMBAR is * if its address is <4GB so that we can convert it to a 32-bit * resource. To be visible to the host OS, all VMD endpoints must * be initially configured by platform BIOS, which includes setting |